Abstract: An Internet protocol low noise block downconverter (IP LNB) assembly, which may be within a satellite reception assembly, may be operable to determine location information and/or time information of the IP LNB assembly, such as via a global navigation satellite system (GNSS) module in the IP LNB assembly. The IP LNB assembly may provide services based on the determined location information and/or the determined time information of the IP LNB assembly. The IP LNB assembly may communicate the determined location information and/or the determined time information to a wireless communication device for determining location information of the wireless communication device. The IP LNB assembly may determine location information of a wireless source device based on a signal received from the wireless source device, the determined location information and the determined time information of the IP LNB assembly.

Abstract: Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection.

Abstract: A system and method in a broadband receiver (e.g., a satellite television receiver) for efficiently receiving and processing signals, substantially as shown in and/or described in connection with at least one of the figures, as set forth more completely in the claims.

Abstract: A direct broadcast satellite (DBS) reception assembly may comprise an integrated circuit that is configurable between or among a plurality of configurations based on content requested by client devices served by the DBS reception assembly. In a first configuration, multiple satellite frequency bands may be digitized by the integrated circuit as a single wideband signal. In a second configuration, the satellite frequency bands may be digitized by the integrated circuit as a plurality of separate narrowband signals. The integrated circuit may comprise a plurality of receive paths, each of the receive chains comprising a respective one of a plurality of low noise amplifiers and a plurality of analog-to-digital converters.

Abstract: A system and method in a broadband receiver (e.g., a satellite television receiver) for efficiently receiving and processing signals, substantially as shown in and/or described in connection with at least one of the figures, as set forth more completely in the claims.

Abstract: A satellite dish assembly may comprise a broadcast receive module and a basestation module. The broadcast receive module may be operable to receive a satellite signal, recover media carried in the satellite signal, and output the media. The basestation module may be operable to accept the media output by the broadcast receive module and transmit the media in accordance with one or more wireless protocols. In being conveyed from the broadcast receive module to the basestation, the media content may not traverse any wide area network connection. The one or more wireless protocols may comprise one or more of: a cellular protocol and IEEE 802.11 protocol. The satellite dish assembly may comprise a routing module that may be operable to route data between the broadcast receive module, the basestation, and a gateway.

Abstract: Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection.

Abstract: Methods and systems are provided for multi-chip receivers with loop-through feeds. A receiver that comprises plurality of chips may receive one or more input feeds, with each of the chips generating a corresponding output comprising data (e.g., channels) extracted from the one or more input feeds. Only a first chip may handle reception and/or initial processing of the one or more input feeds, with each one of the remaining chips processing a loop-through feed generated in the first chip, in order to generate the corresponding output of that chip. The loop-through feed may be generated based on the one or more input feeds. In this regard, the loop-through feed may comprise at least one of the one or more input feeds that is partially processed in the first one of the plurality of chips.

Abstract: A satellite reception assembly that provides satellite television and/or radio service to a customer premises may comprise a wireless interface via which it can communicate with other satellite reception assemblies. Wireless connections between satellite reception assemblies may be utilized for providing satellite content between different satellite customer premises. Wireless connections between satellite reception assemblies may be utilized for offloading traffic from other network connections.

Abstract: A satellite reception assembly may comprise a first module operable to demodulate a first one or more channels of a signal output by a direct broadcast satellite (DBS) low noise block downconverter (LNB). The first module may output a signal to a second module which may demodulate a second one or more channels of the signal output by the DBS LNB. The second module may be installed after the satellite reception assembly has been deployed upon a number of clients served by the satellite reception assembly reaching a threshold.

Abstract: A system and method in a broadband receiver (e.g., a satellite television receiver) for efficiently receiving and processing signals, substantially as shown in and/or described in connection with at least one of the figures, as set forth more completely in the claims.

Abstract: A direct broadcast satellite (DBS) reception assembly may comprise an integrated circuit that is configurable between or among a plurality of configurations based on content requested by client devices served by the DBS reception assembly. In a first configuration, multiple satellite frequency bands may be digitized by the integrated circuit as a single wideband signal. In a second configuration, the satellite frequency bands may be digitized by the integrated circuit as a plurality of separate narrowband signals. The integrated circuit may comprise a plurality of receive paths, each of the receive chains comprising a respective one of a plurality of low noise amplifiers and a plurality of analog-to-digital converters.

Abstract: Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection.

Abstract: A signal receiver chip may be configured to handle a plurality of satellite signals. In this regard, for each received satellite signal the signal receiver chip may determine whether the received satellite signal is unprocessed or partially-processed off-chip; and when the received satellite signal is partially-processed off-chip, at least a portion of processing functions performed in the signal receiver chip may be bypassed. The received satellite signals may then be processed, to generate a corresponding output signals that is configured for communication over a local link. The processing functions bypassed in the signal receiver chip may comprise signal band conversion, particularly down converting from a first band used for over-the-air communication to a second band that is used during handling at receiver side. In this regard, the first band comprises K-band, Ku-band, or Ka-band, whereas the second band comprises L-band, half-L-band, or Extended-L-band.

Abstract: Methods and systems are provided for guard band detection and/or frequency offset detection. For example, a signal processing circuit may be operable to determine, for each of a plurality of downconverted signals, one or more frequency offsets that are associated with one or more corresponding local oscillators (LOs) used in obtaining the plurality of downconverted signals; and relating to the determined frequency offsets may be generated for the plurality of downconverted signals. The signal processing circuit may perform, based on the generated information, one or both of a band stacking operation and a channel stacking operation so as to prevent channels/bands being stacked on each other or being overlapped.

Abstract: Methods and systems for providing satellite television service to a premises may comprise receiving satellite television signals utilizing a satellite dish, converting received satellite signals to internet protocol (IP) signals, and wirelessly communicating the IP signals into a premises to which the satellite dish corresponds. The IP signals may, for example, conform to a multimedia over cable alliance (MoCA) standard or a IEEE 802.11x standard. The wirelessly communicating may comprise magnetic coupling. The received satellite signals may, for example, be converted to IP signals utilizing an IP low-noise block downconverter (IP-LNB) which may comprise full-band capture receivers. The wireless communication of the IP signals may, for example, be within a wireless network of the dwelling or may be independent of a wireless network of the dwelling. The wirelessly communicated IP signals may be beam-formed and may be communicated wirelessly over one or more industrial, scientific, and medical (ISM) bands.

Abstract: Methods and systems are provided for loop-through for multi-chip communication systems. Receiver circuitry, that is operable to receive one or more input feeds, may comprise a plurality of chips, each of which may be configurable to generate a corresponding output comprising one or more feed elements (e.g., channels) extracted from the input feed(s). However, only a first chip may be operable to handle reception and/or initial processing of the one or more input feeds, with each one of the remaining chips processing a loop-through feed generated by the first chip, in order to generate the corresponding output of that chip. The first chip generates the loop-through feed based on the one or more input feeds, such as after the initial processing thereof in the first chip. Generating the loop-through feed may comprise applying channelization (e.g., separately for each remaining chip), switching based processing, and/or interfacing based processing.

Abstract: One or more circuits for use in a transceiver that is collocated with a satellite dish, may receive a satellite signal carrying media content, and remove content protection from the received media content. After removing the first content protection, the one or more circuits may apply second content protection to the media content. The content protection applied by the one or more circuits may adhere to a different protocol, utilize different keys, and/or otherwise be distinguishable from the content protection that was removed. After applying the content protection, the one or more circuits may transmit the media content onto one or more links between the satellite dish and one or more client devices. The removal of the content protection may comprise descrambling and/or decrypting the media content. The application of the content protection may comprise scrambling and/or encrypting the media content.

Abstract: A satellite dish assembly may comprise a broadcast receive module and a basestation module. The broadcast receive module may be operable to receive a satellite signal, recover media carried in the satellite signal, and output the media. The basestation module may be operable to accept the media output by the broadcast receive module and transmit the media in accordance with one or more wireless protocols. In being conveyed from the broadcast receive module to the basestation, the media content may not traverse any wide area network connection. The one or more wireless protocols may comprise one or more of: a cellular protocol and IEEE 802.11 protocol. The satellite dish assembly may comprise a routing module that may be operable to route data between the broadcast receive module, the basestation, and a gateway.

Abstract: A signal processing circuit, which is within a satellite reception assembly, may be operable to analyze actual frequency information corresponding to a plurality of downconverted signals. Each of the downconverted signals may be downconverted using one or more corresponding local oscillators (LOs). Based on the analyzing, one or more of the following may be determined: one or more frequency offsets associated with the one or more corresponding LOs and one or more actual guard bands. The signal processing circuit may generate information on the determined frequency offsets and the determined actual guard bands. The signal processing circuit may perform, based on the generated information, one or both of a band stacking operation and a channel stacking operation so as to prevent channels/bands being stacked on each other or being overlapped. The signal processing circuit may perform, based on the generated information, frequency corrections for channel tuning in a gateway.