Abstract: A satellite reception assembly may comprise a first module operable to demodulate a first one or more channels of a signal output by a direct broadcast satellite (DBS) low noise block downconverter (LNB). The first module may output a signal to a second module which may demodulate a second one or more channels of the signal output by the DBS LNB. The second module may be installed after the satellite reception assembly has been deployed upon a number of clients served by the satellite reception assembly reaching a threshold.

Abstract: A system and method in a broadband receiver (e.g., a satellite television receiver) for efficiently receiving and processing signals, substantially as shown in and/or described in connection with at least one of the figures, as set forth more completely in the claims.

Abstract: A satellite reception assembly that provides satellite television and/or radio service to a customer premises may comprise a wireless interface via which it can communicate with other satellite reception assemblies. Wireless connections between satellite reception assemblies may be utilized for providing satellite content between different satellite customer premises. Wireless connections between satellite reception assemblies may be utilized for offloading traffic from other network connections.

Abstract: A satellite reception assembly may comprise a housing configured to support receipt and handling of a plurality of satellite signals. The housing may comprise circuitry incorporating integrated stacking architecture for supporting and/or providing channel and/or band stacking whereby particular channels or bands, from multiple satellite signals that are received via the satellite reception assembly, may be combined onto a single output signal that may be communicated from the satellite reception assembly to a gateway device for concurrent distribution thereby to a plurality of client devices serviced by the gateway device.

Abstract: Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection.

Abstract: Methods and systems are provided for band translation with protection. A signal processing circuitry (chip) may be configured to handle a plurality of signals, comprising at least a first signal corresponding to internal communication within an in-premises network and at least a second signal originating from a source external to the in-premises network; and to process on-chip the plurality of input signals, to generate one or more output signals. In this regard, at least one output signal may comprise components corresponding to the first signal and the second signal; and the processing may be configured to mitigate on-chip, during generating of the one or more outputs, at least one effect of including in the at least one output signal a first component corresponding to one of the first signal and the second signal on a second component corresponding to the other one of the first signal and the second signal.

Abstract: A direct broadcast satellite (DBS) reception assembly may receive a desired satellite signal and process the desired satellite signal for output to a gateway. The DBS assembly may also receive one or more undesired satellite signals and determine a performance metric of the one or more undesired satellite signals. The elevation angle of the assembly and/or the azimuth angle of the assembly may be adjusted based on the performance metric(s) of the undesired satellite signal(s). The adjusting of the elevation angle and/or the azimuth angle may comprise electronically steering a directivity of a receive radiation pattern of the DBS reception assembly and/or mechanically steering one or more components of the assembly via motors, servos, actuators, MEMS, and/or the like. The performance metric may be received signal strength of the undesired signals, received signal strength of the desired signal, SNR of the desired signal, and/or SNR of the undesired signals.

Abstract: Methods and systems are provided for adaptive management of local networks (e.g., in-premises networks, which may access or be connected to cable or satellite networks). A network device (e.g., a gateway device) may be configured to function as a network manager in a local network, to manage internal connections and/or communications within the local network. The managing may comprise assessing effects of the internal connections and/or communications on external connections and/or communications with one or more devices and/or networks external the local network; and setting and/or adjusting based on the assessed effects, one or more communication parameters associated with each one of the internal connections and/or communications.

Abstract: Methods and systems are provided for loop-through for multi-chip communication systems. Receiver circuitry, that is operable to receive one or more input feeds, may comprise a plurality of chips, each of which may be configurable to generate a corresponding output comprising one or more feed elements (e.g., channels) extracted from the input feed(s). However, only a first chip may be operable to handle reception and/or initial processing of the one or more input feeds, with each one of the remaining chips processing a loop-through feed generated by the first chip, in order to generate the corresponding output of that chip. The first chip generates the loop-through feed based on the one or more input feeds, such as after the initial processing thereof in the first chip. Generating the loop-through feed may comprise applying channelization (e.g., separately for each remaining chip), switching based processing, and/or interfacing based processing.

Abstract: An Internet protocol low noise block downconverter (IP LNB) assembly, which may be within a satellite reception assembly, may be operable to determine location information and/or time information of the IP LNB assembly, such as via a global navigation satellite system (GNSS) module in the IP LNB assembly. The IP LNB assembly may provide services based on the determined location information and/or the determined time information of the IP LNB assembly. The IP LNB assembly may communicate the determined location information and/or the determined time information to a wireless communication device for determining location information of the wireless communication device. The IP LNB assembly may determine location information of a wireless source device based on a signal received from the wireless source device, the determined location information and the determined time information of the IP LNB assembly.

Abstract: A satellite reception assembly may comprise a housing configured to support receipt and handling of a plurality of satellite signals. The housing may comprise circuitry incorporating integrated stacking architecture for supporting and/or providing channel and/or band stacking whereby particular channels or bands, from multiple satellite signals that are received via the satellite reception assembly, may be combined onto a single output signal that may be communicated from the satellite reception assembly to a gateway device for concurrent distribution thereby to a plurality of client devices serviced by the gateway device.

Abstract: A dual conversion receiver architecture that converts a radio frequency signal to produce a programmable intermediate frequency whose channel bandwidth and frequency can be changed using variable low-pass filtering to accommodate multiple standards for television and other wireless standards. The dual conversion receiver uses a two stage frequency translation and continual DC offset removal. The dual conversion receiver can be completely implemented on an integrated circuit with no external adjustments.

Abstract: An Internet protocol low noise block downconverter (IP LNB) assembly, within a satellite reception assembly, may be operable to determine location information and/or time information of the IP LNB assembly, via a global navigation satellite system (GNSS) module in the IP LNB assembly. The IP LNB assembly may provide services based on the determined location information and/or the determined time information of the IP LNB assembly. The IP LNB assembly may communicate the determined location information and/or the determined time information to a wireless communication device for determining location information of the wireless communication device. The IP LNB assembly may determine location information of a wireless source device, based on the determined location, information and the determined time information of the IP LNB assembly along with a plurality of other location information and a plurality of corresponding other time information associated with a plurality of other IP LNB assemblies.

Abstract: An Internet protocol low noise block downconverter (IP LNB) assembly, within a satellite reception assembly, may be operable to determine location information and/or time information of the IP LNB assembly, via a global navigation satellite system (GNSS) module in the IP LNB assembly. The IP LNB assembly may provide services based on the determined location information and/or the determined time information of the IP LNB assembly. The IP LNB assembly may communicate the determined location information and/or the determined time information to a wireless communication device for determining location information of the wireless communication device. The IP LNB assembly may determine location information of a wireless source device, based on the determined location information and the determined time information of the IP LNB assembly along with a plurality of other location information and a plurality of corresponding other time information associated with a plurality of other IP LNB assemblies.

Abstract: Methods and systems for improved cross polarization rejection and tolerating of coupling between satellite signals may comprise receiving radio frequency (RF) signals on a chip, where the RF signals comprising a desired signal and at least one crosstalk signal. The received RF signals may be down-converted to baseband frequencies, and the down-converted signals are converted to digital signals. Crosstalk may be determined by estimating complex coupling coefficients between the received RF signals utilizing a de-correlation algorithm across a frequency bandwidth comprising the desired and crosstalk signals. The down-converted signals may be low-pass filtered and summed with an output signal from a cancellation filter. The complex coupling coefficients may be determined utilizing the de-correlation algorithm on the summed signals, and may be used to configure the cancellation filter.

Abstract: An Internet protocol low noise block downconverter (IP LNB) assembly, which is within a satellite reception assembly, may be operable to determine location information and/or time information of the IP LNB assembly. The IP LNB assembly may provide services based on the determined location information and/or the determined time information of the IP LNB assembly. The location information and/or the time information of the IP LNB assembly may be determined via a global navigation satellite system (GNSS) module in the IP LNB assembly. The IP LNB assembly may communicate the determined location information and/or the determined time information to a wireless communication device for determining location information of the wireless communication device. The IP LNB assembly may determine location information of a wireless source device based on a signal received from the wireless source device, the determined location information and the determined time information of the IP LNB assembly.

Abstract: A signal processing circuit, which is within a satellite reception assembly, may be operable to analyze actual frequency information corresponding to a plurality of downconverted signals. Each of the downconverted signals may be downconverted using one or more corresponding local oscillators (LOs). Based on the analyzing, one or more of the following may be determined: one or more frequency offsets associated with the one or more corresponding LOs and one or more actual guard bands. The signal processing circuit may generate information on the determined frequency offsets and the determined actual guard bands. The signal processing circuit may perform, based on the generated information, one or both of a band stacking operation and a channel stacking operation so as to prevent channels/bands being stacked on each other or being overlapped. The signal processing circuit may perform, based on the generated information, frequency corrections for channel tuning in a gateway.

Abstract: A signal reception assembly may comprise a housing configured to support receipt and handling of a plurality of signals, including signals from different sources. The different sources may correspond to satellite and non-satellite (e.g., terrestrial) broadcasts. The signal reception assembly may comprise a satellite reception assembly. The housing may comprise circuitry incorporating an integrated stacking architecture for supporting and/or providing channel and/or band stacking whereby particular channels or bands, from satellite signals that are received via a satellite capturing component (e.g., satellite dish) and from terrestrial signals that are received via a terrestrial reception component (e.g., diversity terrestrial antenna), may be combined onto a single output signal that may be communicated from the signal reception assembly to a gateway device (e.g., STB).

Abstract: A transceiver system may be configured to provide tunable bandwidths. The transceiver may comprise a signal processing component and a filtering component, which may comprise a plurality of filters. The signal processing component may determine one or more adjustments that are applicable to one or both of a first filter that is configured for filtering signals corresponding to a first frequency band associated with a first stream, and a second filter that is configured for filtering signals corresponding to a second frequency band associated with a second stream. The one or more adjustments may correspond to modifications in one or both of the first frequency band and the second frequency band. The one or more adjustments may be communicated to the filtering component, which may apply the adjustments to one or more of the plurality of filters.

Abstract: An electronic device may be operable to sample a signal during an analog-to-digital conversion using an analog-to-digital converter in the electronic device, and the signal may comprise a wide bandwidth and a plurality of channels. The electronic device may adaptively change a sample rate of the sampling to move aliasing out of a region of one or more desired channels of the plurality of channels. The electronic device may change the sample rate using a variable oscillator in the electronic device. The change of the sample rate may comprise, for example, increasing or decreasing the sample rate by a particular percentage. In response to the change of the sample rate, the electronic device may perform, using a variable rate interpolator in the electronic device, variable rate interpolation. The variable rate interpolator may comprise, for example, a finite impulse response filter.