Abstract: The various implementations described herein include systems, methods and/or devices used to enable secure erase in a memory device. In one aspect, the method includes detecting a secure erase trigger. The method further includes determining a secure erase algorithm from among one or more secure erase algorithms to use in accordance with the detected secure erase trigger. The method further includes performing a secure erase operation in accordance with the selected secure erase algorithm, the secure erase operation including: (1) signaling a secure erase condition to a plurality of controllers on the memory device, (2) erasing one or more non-volatile memory devices on the memory device, (3) monitoring the secure erase operation, and (4) recording data related to the secure erase operation.

Abstract: The various implementations described herein include systems, methods and/or devices used to enable power sequencing and a data hardening module in a storage device. In one aspect, the method includes determining whether a power supply voltage provided to the storage device is lower than an under-voltage threshold. The method further includes, in accordance with a determination that the power supply voltage is lower than the under-voltage threshold, performing a power fail operation, the power fail operation including: (1) signaling a power fail condition to a plurality of controllers on the storage device, (2) transferring data held in volatile memory to non-volatile memory, and (3) removing power from the plurality of controllers on the storage device.

Abstract: An apparatus, system, and computer readable medium are disclosed for booting a server from a shared storage system. The present invention teaches at least one server having at least one processor, a storage system having a plurality of storage drives and at least one boot volume corresponding to the at least one server, and a switch fabric having at least one switch; the switch fabric isolates boot traffic form storage traffic and enables communication between the server and the boot volume of the storage system. In some embodiments the switch fabric includes one or more partitionable switches that isolate boot traffic from storage traffic. The boot volumes may be a redundant array of storage devices. In certain embodiments, the present invention also includes devices external to the server, switch fabric, and storage system.

Abstract: A method for managing power consumed by storage systems and other devices is disclosed herein. In certain embodiments, such a method may include initially monitoring conditions (such as data traffic conditions) on a communication link between a first device and a second device. The method may further include determining whether the conditions on the communication link warrant powering down or powering up the second device. In the event the conditions warrant powering down the second device, a power-down command may be generated and transmitted from the first device to the second device. In the event the conditions warrant powering up the second device, a power-up command may be generated and transmitted from the first device to the second device. In selected embodiments, the power-up and power-down commands are one of SCSI commands and FICON commands. A corresponding apparatus, system, and computer-usable medium are also disclosed and claimed herein.

Abstract: In remote power down control of a device configured for externally initiated remote power down, such as over a network, activity of all externally connected sources of valid power down requests for the device is monitored; and the device is powered down in response to a combination of one of a received power down request and an inactivity time out with respect to each of the sources of valid power down requests for the device.

Abstract: A solid state drive includes a first solid state disc controller (SSDC), a second SSDC and a flash array. The flash array includes a first flash port and a second flash port. The first SSDC is configured to connect to the flash array through the first flash port and the second flash array is configured to connect to the flash array through the second flash port.

Abstract: A non-volatile flash memory comprises a plurality of non-volatile memories where a first non-volatile memory is pre-programmed (erased) with all ones, and at least a second non-volatile memory is pre-programmed with a seed value that takes advantage of the reduced programming time for less than six zeros. When writing (programming) a data byte, the memory system looks up the data byte in one or more seed tables to determine a portion of non-volatile memory to which the memory system may write the data byte with a reduced programming time. The memory system then records the location of the data byte in an address translation table so the data byte may be accessed.

Abstract: A solid state drive includes a first solid state disc controller (SSDC), a second SSDC and a flash array. The flash array includes a first flash port and a second flash port. The first SSDC is configured to connect to the flash array through the first flash port and the second flash array is configured to connect to the flash array through the second flash port.

Abstract: A mechanism is provided for firehose dumping modified data in a static random access memory of a hard disk drive to non-volatile memory of the hard disk drive during a power event. Responsive an indication of a power event in the hard disk drive, hard disk drive command processing is suspended. A token is set in the non-volatile storage indicating that flash memory in the non-volatile memory contains modified data. A portion of a static random access memory cache table containing information on the modified data in the static random access memory is copied to the flash memory. The modified data from the static random access memory is then copied to the flash memory. Responsive to a determination that the power event that initiated the copy of the modified data in the static random access memory to the flash memory is still present, the hard disk drive is shut down.

Abstract: A solid state drive includes a first solid state disc controller (SSDC), a second SSDC and a flash array. The flash array includes a first flash port and a second flash port. The first SSDC is configured to connect to the flash array through the first flash port and the second flash array is configured to connect to the flash array through the second flash port. The first SSDC and the second SSDC are both configured to connect to all memory within the flash array and the first SSDC, second SSDC, and flash array are within a common solid state drive.

Abstract: A method is disclosed to set signal compensation settings for a data storage device comprising a first port and a second port, where that first port is interconnected to a first switch via a first communication pathway having a predetermined first length. The method determines first signal compensation settings based upon the first length.

Abstract: The advanced management module services in a data processing system are configured to determine the system load and provide an input to the early power off warning detection logic that evaluates the power system state to detect a condition when power resources are insufficient to maintain the write caching storage system power within defined acceptable limits. The early power off warning detection logic generates a notification based on the system load and the available power supply resources to maintain maximum availability and reliability characteristics.

Abstract: A method to provide a signal using a communication link. The method disposes a passive transponder on the communication link, where that passive transponder includes a memory. The method reads information relating to the communication link from the memory, and then, based upon that information, adjusts certain characteristics of a signal provided using the communication link.

Abstract: A non-volatile flash memory comprises a plurality of non-volatile memories where a first non-volatile memory is pre-programmed (erased) with all ones, and at least a second non-volatile memory is pre-programmed with a seed value that takes advantage of the reduced programming time for less than six zeros. When writing (programming) a data byte, the memory system looks up the data byte in one or more seed tables to determine a portion of non-volatile memory to which the memory system may write the data byte with a reduced programming time. The memory system then records the location,of the data byte in an address translation table so the data byte may be accessed.

Abstract: A mechanism is provided for firehose dumping modified data in a static random access memory of a hard disk drive to non-volatile memory of the hard disk drive during a power event. Responsive an indication of a power event in the hard disk drive, hard disk drive command processing is suspended. A token is set in the non-volatile storage indicating that flash memory in the non-volatile memory contains modified data. A portion of a static random access memory cache table containing information on the modified data in the static random access memory is copied to the flash memory. The modified data from the static random access memory is then copied to the flash memory. Responsive to a determination that the power event that initiated the copy of the modified data in the static random access memory to the flash memory is still present, the hard disk drive is shut down.

Abstract: A solid state drive includes a first solid state disc controller (SSDC), a second SSDC and a flash array. The flash array includes a first flash port and a second flash port. The first SSDC is configured to connect to the flash array through the first flash port and the second flash array is configured to connect to the flash array through the second flash port. The first SSDC and the second SSDC are both configured to connect to all memory within the flash array and the first SSDC, second SSDC, and flash array are within a common solid state drive.

Abstract: An optical communication serial interface is employed to power up a device from a powered down state to a powered on state. An optical receiver element receives serial optical signals transmitted by at least one optical fiber and converts the received serial optical signals to electrical signals. A low level reception converter detects and decodes the electrical signals to provide data and control words from detected and decoded normal electrical signals for a high level command processor. A power supply maintains low level power to at least the optical receiver element and the low level reception converter of the optical communication serial interface while the device is in the powered down state. The low level reception converter detects a particular abnormal sequence of electrical signals; and in response to detecting the particular abnormal sequence of electrical signals, asserts a control signal to power up the device controllable power supply.

Abstract: The advanced management module services in a data processing system are configured to determine the system load and provide an input to the early power off warning detection logic that evaluates the power system state to detect a condition when power resources are insufficient to maintain the write caching storage system power within defined acceptable limits. The early power off warning detection logic generates a notification based on the system load and the available power supply resources to maintain maximum availability and reliability characteristics.

Abstract: A non-volatile flash memory comprises a plurality of non-volatile memories where a first non-volatile memory is pre-programmed (erased) with all ones, and at least a second non-volatile memory is pre-programmed with a seed value that takes advantage of the reduced programming time for less than six zeros. When writing (programming) a data byte, the memory system looks up the data byte in one or more seed tables to determine a portion of non-volatile memory to which the memory system may write the data byte with a reduced programming time. The memory system then records the location of the data byte in an address translation table so the data byte may be accessed.

Abstract: A method for adjusting a drive life and a capacity of a solid state drive (SSD), the SSD comprising a plurality of memory devices includes determining a desired drive life for the SSD; determining a utilization for the SSD; and allocating a portion of the plurality of memory devices as available memory and a portion of the plurality of memory devices as spare memory based on the desired drive life and the utilization. An SSD with an adjustable drive life and capacity includes a plurality of memory devices; and a memory allocation module configured to: determine a desired drive life for the SSD; determine a utilization for the SSD; and allocate a portion of the plurality of memory devices as available memory and a portion of the plurality of memory devices as spare memory based on the desired drive life and the utilization.