Patents by Inventor Gregory Cruzan

Gregory Cruzan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240133943
    Abstract: A testing apparatus comprises a test interface board comprising a plurality of socket interface boards, wherein each socket interface board comprises: a) an open socket to hold a DUT; b) a discrete active thermal interposer comprising thermal properties and operable to make thermal contact with the DUT; c) a superstructure operable to contain the discrete active thermal interposer; and d) an actuation mechanism operable to provide a contact force to bring the discrete active thermal interposer in contact with the DUT.
    Type: Application
    Filed: December 11, 2023
    Publication date: April 25, 2024
    Inventors: Karthik RANGANATHAN, Gregory CRUZAN, Samer KABBANI, Gilberto OSEGUERA, Rohan GUPTE, Homayoun REZAI, Kenneth SANTIAGO, Marc GHAZVINI
  • Patent number: 11940487
    Abstract: An apparatus for thermal control of a device under test (DUT) includes a cooling structure operable to provide cooling, the cooling structure operable to inlet cooling material via an inlet port thereof and operable to outlet cooling material via an outlet port thereof, a variable thermal conductance material (VTCM) layer disposed on a surface of the cooling structure, and a heater layer operable to generate heat based on an electronic control, and wherein the VTCM layer is operable to transfer cooling from the cooling structure to the heater layer. A thermal interface material layer is disposed on the heater layer. The thermal interface material layer is operable to provide thermal coupling and mechanical compliance with respect to the DUT. The apparatus includes a compression mechanism for providing compression to the VTCM layer to vary a thermal conductance of the VTCM layer. The compression mechanism is also for decoupling the VTCM layer from the heater layer.
    Type: Grant
    Filed: January 9, 2023
    Date of Patent: March 26, 2024
    Assignee: Advantest Test Solutions, Inc.
    Inventors: Samer Kabbani, Kazuyuki Yamashita, Ikeda Hiroki, Ira Leventhal, Mohammad Ghazvini, Paul Ferrari, Karthik Ranganathan, Gregory Cruzan, Gilberto Oseguera
  • Publication number: 20240036104
    Abstract: Embodiments of the present invention provide testing systems with liquid cooled thermal arrays that can pivot freely in three dimensions allowing surfaces to be brought into even, level, and secure contact, thereby preventing air gaps between surfaces and improving thermal performance. In this way, more DUTs can be tested in parallel within a small test space, overall costs of the test system are reduced, and greater cooling capacity can be provided for testing high-powered devices. Gimbaled mounts can be disposed on a bottom surface of individual thermal interface boards (TIBs) of a test system, and/or on top of individual thermal heads of a thermal array (TA) having a common cold plate (or having multiple cold plates).
    Type: Application
    Filed: October 10, 2023
    Publication date: February 1, 2024
    Inventors: Gregory Cruzan, Karthik Ranganathan, Gilberto Oseguera, Joe Koeth, Paul Ferrari, James Hastings, Chee Wah Ho
  • Publication number: 20240003967
    Abstract: A stand-alone active thermal interposer device for use in testing an unpackaged integrated circuit device under test (DUT), the active thermal interposer device includes a body layer having a first surface and a second surface, wherein the first surface is operable to be disposed adjacent to a cold plate, and a plurality of heating zones defined across a second surface of the body layer, the plurality of heating zones operable to be controlled by a thermal controller to selectively heat and maintain respective temperatures thereof, the plurality of heating zones operable to heat a plurality of areas of the DUT when the second surface of the body layer is disposed adjacent to an interface surface of the DUT during testing of the DUT.
    Type: Application
    Filed: May 31, 2023
    Publication date: January 4, 2024
    Inventors: Samer Kabbani, Paul Ferrari, Ikeda Hiroki, Kiyokawa Toshiyuki, Gregory Cruzan, Karthik Ranganathan, Todd Berk, Ian Williams, Mohammad Ghazvini, Thomas Jones
  • Patent number: 11852678
    Abstract: Placing a first side of an active thermal interposer device of a thermal management head against a device under test (DUT). Disposing a cold plate against a second side of the active thermal interposer. The DUT includes a plurality of modules and the active thermal interposer device includes a plurality of zones, each zone of the plurality of zones corresponding to a respective module of the plurality of modules and operable to be selectively heated. Receiving a respective set of inputs corresponding to each zone of the plurality of zones. Performing thermal management of the plurality of modules of the DUT by separately controlling temperature of each zone of the plurality of zones by controlling a supply of coolant to the cold plate, and individually controlling heating of each zone of the plurality of zones.
    Type: Grant
    Filed: December 6, 2022
    Date of Patent: December 26, 2023
    Assignee: Advantest Test Solutions, Inc.
    Inventors: Karthik Ranganathan, Gregory Cruzan, Paul Ferrari, Samer Kabbani, Martin Fischer
  • Patent number: 11846669
    Abstract: A stand-alone active thermal interposer device for use in testing a system-in-package device under test (DUT), the active thermal interposer device includes a body layer having a first surface and a second surface, wherein the first surface is operable to be disposed adjacent to a cold plate, and a plurality of heating zones defined across a second surface of the body layer, the plurality of heating zones operable to be controlled by a thermal controller to selectively heat and maintain respective temperatures thereof, the plurality of heating zones operable to heat a plurality of areas of the DUT when the second surface of the body layer is disposed adjacent to an interface surface of the DUT during testing of the DUT.
    Type: Grant
    Filed: June 15, 2022
    Date of Patent: December 19, 2023
    Assignee: Advantest Test Solutions, Inc.
    Inventors: Samer Kabbani, Paul Ferrari, Ikeda Hiroki, Kiyokawa Toshiyuki, Gregory Cruzan, Karthik Ranganathan, Todd Berk, Ian Williams, Mohammad Ghazvini, Thomas Jones
  • Patent number: 11841392
    Abstract: A testing apparatus comprises a test interface board comprising a plurality of socket interface boards, wherein each socket interface board comprises: a) an open socket to hold a DUT; b) a discrete active thermal interposer comprising thermal properties and operable to make thermal contact with the DUT; c) a superstructure operable to contain the discrete active thermal interposer; and d) an actuation mechanism operable to provide a contact force to bring the discrete active thermal interposer in contact with the DUT.
    Type: Grant
    Filed: June 3, 2022
    Date of Patent: December 12, 2023
    Assignee: Advantest Test Solutiions, Inc.
    Inventors: Karthik Ranganathan, Gregory Cruzan, Samer Kabbani, Gilberto Oseguera, Rohan Gupte, Homayoun Rezai, Kenneth Santiago, Marc Ghazvini
  • Publication number: 20230393188
    Abstract: Embodiments of the present invention provide a gimbaling socket structure that uses tension to bring a device under test (DUT) disposed in the socket into secure contact with a liquid cooled thermal array or the like to cool the DUT during testing. The gimbaling socket structure is secured to a tension spring and can move freely in 3 dimensions to bring the surfaces of the DUT and the thermal array (or components thereof, such as TEC/ATI layers) into even, level, and secure contact with each other, thereby preventing air gaps between surfaces and improving thermal performance. The even, secure contact between surfaces improves thermal cooling and reduces variation in cooling efficiency. In this way, more DUTs can be tested in parallel within a small test space, overall costs of the test system are reduced, and greater cooling capacity can be provided for testing high-powered devices.
    Type: Application
    Filed: August 16, 2023
    Publication date: December 7, 2023
    Inventors: Gregory Cruzan, Karthik Ranganathan, Gilberto Oseguera, Joe Koeth, Paul Ferrari, James Hastings, Chee Wah Ho
  • Publication number: 20230393190
    Abstract: A testing apparatus includes a tester rack with a plurality of slots where at least one slot in the tester rack is a dedicated slot operable to receive a test interface board (TIB) from a back of the tester rack, where the back of the tester rack is opposite a front of a tester rack, and where the front of the tester rack faces a handler and a front-facing elevator. The apparatus also includes a handler operable to load devices under test (DUTs) onto the TIB and a front-facing elevator move the TIB from the dedicated slot to an available slot in the tester rack, wherein the available slot includes power electronics operable to connect to the TIB to test devices under test (DUT) disposed on the TIB.
    Type: Application
    Filed: June 2, 2022
    Publication date: December 7, 2023
    Inventors: Karthik Ranganathan, Gregory Cruzan, Gilberto Oseguera, Kiyokawa Toshiyuki, Shigihara Takayuki
  • Patent number: 11835549
    Abstract: Embodiments of the present invention provide testing systems with liquid cooled thermal arrays that can pivot freely in three dimensions allowing surfaces to be brought into even, level, and secure contact, thereby preventing air gaps between surfaces and improving thermal performance. In this way, more DUTs can be tested in parallel within a small test space, overall costs of the test system are reduced, and greater cooling capacity can be provided for testing high-powered devices. Gimbaled mounts are disposed on a bottom surface of individual thermal interface boards (TIBs) of a test system, and/or on top of individual thermal heads of a thermal array (TA) having a common cold plate (or having multiple cold plates).
    Type: Grant
    Filed: January 26, 2022
    Date of Patent: December 5, 2023
    Assignee: Advantest Test Solutions, Inc.
    Inventors: Gregory Cruzan, Karthik Ranganathan, Gilberto Oseguera, Joe Koeth, Paul Ferrari, James Hastings, Chee Wah Ho
  • Patent number: 11808812
    Abstract: A testing apparatus comprises a tester comprising a plurality of racks, wherein each rack comprises a plurality of slots, wherein each slot comprises: (a) an interface board affixed in a slot of a rack, wherein the interface board comprises test circuitry and a plurality of sockets, each socket operable to receive a device under test (DUT); and (b) a carrier comprising an array of DUTs, wherein the carrier is operable to displace into the slot of the rack, and wherein each DUT in the array of DUTs aligns with a respective socket of the plurality of sockets on the interface board. The testing apparatus further comprises a pick-and-place mechanism for loading the array of DUTs into the carrier and an elevator for transporting the carrier to the slot of the rack.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: November 7, 2023
    Assignee: Advantest Test Solutions, Inc.
    Inventors: Karthik Ranganathan, Gregory Cruzan, Samer Kabbani, Gilberto Oseguera, Ira Leventhal, Hiroki Ikeda, Toshiyuki Kiyokawa
  • Publication number: 20230314512
    Abstract: A testing apparatus comprises a tester comprising a plurality of racks, wherein each rack comprises a plurality of slots, wherein each slot comprises: (a) an interface board affixed in a slot of a rack, wherein the interface board comprises test circuitry and a plurality of sockets, each socket operable to receive a device under test (DUT); and (b) a carrier comprising an array of DUTs, wherein the carrier is operable to displace into the slot of the rack, and wherein each DUT in the array of DUTs aligns with a respective socket of the plurality of sockets on the interface board. The testing apparatus further comprises a pick-and-place mechanism for loading the array of DUTs into the carrier and an elevator for transporting the carrier to the slot of the rack.
    Type: Application
    Filed: June 6, 2023
    Publication date: October 5, 2023
    Inventors: Karthik RANGANATHAN, Gregory CRUZAN, Samer Kabbani, Gilberto Oseguera, Ira Leventhal, Hiroki Ikeda, Toshiyuki Kiyokawa
  • Patent number: 11774492
    Abstract: A stand-alone active thermal interposer device for use in testing a system-in-package device under test (DUT), the active thermal interposer device includes a body layer having a first surface and a second surface, wherein the first surface is operable to be disposed adjacent to a cold plate, and a plurality of heating zones defined across a second surface of the body layer, the plurality of heating zones operable to be controlled by a thermal controller to selectively heat and maintain respective temperatures thereof, the plurality of heating zones operable to heat a plurality of areas of the DUT when the second surface of the body layer is disposed adjacent to an interface surface of the DUT during testing of the DUT.
    Type: Grant
    Filed: June 15, 2022
    Date of Patent: October 3, 2023
    Assignee: Advantest Test Solutions, Inc.
    Inventors: Samer Kabbani, Paul Ferrari, Ikeda Hiroki, Kiyokawa Toshiyuki, Gregory Cruzan, Karthik Ranganathan, Todd Berk, Ian Williams, Mohammad Ghazvini, Tom Jones
  • Publication number: 20230296667
    Abstract: Placing a first side of an active thermal interposer device of a thermal management head against a device under test (DUT). Disposing a cold plate against a second side of the active thermal interposer. The DUT includes a die and the active thermal interposer device includes a plurality of zones, each zone of the plurality of zones corresponding to a respective module of the plurality of modules and operable to be selectively heated. Receiving a respective set of inputs corresponding to each zone of the plurality of zones. Performing thermal management of the plurality of modules of the DUT by separately controlling temperature of each zone of the plurality of zones by controlling a supply of coolant to the cold plate, and individually controlling heating of each zone of the plurality of zones.
    Type: Application
    Filed: May 23, 2023
    Publication date: September 21, 2023
    Inventors: Karthik Ranganathan, Gregory Cruzan, Paul Ferrari, Samer Kabbani, Martin Fischer
  • Patent number: 11754620
    Abstract: A stand-alone active thermal interposer device for use in testing a system-in-package device under test (DUT), the active thermal interposer device includes a body layer having a first surface and a second surface, wherein the first surface is operable to be disposed adjacent to a cold plate, and a plurality of heating zones defined across a second surface of the body layer, the plurality of heating zones operable to be controlled by a thermal controller to selectively heat and maintain respective temperatures thereof, the plurality of heating zones operable to heat a plurality of areas of the DUT when the second surface of the body layer is disposed adjacent to an interface surface of the DUT during testing of the DUT.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: September 12, 2023
    Assignee: Advantest Test Solutions, Inc.
    Inventors: Samer Kabbani, Paul Ferrari, Ikeda Hiroki, Kiyokawa Toshiyuki, Gregory Cruzan, Karthik Ranganathan, Todd Berk, Ian Williams, Mohammad Ghazvini, Tom Jones
  • Patent number: 11742055
    Abstract: A testing apparatus comprises a tester comprising a plurality of racks, wherein each rack comprises a plurality of slots, wherein each slot comprises: (a) an interface board affixed in a slot of a rack, wherein the interface board comprises test circuitry and a plurality of sockets, each socket operable to receive a device under test (DUT); and (b) a carrier comprising an array of DUTs, wherein the carrier is operable to displace into the slot of the rack; and (c) an array of POP memory devices, wherein each POP memory device is disposed adjacent to a respective DUT in the array of DUTs. Further, the testing apparatus comprises a pick-and-place mechanism for loading the array of DUTs into the carrier and an elevator for transporting the carrier to the slot of the rack.
    Type: Grant
    Filed: November 9, 2022
    Date of Patent: August 29, 2023
    Assignee: Advantest Test Solutions, Inc.
    Inventors: Karthik Ranganathan, Gregory Cruzan, Samer Kabbani, Gilberto Oseguera, Ira Leventhal
  • Publication number: 20230236241
    Abstract: Embodiments of the present invention provide testing systems with liquid cooled thermal arrays that can pivot freely in three dimensions allowing surfaces to be brought into even, level, and secure contact, thereby preventing air gaps between surfaces and improving thermal performance. In this way, more DUTs can be tested in parallel within a small test space, overall costs of the test system are reduced, and greater cooling capacity can be provided for testing high-powered devices. Gimbaled mounts are disposed on a bottom surface of individual thermal interface boards (TIBs) of a test system, and/or on top of individual thermal heads of a thermal array (TA) having a common cold plate (or having multiple cold plates).
    Type: Application
    Filed: January 26, 2022
    Publication date: July 27, 2023
    Inventors: Gregory Cruzan, Karthik Ranganathan, Gilberto Oseguera, Joe Koeth, Paul Ferrari, James Hastings, Chee Wah Ho
  • Publication number: 20230228812
    Abstract: An apparatus for thermal control of a device under test (DUT) includes a cooling structure operable to provide cooling, the cooling structure operable to inlet cooling material via an inlet port thereof and operable to outlet cooling material via an outlet port thereof, a variable thermal conductance material (VTCM) layer disposed on a surface of the cooling structure, and a heater layer operable to generate heat based on an electronic control, and wherein the VTCM layer is operable to transfer cooling from the cooling structure to the heater layer. A thermal interface material layer is disposed on the heater layer. The thermal interface material layer is operable to provide thermal coupling and mechanical compliance with respect to the DUT. The apparatus includes a compression mechanism for providing compression to the VTCM layer to vary a thermal conductance of the VTCM layer. The compression mechanism is also for decoupling the VTCM layer from the heater layer.
    Type: Application
    Filed: January 9, 2023
    Publication date: July 20, 2023
    Inventors: Samer Kabbani, Kazuyuki Yamashita, Hiroki Ikeda, Ira Leventhal, Mohammad Ghazvini, Paul Ferrari, Karthik Ranganathan, Gregory Cruzan, Gilberto Oseguera
  • Publication number: 20230197185
    Abstract: A testing apparatus comprises a tester comprising a plurality of racks, wherein each rack comprises a plurality of slots, wherein each slot comprises: (a) an interface board affixed in a slot of a rack, wherein the interface board comprises test circuitry and a plurality of sockets, each socket operable to receive a device under test (DUT); and (b) a carrier comprising an array of DUTs, wherein the carrier is operable to displace into the slot of the rack; and (c) an array of POP memory devices, wherein each POP memory device is disposed adjacent to a respective DUT in the array of DUTs. Further, the testing apparatus comprises a pick-and-place mechanism for loading the array of DUTs into the carrier and an elevator for transporting the carrier to the slot of the rack.
    Type: Application
    Filed: February 19, 2023
    Publication date: June 22, 2023
    Inventors: Karthik Ranganathan, Gregory Cruzan, Samer Kabbani, Gilberto Oseguera, Ira Leventhal
  • Patent number: 11674999
    Abstract: A system for testing circuits of an integrated circuit semiconductor wafer includes a tester system for generating signals for input to the circuits and for processing output signals from the circuits for testing the wafer and a test stack coupled to the tester system. The test stack includes a wafer probe for contacting a first surface of the wafer and for probing individual circuits of the circuits of the wafer, a wafer thermal interposer (TI) layer operable to contact a second surface of the wafer and operable to selectively heat areas of the wafer, and a cold plate disposed under the wafer TI layer and operable to cool the wafer. The system further includes a thermal controller for selectively heating and maintaining temperatures of the areas of the wafer by controlling cooling of the cold plate and by controlling selective heating of the wafer TI layer.
    Type: Grant
    Filed: April 20, 2022
    Date of Patent: June 13, 2023
    Assignee: Advantest Test Solutions, Inc.
    Inventors: Samer Kabbani, Paul Ferrari, Ikeda Hiroki, Kiyokawa Toshiyuki, Gregory Cruzan, Karthik Ranganathan