Patents by Inventor Gudrun Stranzl

Gudrun Stranzl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9059273
    Abstract: A method for processing a semiconductor wafer in accordance with various embodiments may include: providing a semiconductor wafer including at least one chip and at least one kerf region adjacent to the at least one chip, the kerf region including at least one auxiliary structure; applying a mask layer to the semiconductor wafer; removing the at least one auxiliary structure in the at least one kerf region; removing the applied mask layer; and separating the semiconductor wafer along the at least one kerf region.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: June 16, 2015
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Petra Fischer, Michael Roesner, Gudrun Stranzl
  • Publication number: 20150147850
    Abstract: Methods for processing a semiconductor workpiece can include providing a semiconductor workpiece that includes one or more kerf regions; forming one or more trenches in the workpiece by removing material from the one or more kerf regions from a first side of the workpiece; mounting the workpiece with the first side to a carrier; thinning the workpiece from a second side of the workpiece; and forming a metallization layer over the second side of the workpiece.
    Type: Application
    Filed: November 25, 2013
    Publication date: May 28, 2015
    Applicant: Infineon Technologies AG
    Inventors: Gudrun Stranzl, Martin Zgaga, Rainer Leuschner, Bernhard Goller, Bernhard Boche, Manfred Engelhardt, Hermann Wendt, Bernd Noehammer, Karl Mayer, Michael Roesner, Monika Cornelia Voerckel
  • Publication number: 20150064877
    Abstract: A method for processing a semiconductor wafer in accordance with various embodiments may include: providing a semiconductor wafer including at least one chip and at least one kerf region adjacent to the at least one chip, the kerf region including at least one auxiliary structure; applying a mask layer to the semiconductor wafer; removing the at least one auxiliary structure in the at least one kerf region; removing the applied mask layer; and separating the semiconductor wafer along the at least one kerf region.
    Type: Application
    Filed: August 30, 2013
    Publication date: March 5, 2015
    Applicant: Infineon Technologies AG
    Inventors: Petra Fischer, Michael Roesner, Gudrun Stranzl
  • Publication number: 20150064879
    Abstract: Various methods and apparatuses are provided relating to separation of a substrate into a plurality of parts. For example, first a partial separation is performed and then the partially separated substrate is completely separated into a plurality of parts.
    Type: Application
    Filed: August 29, 2013
    Publication date: March 5, 2015
    Inventors: Manfred Engelhardt, Gudrun Stranzl, Markus Zundel, Hubert Maier
  • Publication number: 20140357055
    Abstract: A method for processing a semiconductor workpiece is provided, which may include: providing a semiconductor workpiece including a metallization layer stack disposed at a side of the semiconductor workpiece, the metallization layer stack including at least a first layer and a second layer disposed over the first layer, wherein the first layer contains a first material and the second layer contains a second material that is different from the first material; patterning the metallization layer stack, wherein patterning the metallization layer stack includes wet etching the first layer and the second layer by means of an etching solution that has at least substantially the same etching rate for the first material and the second material.
    Type: Application
    Filed: May 28, 2013
    Publication date: December 4, 2014
    Applicant: Infineon Technologies AG
    Inventors: Anja Gissibl, Hermann Wendt, Thomas Fischer, Bernhard Weidgans, Gudrun Stranzl, Tobias Schmidt, Dietrich Bonart
  • Publication number: 20140235035
    Abstract: In one embodiment, a method of forming a semiconductor device includes forming openings in a substrate. The method includes forming a dummy fill material within the openings and thinning the substrate to expose the dummy fill material. The dummy fill material is removed.
    Type: Application
    Filed: April 24, 2014
    Publication date: August 21, 2014
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Gudrun Stranzl, Martin Zgaga, Markus Kahn, Guenter Denifl
  • Publication number: 20140225233
    Abstract: A layer arrangement in accordance with various embodiments may include: a wafer; a passivation disposed over the wafer; a protection layer disposed over at least a surface of the passivation facing away from the wafer; and a mask layer disposed over at least a surface of the protection layer facing away from the wafer, wherein the protection layer includes a material that is selectively etchable to a material of the passivation, and wherein the mask layer includes a material that is selectively etchable to the material of the protection layer.
    Type: Application
    Filed: April 15, 2014
    Publication date: August 14, 2014
    Applicant: Infineon Technologies AG
    Inventors: Joachim HIRSCHLER, Gudrun STRANZL
  • Patent number: 8772133
    Abstract: The various aspects comprise methods and devices for processing a wafer. An aspect of this disclosure includes a wafer. The wafer comprises a plurality of die regions; a plurality of kerf regions between the plurality of die regions; and a metallization area on the plurality of die regions.
    Type: Grant
    Filed: June 11, 2012
    Date of Patent: July 8, 2014
    Assignee: Infineon Technologies AG
    Inventors: Manfred Engelhardt, Martin Zgaga, Karl Adolf Mayer, Gudrun Stranzl
  • Patent number: 8748297
    Abstract: In one embodiment, a method of forming a semiconductor device includes forming openings in a substrate. The method includes forming a dummy fill material within the openings and thinning the substrate to expose the dummy fill material. The dummy fill material is removed.
    Type: Grant
    Filed: April 20, 2012
    Date of Patent: June 10, 2014
    Assignee: Infineon Technologies AG
    Inventors: Gudrun Stranzl, Martin Zgaga, Markus Kahn, Guenter Denifl
  • Patent number: 8748307
    Abstract: A method for processing a wafer in accordance with various embodiments may include: forming a passivation over the wafer; forming a protection layer over at least a surface of the passivation facing away from the wafer, wherein the protection layer includes a material that is selectively etchable to a material of the passivation; forming a mask layer over at least a surface of the protection layer facing away from the wafer, wherein the mask layer includes a material that is selectively etchable to the material of the protection layer; etching the wafer using the mask layer as a mask; selectively etching the material of the mask layer to remove the mask layer from the protection layer, after etching the wafer; and selectively etching the material of the protection layer to remove the protection layer from the passivation, after selectively etching the material of the mask layer.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: June 10, 2014
    Assignee: Infineon Technologies AG
    Inventors: Joachim Hirschler, Gudrun Stranzl
  • Publication number: 20140061873
    Abstract: A method for processing a wafer in accordance with various embodiments may include: forming a passivation over the wafer; forming a protection layer over at least a surface of the passivation facing away from the wafer, wherein the protection layer includes a material that is selectively etchable to a material of the passivation; forming a mask layer over at least a surface of the protection layer facing away from the wafer, wherein the mask layer includes a material that is selectively etchable to the material of the protection layer; etching the wafer using the mask layer as a mask; selectively etching the material of the mask layer to remove the mask layer from the protection layer, after etching the wafer; and selectively etching the material of the protection layer to remove the protection layer from the passivation, after selectively etching the material of the mask layer.
    Type: Application
    Filed: August 31, 2012
    Publication date: March 6, 2014
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Joachim Hirschler, Gudrun Stranzl
  • Publication number: 20130328195
    Abstract: The various aspects comprise methods and devices for processing a wafer. An aspect of this disclosure includes a wafer. The wafer comprises a plurality of die regions; a plurality of kerf regions between the plurality of die regions; and a metallization area on the plurality of die regions.
    Type: Application
    Filed: June 11, 2012
    Publication date: December 12, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Manfred Engelhardt, Martin Zgaga, Karl Adolf Mayer, Gudrun Stranzl
  • Publication number: 20130280888
    Abstract: In one embodiment, a method of forming a semiconductor device includes forming openings in a substrate. The method includes forming a dummy fill material within the openings and thinning the substrate to expose the dummy fill material. The dummy fill material is removed.
    Type: Application
    Filed: April 20, 2012
    Publication date: October 24, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Gudrun Stranzl, Martin Zgaga, Markus Kahn, Guenter Denifl