Abstract: Computer-implemented methods, computer-readable storage media storing instructions and computer systems for labeling significant locations based on contextual data can be implemented to perform operations that include determining a location of a computing device, and determining a label for the determined location based on contextual data associated with the significant location. The location can be a significant location that has meaning to a user of the device.

Abstract: Disclosed is a method for automatically generating interactive test cases. The method comprises: after a UI of an application program is displayed, traversing all views in a view tree corresponding to the UI of the application program, and recording a path, in the view tree, of each view therein that can be clicked on, so as to obtain a set of path information, in the view tree, of all the views that can be clicked on in the UI; and respectively generating a corresponding test case for each piece of path information in the set: in the test case, according to path information, in the view tree, of a view under test, finding the view in the UI interface of the application program, and triggering a click event therefore, that is, completing a click interaction test on the view. In the present invention, there is no strict requirements for the type and the running environment of an application program.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a gate structure, disposed over a substrate; a ferroelectric material, disposed over the gate structure; a source structure and a drain structure, disposed above the ferroelectric material; an isolation, surrounding the source structure and the drain structure; and an oxide semiconductor, surrounding a portion of the isolation between the source structure and the drain structure. A method of manufacturing the semiconductor structure is also provided.

Abstract: A DFOS system and machine learning method that automatically localizes manholes, which forms a key step in a fiber optic cable mapping process. Our system and method utilize weakly supervised learning techniques to predict manhole locations based on ambient data captured along the fiber optic cable route. To improve any non-informative ambient data, we employ data selection and label assignment strategies and verify their effectiveness extensively in a variety of settings, including data efficiency and generalizability to different fiber optic cable routes. We describe post-processing steps that bridge the gap between classification and localization and combining results from multiple predictions.

Abstract: The present disclosure describes a method for forming (i) input/output (I/O) fin field effect transistors (FET) with polysilicon gate electrodes and silicon oxide gate dielectrics integrated and (ii) non-I/O FETs with metal gate electrodes and high-k gate dielectrics. The method includes depositing a silicon oxide layer on a first region of a semiconductor substrate and a high-k dielectric layer on a second region of the semiconductor substrate; depositing a polysilicon layer on the silicon oxide and high-k dielectric layers; patterning the polysilicon layer to form a first polysilicon gate electrode structure on the silicon oxide layer and a second polysilicon gate electrode structure on the high-k dielectric layer, where the first polysilicon gate electrode structure is wider than the second polysilicon gate electrode structure and narrower than the silicon oxide layer. The method further includes replacing the second polysilicon gate electrode structure with a metal gate electrode structure.

Abstract: Provided is Lactobacillus paracasei TCI727, deposited in the Deutsche Sammlung von Mikroorganismen und Zellkulturen GmbH (DSMZ) with a deposit number of DSM 33756. A method for improving calcium absorption of a subject in need thereof by using the Lactobacillus paracasei TCI727 or metabolites thereof is also provided. The method includes administering to the subject an effective amount of a composition comprising the Lactobacillus paracasei TCI727 or the metabolites thereof.

Abstract: A transparent display device is provided. The transparent display device includes a display unit having a circuit area and a transparent area. The display unit includes a plurality of signal lines located in the circuit area, a plurality of pixel circuits electrically connected to the signal lines and located in the circuit area, a plurality of light-emitting elements driven by the pixel circuits and located in the circuit area, and an encapsulation layer located in the circuit area and the transparent area. A first thickness of the encapsulation layer located in the circuit area is different from a second thickness of the encapsulation layer located in the transparent area.

Abstract: A semiconductor device includes a first transistor, a second transistor, and a memory component. The first transistor includes a first silicon layer, a high-k gate dielectric layer above the first silicon layer, a first metal gate above the high-k gate dielectric layer, and first source/drain regions within the first silicon layer. The second transistor includes a second silicon layer, a first silicon oxide layer above the second silicon layer, a plurality of first doped silicon gates above the first silicon oxide layer, a plurality of second doped silicon gates above the first silicon oxide layer and alternately arranged with the plurality of first doped silicon gates, and second source/drain regions within the second silicon layer. The memory component is above the first and second transistors, and electrically coupled to the second source or drain region.

Abstract: A method for treating wastewater containing ertriazole compounds is provided. Hypochlorous acid (HOCl) having a neutral to slightly acidic pH value is added to the wastewater containing triazole compounds for reaction, thereby effectively reacting more than 90% of triazole compounds.

Abstract: A method for evaluating a risk of a subject getting a specific disease includes steps of: storing a reference database that contains original parameter sets; selecting target alleles from an SNP profile derived from genome sequencing data of a subject; selecting target parameter sets from among the original parameter sets; calculating, for each of the target parameter sets, a race factor based on a global risk allele frequency and a group-specific risk allele frequency included in the target parameter set; calculating a genetic factor based on statistics, global reference allele frequencies, the race factors for the target parameter sets, and numbers of chromosomes in homologous chromosome pairs included in the target parameter sets; calculating a citation factor based on numbers of citation times included in the target parameter sets; and calculating a risk score based on the genetic factor and the citation factor.

Abstract: A memory structure includes a plurality of memory cells arranged in an array. Each of the memory cells includes a memory region, a word line portion disposed on a first surface of the memory region, a first conductive block disposed on a second surface of the memory region opposite to the first surface, a second conductive block disposed on the second surface of the memory region, and a third conductive block disposed on the second surface of the memory region such that the third conductive block is disposed between and separated from the first conductive block and the second conductive block.

Abstract: CD93 functional domains for use in treating osteoporosis. A method of alleviating, reducing, suppressing, and/or treating an osteoclast-related bone disease is disclosed. The method comprises administering a therapeutically effective amount of an isolated recombinant protein comprising an amino acid sequence that is at least 80% identical to human Cluster of Differentiation 93 protein domain 1 to a subject in need thereof, the recombinant protein lacking amino acid residues 1 to 21, transmembrane and cytoplasmic domains of the human CD93 (SEQ ID NO: 3) and having a total length of no more than 559 amino acid residues. In one embodiment, the osteoclast-related bone disease is at least one selected from the group consisting of osteoporosis, postmenopausal osteoporosis, osteopenia, bone loss, inflammatory bone loss, and any combination thereof. In another embodiment, the recombinant protein comprises the amino acid sequence of SEQ ID NO: 1 or SEQ ID NO: 2.

Abstract: A defect-reducing coating method is disclosed, which is characterized by making the coating surface of a sample face the bottom of the coating chamber, so that the sticking particles on side walls of the coating chamber will not fall on the coating surface of the sample during the coating process, thereby a smooth coating layer can be formed on the coating surface of the sample after the coating process is finished.

Abstract: A method (of writing to a ferroelectric field-effect transistor (FeFET) configured as a 2-bit storage device that stores two bits, wherein the FeFET includes a first source/drain (S/D) terminal, a second S/D terminal, a gate terminal and a ferroelectric layer, a second bit being at a first end of the ferroelectric layer, the first end being proximal to the first S/D terminal) includes: setting the second bit to a logical 1 value, the setting a second bit including applying a gate voltage to the gate terminal, and applying a first source/drain voltage to the second S/D terminal; and wherein the first source/drain voltage is lower than the gate voltage.

Abstract: A semiconductor device includes a plurality of channel layers vertically separated from one another. The semiconductor device also includes an active gate structure comprising a lower portion and an upper portion. The lower portion wraps around each of the plurality of channel layers. The semiconductor device further includes a gate spacer extending along a sidewall of the upper portion of the active gate structure. The gate spacer has a bottom surface. Moreover, a dummy gate dielectric layer is disposed between the gate spacer and a topmost channel layer of plurality of channel layers. The dummy gate dielectric layer is in contact with a top surface of the topmost channel layer, the bottom surface of the gate spacer, and the sidewall of the gate structure.

Abstract: An integrated circuit (IC) die includes first through third adjacent rows of through-silicon vias (TSVs), and first and second adjacent rows of memory macros. TSVs of the first row of TSVs extend through and are electrically isolated from memory macros of the first row of memory macros. TSVs of the third row of TSVs extend through and are electrically isolated from memory macros of the second row of memory macros.

Abstract: A video decoder can be configured to determine that a current block in a current picture of the video data is coded in an affine prediction mode; determine one or more control-point motion vectors (CPMVs) for the current block; identify an initial prediction block for the current block in a reference picture using the one or more CPMVs; determine a current template for the current block in the current picture; and determine an initial reference template for the initial prediction block in the reference picture; and perform a motion vector refinement process to determine a modified prediction block based on a comparison of the current template to the initial reference template.

Abstract: The present disclosure describes a method for forming polysilicon resistors with high-k dielectrics and polysilicon gate electrodes. The method includes depositing a resistor stack on a substrate having spaced apart first and second isolation regions. Further the method includes patterning the resistor stack to form a polysilicon resistor structure on the first isolation region and a gate structure between the first and second isolation regions, and doping the polysilicon resistor structure to form a doped layer in the polysilicon layer of the polysilicon resistor structure and source-drain regions in the substrate adjacent to the gate structure. Also, the method includes replacing the polysilicon layer in the gate structure with a metal gate electrode to form a transistor structure.

Abstract: Embodiments of the present disclosure relate to zeolites and method for making such zeolites. According to embodiments disclosed herein, a zeolite may have a microporous framework including a plurality of micropores having diameters of less than or equal to 2 nm and a plurality of mesopores having diameters of greater than 2 nm and less than or equal to 50 nm. The microporous framework may include an MFI framework type. The microporous framework may include silicon atoms, aluminum atoms, oxygen atoms, and transition metal atoms. The transition metal atoms may be dispersed throughout the entire microporous framework.

Abstract: In some implementations, one or more semiconductor processing tools may form a metal cap on a metal gate. The one or more semiconductor processing tools may form one or more dielectric layers on the metal cap. The one or more semiconductor processing tools may form a recess to the metal cap within the one or more dielectric layers. The one or more semiconductor processing tools may perform a bottom-up deposition of metal material on the metal cap to form a metal plug within the recess and directly on the metal cap.