Patents by Inventor Han-ku Cho

Han-ku Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240154206
    Abstract: A battery pack includes a battery module including a battery cell stack in which a plurality of battery cells are stacked, a pack frame for accommodating the battery module, a heat sink located between the battery cell stack and the pack frame, and a cooling fin between the two battery cells adjacent to each other. The cooling fin comprises a body part in contact with the battery cell, and an extension part extending to the upper side (z-axis) of the battery cell stack and located adjacent to the heat sink. The extension part has a bent part formed by bending in a direction different from the upper side (z-axis).
    Type: Application
    Filed: July 1, 2022
    Publication date: May 9, 2024
    Applicant: LG ENERGY SOLUTION, LTD.
    Inventors: Han Ki YOON, Young Bum CHO, Sanghyun YU, Hyeok NAMGOUNG, Wonhoe KU, Ji Won JEONG
  • Patent number: 8895226
    Abstract: Provided are a coating composition for deep ultraviolet (DUV) filtering during an extreme ultraviolet (EUV) exposure, the coating composition including about 100 parts by weight of a solvent including a first solvent (the first solvent being an alcoholic solvent); and about 0.05 parts by weight to about 5 parts by weight of a coating polymer having a degree of absorption of about 50%/?m or greater with respect to 193-nm incident light.
    Type: Grant
    Filed: March 24, 2014
    Date of Patent: November 25, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Woo Kim, Hai-Sub Na, Chil-Hee Chung, Han-Ku Cho
  • Publication number: 20140205950
    Abstract: Provided are a coating composition for deep ultraviolet (DUV) filtering during an extreme ultraviolet (EUV) exposure, the coating composition including about 100 parts by weight of a solvent including a first solvent (the first solvent being an alcoholic solvent); and about 0.05 parts by weight to about 5 parts by weight of a coating polymer having a degree of absorption of about 50%/?m or greater with respect to 193-nm incident light.
    Type: Application
    Filed: March 24, 2014
    Publication date: July 24, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: HYUN-WOO KIM, HAI-SUB NA, CHIL-HEE CHUNG, HAN-KU CHO
  • Patent number: 8715911
    Abstract: Provided are a coating composition for deep ultraviolet (DUV) filtering during an extreme ultraviolet (EUV) exposure, the coating composition including about 100 parts by weight of a solvent including a first solvent (the first solvent being an alcoholic solvent); and about 0.05 parts by weight to about 5 parts by weight of a coating polymer having a degree of absorption of about 50%/?m or greater with respect to 193-nm incident light.
    Type: Grant
    Filed: July 22, 2011
    Date of Patent: May 6, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-woo Kim, Hai-sub Na, Chil-hee Chung, Han-ku Cho
  • Patent number: 8551759
    Abstract: An oligomer probe array having improved reaction yield is provided. The oligomer probe array includes a substrate, an immobilization layer on the substrate, a plurality of nano particles coupled with a surface of the immobilization layer, and a plurality of oligomer probes coupled with surfaces of the nano particles.
    Type: Grant
    Filed: March 15, 2007
    Date of Patent: October 8, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-hwan Hah, Sung-min Chi, Kyoung-seon Kim, Won-sun Kim, Han-ku Cho, Sang-jun Choi, Man-hyoung Ryoo
  • Patent number: 8278221
    Abstract: A method of forming hard mask employs a double patterning technique. A first hard mask layer is formed on a substrate, and a first sacrificial pattern is formed on the first hard mask layer by photolithography. Features of the first sacrificial pattern are spaced from one another by a first pitch. A second hard mask layer is then formed conformally on the first sacrificial pattern and the first hard mask layer so as to delimit recesses between adjacent features of the first sacrificial pattern. Upper portions of the second hard mask layer are removed to expose the first sacrificial pattern, and the exposed first sacrificial pattern and the second sacrificial pattern are removed. The second hard mask layer and the first hard mask layer are then etched to form a hard mask composed of residual portions of the first hard mask layer and the second hard mask layer.
    Type: Grant
    Filed: July 13, 2011
    Date of Patent: October 2, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Cha-won Koh, Han-ku Cho, Jeong-lim Nam, Gi-sung Yeo, Joon-soo Park, Ji-young Lee
  • Publication number: 20120021355
    Abstract: Provided are a coating composition for deep ultraviolet (DUV) filtering during an extreme ultraviolet (EUV) exposure, the coating composition including about 100 parts by weight of a solvent including a first solvent (the first solvent being an alcoholic solvent); and about 0.05 parts by weight to about 5 parts by weight of a coating polymer having a degree of absorption of about 50%/?m or greater with respect to 193-nm incident light.
    Type: Application
    Filed: July 22, 2011
    Publication date: January 26, 2012
    Inventors: Hyun-woo Kim, Hai-sub Na, Chil-hee Chung, Han-ku Cho
  • Publication number: 20110269294
    Abstract: A method of forming hard mask employs a double patterning technique. A first hard mask layer is formed on a substrate, and a first sacrificial pattern is formed on the first hard mask layer by photolithography. Features of the first sacrificial pattern are spaced from one another by a first pitch. A second hard mask layer is then formed conformally on the first sacrificial pattern and the first hard mask layer so as to delimit recesses between adjacent features of the first sacrificial pattern. Upper portions of the second hard mask layer are removed to expose the first sacrificial pattern, and the exposed first sacrificial pattern and the second sacrificial pattern are removed. The second hard mask layer and the first hard mask layer are then etched to form a hard mask composed of residual portions of the first hard mask layer and the second hard mask layer.
    Type: Application
    Filed: July 13, 2011
    Publication date: November 3, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Cha-won Koh, Han-ku Cho, Jeong-lim Nam, Gi-sung Yeo, Joon-soo Park, Ji-young Lee
  • Patent number: 8026044
    Abstract: A method of forming fine patterns on a semiconductor substrate includes forming a first pattern, including first line patterns having a feature size F and an arbitrary pitch P, and forming a second pattern, including second line patterns disposed between adjacent first line patterns, to form a fine pattern having a half pitch P/2, the first and second line patterns being repeated in the first direction. A gap is formed in at least one first line pattern in a second direction, perpendicular to the first direction, to connect second line patterns positioned on each side of the first line pattern through the gap. At least one jog pattern, extending in the first direction, is formed from at least one first line pattern adjacent to the connected second line patterns. The jog pattern causes a gap in at least one of the connected second line patterns in the second direction.
    Type: Grant
    Filed: July 24, 2007
    Date of Patent: September 27, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Doo-youl Lee, Han-ku Cho, Suk-joo Lee, Gi-sung Yeo, Pan-suk Kwak, Min-jong Hong
  • Patent number: 8013375
    Abstract: A semiconductor memory device may include a semiconductor substrate having a plurality of active regions wherein each active region has a length in a direction of a first axis and a width in a direction of a second axis. The length may be greater than the width, and the plurality of active regions may be provided in a plurality of columns in the direction of the second axis. A plurality of wordline pairs may be provided on the substrate, with each wordline pair crossing active regions of a respective column of active regions defining a drain portion of each active region between wordlines of the respective wordline pair.
    Type: Grant
    Filed: May 13, 2009
    Date of Patent: September 6, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Duo-Hoon Goo, Han-Ku Cho, Joo-Tac Moon, Sang-Gyun Woo, Gi-Sung Yeo, Kyoung-Yun Baek
  • Patent number: 8013374
    Abstract: A semiconductor memory device may include a substrate having a plurality of active regions wherein each active region has a length in a direction of a first axis and a width in a direction of a second axis. The length may be greater than the width, and the plurality of active regions may be provided in a plurality of columns of active regions in the direction of the second axis. A plurality of wordline pairs may be provided on the substrate, with each wordline pair crossing active regions of a respective column of active regions defining a drain portion of each active region between wordlines of the respective wordline pair. A plurality of bitlines on the substrate may cross the plurality of wordline pairs, with each bitline being electrically coupled to a respective drain portion of an active region of each column, and with each bitline being arranged between the respective drain portion and another drain portion of an adjacent active region of the same column.
    Type: Grant
    Filed: May 13, 2009
    Date of Patent: September 6, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Doo-Hoon Goo, Han-Ku Cho, Joo-Tae Moon, Sang-Gyun Woo, Gi-Sung Yeo, Kyoung-Yun Baek
  • Patent number: 8003543
    Abstract: A method of forming hard mask employs a double patterning technique. A first hard mask layer is formed on a substrate, and a first sacrificial pattern is formed on the first hard mask layer by photolithography. Features of the first sacrificial pattern are spaced from one another by a first pitch. A second hard mask layer is then formed conformally on the first sacrificial pattern and the first hard mask layer so as to delimit recesses between adjacent features of the first sacrificial pattern. Upper portions of the second hard mask layer are removed to expose the first sacrificial pattern, and the exposed first sacrificial pattern and the second sacrificial pattern are removed. The second hard mask layer and the first hard mask layer are then etched to form a hard mask composed of residual portions of the first hard mask layer and the second hard mask layer.
    Type: Grant
    Filed: April 14, 2010
    Date of Patent: August 23, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Cha-won Koh, Han-ku Cho, Jeong-lim Nam, Gi-sung Yeo, Joon-soo Park, Ji-young Lee
  • Publication number: 20110177437
    Abstract: Provided are a compensating mask, a multi-optical system using the compensating mask, and a method of compensating for a 3-dimensional (3-D) mask effect using the compensating mask. Methods of compensating for a 3-D mask effect using a compensating mask may include generating a first kernel corresponding to a normal mask used for forming a minute pattern, generating a second kernel corresponding to a compensating mask, mixing the first kernel corresponding to the normal mask with the second kernel corresponding to the compensating mask, and generating a multi-optical system kernel corresponding to mixing the first kernel and the second kernel.
    Type: Application
    Filed: April 4, 2011
    Publication date: July 21, 2011
    Inventors: Sung-soo Suh, Suk-joo Lee, Han-ku Cho, Yong-jin Chun, Sung-woo Lee, Young-chang Kim
  • Patent number: 7940373
    Abstract: Provided are a compensating mask, a multi-optical system using the compensating mask, and a method of compensating for a 3-dimensional (3-D) mask effect using the compensating mask. Methods of compensating for a 3-D mask effect using a compensating mask may include generating a first kernel corresponding to a normal mask used for forming a minute pattern, generating a second kernel corresponding to a compensating mask, mixing the first kernel corresponding to the normal mask with the second kernel corresponding to the compensating mask, and generating a multi-optical system kernel corresponding to mixing the first kernel and the second kernel.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: May 10, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-soo Suh, Suk-joo Lee, Han-ku Cho, Yong-jin Chun, Sung-woo Lee, Young-chang Kim
  • Patent number: 7900170
    Abstract: An optical proximity correction (OPC) system and methods thereof are provided. The example OPC system may include an integrated circuit (IC) layout generation unit generating an IC layout, a database unit storing a first plurality of OPC models, each of the first plurality of OPC models associated with one of a plurality of target specific characteristics and a mask layout generation unit including a model selector selecting a second plurality of OPC models based on a comparison between the target specific characteristics associated with the plurality of OPC models and the generated IC layout, the mask layout generation unit generating a mask layout based on the IC layout and the selected second plurality of OPC models.
    Type: Grant
    Filed: October 24, 2006
    Date of Patent: March 1, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Soo Suh, Young-Seog Kang, Han-Ku Cho, Sang-Gyun Woo
  • Patent number: 7873935
    Abstract: A method of manufacturing a mask includes designing a first mask data pattern, designing a second mask data pattern for forming the first mask data pattern, acquiring a first emulation pattern, which is predicted from the second mask data pattern, using layout-based Self-Aligning Double Patterning (SADP) emulation, comparing the first emulation pattern with the first mask data pattern, and modifying the second mask data pattern according to results of the comparison. The method further includes performing Optical Proximity Correction (OPC) on the modified second mask data pattern, acquiring second emulation patterns, which are predicted from the second mask data pattern on which the OPC has been performed, using image-based SADP emulation, and comparing the second emulation patterns and the first mask data pattern and manufacturing a first mask layer, which corresponds to the second mask data pattern on which the OPC has been performed, according to the results of the comparison.
    Type: Grant
    Filed: June 14, 2007
    Date of Patent: January 18, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-gon Jung, Ji-young Lee, Han-ku Cho, Gi-sung Yeo
  • Patent number: 7842450
    Abstract: A method of forming a semiconductor device includes forming a first mask pattern on a target layer, the first mask pattern exposing a first portion of the target layer, forming an intermediate material layer, including depositing an intermediate material layer film on a side of the first mask pattern and the first portion of the target layer, and thinning the intermediate material layer film to form the intermediate material layer, forming a second mask pattern that exposes a second portion of the intermediate material layer, removing the exposed second portion of the intermediate material layer to expose the target layer, and patterning the target layer using the first and second mask patterns as patterning masks.
    Type: Grant
    Filed: February 28, 2007
    Date of Patent: November 30, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Doo-youl Lee, Suk-joo Lee, Yool Kang, Han-ku Cho, Chang-jin Kang, Jae-ok Yoo, Sung-chan Park
  • Publication number: 20100290285
    Abstract: Provided are a flash memory device and a method of manufacturing the same. The flash memory device includes strings. Each of the strings has a string selection line, a ground selection line, and an odd number of word lines formed between the string selection line and the ground selection line.
    Type: Application
    Filed: July 29, 2010
    Publication date: November 18, 2010
    Inventors: Doo-youl Lee, Han-ku Cho, Suk-joo Lee, Gi-sung Yeo, Cha-won Koh, Pan-suk Kwak
  • Patent number: 7807318
    Abstract: A reflective photomask for EUV light is disclosed. The reflective photomask may include a projecting pattern selectively formed on a substrate and a reflective layer on the substrate and the projecting pattern.
    Type: Grant
    Filed: January 23, 2007
    Date of Patent: October 5, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Hong Park, Han-Ku Cho, Seong-Sue Kim, Sang-Gyun Woo, Suk-Joo Lee
  • Patent number: 7799490
    Abstract: An optical mask for use with an exposure beam includes a mask substrate adapted to be placed on a traveling path of the exposure beam. A reference pattern is formed on the mask substrate. The reference pattern is adapted to direct the exposure beam to travel in a predetermined reference direction. A comparative pattern is formed on the mask substrate. The comparative pattern is adapted to direct the exposure beam to travel in a direction inclined at a predetermined angle with respect to the reference direction.
    Type: Grant
    Filed: January 12, 2010
    Date of Patent: September 21, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chan Hwang, Suk-Joo Lee, Han-Ku Cho, Sang-Gyun Woo