Abstract: A method includes forming a transistor over a substrate; forming a front-side interconnection structure over the transistor; after forming the front-side interconnection structure, removing the substrate; after removing the substrate, forming a backside via to be electrically connected to the transistor; depositing a dielectric layer to cover the backside via; forming an opening in the dielectric layer to expose the backside via; forming a spacer structure on a sidewall of the opening; after forming a spacer structure, forming a conductive feature in the opening to be electrically connected to the backside via; and after forming the conductive feature, forming an air gap in the spacer structure.

Abstract: A method for extracting entities comprises obtaining a document that includes a series of textual fields that includes a plurality of entities. Each entity represents information associated with a predefined category. The method includes generating, using the document, a series of tokens representing the series of textual fields. The method includes generating an entity prompt that includes the series of tokens and one of the plurality of entities and generating a schema prompt that includes a schema associated with the document. The method includes generating a model query that includes the entity prompt and the schema prompt and determining, using an entity extraction model and the model query, a location of the one of the plurality of entities among the series of tokens. The method includes extracting, from the document, the one of the plurality of entities using the location of the one of the plurality of entities.

Abstract: A wound capacitor package structure includes a wound assembly, a conductive assembly, a package assembly, a bottom seat plate and a pin protection assembly. The conductive assembly includes a first and a second conductive pin. The package assembly is configured for enclosing the wound assembly. The bottom seat plate is disposed on a bottom side of the package assembly. The pin protection assembly includes a first pin protection layer configured to partially cover the first conductive pin, and a second pin protection layer configured to partially cover the second conductive pin. The first conductive pin includes a first exposed portion exposed outside the package assembly, and the second conductive pin includes a second exposed portion exposed outside the package assembly. The first and the second pin protection layer are disposed on the first and the second exposed portion for protecting the first and the second conductive pin, respectively.

Abstract: The invention provides a power supply including at least one power output port, at least one status alert component, and at least one output port status monitoring module. The status alert component generates at least one visual prompt based on an alert signal. The output port status monitoring module includes at least one temperature sensor adjacent to the power output port, a microcontroller connected to the temperature sensor and sensing an output current from the power output port, and a reset signal generator connected to the microcontroller. The microcontroller comprises at least one port status alert condition that takes a temperature and the output current of the power output port as decision factors. The microcontroller outputs the alert signal to the status alert component when the port status alert condition is met and maintains the status until a reset signal provided by the reset signal generator is received.

Abstract: Various embodiments of the present disclosure are directed towards a method for forming an integrated chip (IC). The method includes forming a first fin of semiconductor material and a second fin of semiconductor material within a semiconductor substrate. A gate structure is formed over the first fin and source/drain regions are formed on or within the first fin. The source/drain regions are formed on opposite sides of the gate structure. One or more pick-up regions are formed on or within the second fin. The source/drain regions respectively have a first width measured along a first direction parallel to a long axis of the first fin and the one or more pick-up regions respectively have a second width measured along the first direction. The second width is larger than the first width.

Abstract: Aspects of the disclosure relate to order processing. A computing platform may determine that order processing for a subset of a plurality of trading pairs should be migrated from a source computing platform to a destination computing platform. The destination computing platform may configure itself to process first trading pair, and may enter a proxy mode where orders for the subset of the plurality of trading pairs are routed to the destination computing platform. The destination computing platform may receive and load order processing information corresponding to the subset of the plurality of trading pairs, and may direct the source computing platform to cease processing for the subset of the plurality of trading pairs. The destination computing platform may disable the proxy for the source computing platform, and may receive orders/process for the subset of the plurality of trading pairs.

Abstract: A pixel detection device includes a data line, a pixel circuit, and a detection circuit. Pixel circuit is coupled to a system high voltage source, a system low voltage source, and a first reference voltage source. Detection circuit is coupled to data line and pixel circuit, and is configured to receive a driving signal and a detection control signal. Detection circuit forms a first detection loop with the system low voltage source and the data line so as to detect whether the pixel circuit is abnormal according to the driving signal and the detection control signal in a first stage. Detection circuit forms a second detection loop with the first reference voltage source, the system low voltage source, the pixel circuit, and the data line so as to detect whether the pixel circuit is abnormal according to the driving signal and the detection control signal in a second stage.

Abstract: Provided are FinFET devices and methods of forming the same. A dummy gate having gate spacers on opposing sidewalls thereof is formed over a substrate. A dielectric layer is formed around the dummy gate. An upper portion of the dummy gate is removed and upper portions of the gate spacers are removed, so as to form a first opening in the dielectric layer. A lower portion of the dummy gate is removed to form a second opening below the first opening. A metal layer is formed in the first and second openings. The metal layer is partially removed to form a metal gate.

Abstract: A semiconductor device structure and a method for forming a semiconductor device structure are provided. The semiconductor device structure includes a stack of channel structures over a base structure. The semiconductor device structure also includes a first epitaxial structure and a second epitaxial structure sandwiching the channel structures. The semiconductor device structure further includes a gate stack wrapped around each of the channel structures and a backside conductive contact connected to the second epitaxial structure. A first portion of the backside conductive contact is directly below the base structure, and a second portion of the backside conductive contact extends upwards to approach a bottom surface of the second epitaxial structure. In addition, the semiconductor device structure includes an insulating spacer between a sidewall of the base structure and the backside conductive contact.

Abstract: Systems and techniques are provided for part segmentation. For example, a process for performing part segmentation can include obtaining a three-dimensional capture of an object. The method can include generating one or more two-dimensional images of the object from the three-dimensional capture of the object. The method can further include processing the one or more two-dimensional images of the object to generate at least one two-dimensional bounding box associated with a part of the object. The method can include performing three-dimensional part segmentation of the part of the object based on a three-dimensional point cloud generated from the one or more two-dimensional images of the object and the at least one two-dimensional bounding box and based on semantically labeled super points which are merged into subgroups associated with the part of the object.

Abstract: The present disclosure describes a method to form a backside power rail (BPR) semiconductor device with an air gap. The method includes forming a fin structure on a first side of a substrate, forming a source/drain (S/D) region adjacent to the fin structure, forming a first S/D contact structure on the first side of the substrate and in contact with the S/D region, and forming a capping structure on the first S/D contact structure. The method further includes removing a portion of the first S/D contact structure through the capping structure to form an air gap and forming a second S/D contact structure on a second side of the substrate and in contact with the S/D region. The second side is opposite to the first side.

Abstract: A control method for preparing crop nutrient solution, applied in a regulating device, obtains growth data of crops, and determines a growth state of the crops according to the growth data of the crops. The proportion of the nutrient solution required by the crops is determined according to the growth states of the crops, and the culture solution is adjusted according to the proportion of the nutrient solution. After a preset time period, updated growth state of the crops is determined. When the culture solution does not meet the proportion of the nutrient solution corresponding to the updated growth state, the culture solution is adjusted again until the culture solution meet the proportion of the nutrient solution corresponding to the growth state of the crops.

Abstract: Structural members and methods for manufacturing a plastic-based, bulk, antimicrobial structural member of a robot. Such bulk antimicrobial plastic solution can meet the hygienic requirement and the mechanical performance requirement of a structural member of a robot simultaneously. Meanwhile, it may reduce the overall weight of the robot.

Abstract: Various examples are provided related to continuous control of exoskeletons. In one example, a method includes obtaining IMU sensor signals associated with an exoskeleton attached to a limb of a subject; generating an exoskeleton control signal in response to the IMU sensor signals, the exoskeleton control signal generated by a control policy neural network trained offline from the exoskeleton using musculoskeletal human modeling and exoskeletal modeling with dynamics randomization; and controlling joint torques of the exoskeleton exerted on the subject based upon the exoskeleton control signal.

Abstract: Embodiments of the present disclosure relates to a method for forming a semiconductor device structure. The method includes including forming one or more conductive features in a first interlayer dielectric (ILD), forming an etch stop layer on the first ILD, forming a second ILD over the etch stop layer, forming one or more openings through the second ILD and the etch stop layer to expose a top surface of the one or more first conductive features, wherein the one or more openings are formed by a first etch process in a first process chamber, exposing the one or more openings to a second etch process in a second process chamber so that the shape of the or more openings is elongated, and filling the one or more openings with a conductive material.

Abstract: Embodiments of the present disclosure provide semiconductor device structures and methods of forming the same. The structure includes a first source/drain region disposed under a well portion, a second source/drain region disposed adjacent the first source/drain region, a dielectric material disposed between the first and second source/drain regions, and a conductive contact having a first portion disposed under the first source/drain region and a second portion disposed adjacent the first source/drain region. The second portion is disposed in the dielectric material. The structure further includes a conductive feature disposed in the dielectric material, and the conductive feature is electrically connected to the conductive contact. The conductive feature has a top surface that is substantially coplanar with a top surface of the well portion.

Abstract: Various examples are provided related to control of a wearable robot without torque sensors. In one example, a method includes generating a control signal for a quasi-direct-drive (QDD) actuator of the wearable robot and adjusting operation of the QDD actuator based upon the control signal. The control signal can be determined by a collocated controller using current and angle of rotation of the QDD actuator and a reference trajectory angle. In another example, a wearable robot includes a support structure that can interface with a user; a quasi-direct-drive (QDD) actuator coupled to the support structure; and processing circuitry that can generate a control signal for the QDD actuator, the control signal determined by a collocated controller based upon current and angle of rotation of the QDD actuator and a reference trajectory angle and adjust operation of the QDD actuator based upon the control signal.

Abstract: A keyboard device includes plural keycaps, a base plate, plural connecting elements and a circuit board. The plural connecting elements are connected with the respective keycaps and the base plate. The circuit board is located over the base plate. The circuit board includes plural membrane switches and plural first capacitance sensing units. When one of the first capacitance sensing units detects an approaching conductor or detects a motion of the conductor, a driving signal is generated or a control signal is outputted.

Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.

Abstract: A memory device includes a substrate, a first transistor and a second transistor, a first word line, a second word line, and a bit line. The first transistor and the second transistor are over the substrate and are electrically connected to each other, in which each of the first and second transistors includes first semiconductor layers and second semiconductor layers, a gate structure, and source/drain structures, in which the first semiconductor layers are in contact with the second semiconductor layers, and a width of the first semiconductor layers is narrower than a width of the second semiconductor layers. The first word line is electrically connected to the gate structure of the first transistor. The second word line is electrically connected to the gate structure of the second transistor. The bit line is electrically connected to a first one of the source/drain structures of the first transistor.