Patents by Inventor Hao Wang

Hao Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11980016
    Abstract: A semiconductor device according to the present disclosure includes a gate extension structure, a first source/drain feature and a second source/drain feature, a vertical stack of channel members extending between the first source/drain feature and the second source/drain feature along a direction, and a gate structure wrapping around each of the vertical stack of channel members. The gate extension structure is in direct contact with the first source/drain feature.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Chuan Yang, Chia-Hao Pao, Yu-Kuan Lin, Lien-Jung Hung, Ping-Wei Wang, Shih-Hao Lin
  • Patent number: 11978669
    Abstract: The present disclosure provides a semiconductor structure. The structure includes a semiconductor substrate, a gate stack over a first portion of a top surface of the semiconductor substrate; and a laminated dielectric layer over at least a portion of a top surface of the gate stack. The laminated dielectric layer includes at least a first sublayer and a second sublayer. The first sublayer is formed of a material having a dielectric constant lower than a dielectric constant of a material used to form the second sublayer and the material used to form the second sublayer has an etch selectivity higher than an etch selectivity of the material used to form the first sublayer.
    Type: Grant
    Filed: January 4, 2022
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Lin Chuang, Chia-Hao Chang, Sheng-Tsung Wang, Lin-Yu Huang, Tien-Lu Lin, Yu-Ming Lin, Chih-Hao Wang
  • Patent number: 11978782
    Abstract: The present disclosure relates to a hybrid integrated circuit. In one implementation, an integrated circuit may have a first region with a first gate structure having a ferroelectric gate dielectric, at least one source associated with the first gate of the first region, and at least one drain associated with the first gate structure of the first region. Moreover, the integrated circuit may have a second region with a second gate structure having a high-? gate dielectric, at least one source associated with the second gate structure of the second region, and at least one drain associated with the second gate structure of the second region. The integrated circuit may further have at least one trench isolation between the first region and the second region.
    Type: Grant
    Filed: June 9, 2022
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Yi Chuang, Ching-Wei Tsai, Kuan-Lun Cheng, Chih-Hao Wang
  • Patent number: 11974595
    Abstract: A method for testing burning performance of a dark-colored cigarette using a dark-colored cigarette paper is provided. The dark-colored cigarette paper has a grayscale less than 255. The method includes: simulating, by a robotic arm, a cigarette smoking process and environment; acquiring, by a full-vision camera system, an image of a burn line and ash column region of the dark-colored cigarette; and analyzing a burning performance indicator of the dark-colored cigarette according to coordinate information of the burn line and ash column region. The method is based on a surface reflection characteristic of the dark-colored cigarette paper and a principle of optical reflection to light and highlight an edge of the dark-colored cigarette sample by a light source at a certain angle from a side. In this way, the method forms a chromatic aberration to localize the dark-colored cigarette sample, thereby testing the burning performance of the dark-colored cigarette sample.
    Type: Grant
    Filed: September 20, 2022
    Date of Patent: May 7, 2024
    Assignee: CHINA TOBACCO YUNNAN INDUSTRIAL CO., LTD
    Inventors: Han Zheng, Jianbo Zhan, Hao Wang, Zhenhua Yu, Jiao Xie, Xu Wang, Ying Zhang, Tao Wang, Baoshan Yue, Tingting Yu, Jiang Yu, Liwei Li, Jing Zhang
  • Patent number: 11976361
    Abstract: An apparatus and method for depositing a transition metal nitride film on a substrate by atomic layer deposition in a reaction space defined by an at least one chamber wall and showerhead is disclosed. The apparatus may include, a substrate support disposed within the reaction space, the substrate support configured for supporting at least one substrate and a temperature control system for controlling a temperature of the at least one chamber wall at those portions of the at least one chamber wall that is exposed to a vapor phase reactant. The apparatus may also include a temperature control system for controlling a temperature of the showerhead, wherein the temperature control system for controlling a temperature of the showerhead is configured to control the temperature of the showerhead to a temperature of between approximately 80° C. and approximately 160° C.
    Type: Grant
    Filed: April 6, 2022
    Date of Patent: May 7, 2024
    Assignee: ASM IP Holding B.V.
    Inventors: Eric James Shero, Robert Brennan Milligan, William George Petro, Eric Wang, Fred Alokozai, Dong Li, Hao Wang, Melvin Verbaas, Luping Li
  • Patent number: 11978802
    Abstract: Provided are FinFET devices and methods of forming the same. A dummy gate having gate spacers on opposing sidewalls thereof is formed over a substrate. A dielectric layer is formed around the dummy gate. An upper portion of the dummy gate is removed and upper portions of the gate spacers are removed, so as to form a first opening in the dielectric layer. A lower portion of the dummy gate is removed to form a second opening below the first opening. A metal layer is formed in the first and second openings. The metal layer is partially removed to form a metal gate.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Wei Hsu, Chih-Hao Wang, Huan-Chieh Su, Wei-Hao Wu, Zhi-Chang Lin, Jia-Ni Yu
  • Patent number: 11978736
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip (IC). The IC includes a first fin projecting vertically from a semiconductor substrate. A second fin projects vertically from the semiconductor substrate, where the second fin is spaced from the first fin, and where the first fin has a first uppermost surface that is disposed over a second uppermost surface of the second fin. A nanostructure stack is disposed over the second fin and vertically spaced from the second fin, where the nanostructure stack comprises a plurality of vertically stacked semiconductor nanostructures. A pair of first source/drain regions is disposed on the first fin, where the first source/drain regions are disposed on opposite sides of an upper portion of the first fin. A pair of second source/drain regions is disposed on the second fin, where the second source/drain regions are disposed on opposite sides of the nanostructure stack.
    Type: Grant
    Filed: May 2, 2022
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hao Wang, Min Cao, Shang-Wen Chang
  • Patent number: 11978773
    Abstract: A semiconductor device structure and a method for forming a semiconductor device structure are provided. The semiconductor device structure includes a stack of channel structures over a base structure. The semiconductor device structure also includes a first epitaxial structure and a second epitaxial structure sandwiching the channel structures. The semiconductor device structure further includes a gate stack wrapped around each of the channel structures and a backside conductive contact connected to the second epitaxial structure. A first portion of the backside conductive contact is directly below the base structure, and a second portion of the backside conductive contact extends upwards to approach a bottom surface of the second epitaxial structure. In addition, the semiconductor device structure includes an insulating spacer between a sidewall of the base structure and the backside conductive contact.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Shih-Chuan Chiu, Cheng-Chi Chuang, Chih-Hao Wang
  • Patent number: 11977301
    Abstract: A liquid crystal display panel is provided. The liquid crystal display panel includes: a first substrate and a second substrate arranged opposite to each other, and a liquid crystal layer and a plurality of strip-shaped spacers disposed between the first substrate and the second substrate. In the liquid crystal display panel, there is an overlapping area between an orthographic projection of a first signal line on a target base and an orthographic projection of a second signal line on the target base, and an orthographic projection of the strip-shaped spacer on the target base is not overlapped with the overlapping area.
    Type: Grant
    Filed: March 31, 2023
    Date of Patent: May 7, 2024
    Assignees: Beijing BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Jinshuai Duan, Xiaojuan Wu, Hongliang Yuan, Wei Zhao, Yao Bi, Jiaxing Wang, Hao Yan, Li Tian, Liping Lei
  • Patent number: 11975415
    Abstract: An aeronautical aluminum alloy minimum-quantity-lubrication milling machining device includes a machine tool worktable and spindle connected with a machine tool power system. The spindle is connected with a tool holder that is fixed with a cutting tool. The machine tool worktable is provided with a machine tool fixture, the tool holder is connected with a minimum-quantity-lubrication mechanism, the machine tool fixture includes a fixture body that is fixedly provided with a limit block for contact with two adjacent side surfaces of a workpiece, the fixture body is provided with a plurality of clamping elements capable of pressing the workpiece against an upper surface of the fixture body, and a top of the clamping element is provided with a detection member for detecting a relative position between the clamping element and the spindle. The device can avoid interference and contact between a nozzle and the clamping element.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: May 7, 2024
    Assignees: QINGDAO UNIVERSITY OF TECHNOLOGY, SHANXI JINZHAO AVIATION TECHNOLOGY CO., LTD.
    Inventors: Min Yang, Hao Ma, Changhe Li, Xifeng Wu, Yixue Han, Yuying Yang, Xin Cui, Xufeng Zhao, Naiqing Zhang, Qidong Wu, Teng Gao, Yanbin Zhang, Bingheng Lu, Mingzheng Liu, Dongzhou Jia, Xiaowei Zhang, Xiaoming Wang
  • Publication number: 20240142664
    Abstract: Two types of blue light blocking contact lenses are provided and are formed by curing different compositions. The first composition includes a blue light blocking component formed by mixing or reacting a first hydrophilic monomer and a yellow dye, a first colored dye component formed by mixing or reacting a second hydrophilic monomer and a first colored dye, at least one third hydrophilic monomer, a crosslinker, and an initiator. The first colored dye includes a green dye, a cyan dye, a blue dye, an orange dye, a red dye, a black dye, or combinations thereof. The second composition includes a blue light blocking component, at least one hydrophilic monomer, a crosslinker, and an initiator. The blue light blocking component is formed by mixing or reacting glycerol monomethacrylate and a yellow dye. Further, methods for preparing the above contact lenses are provided.
    Type: Application
    Filed: February 12, 2023
    Publication date: May 2, 2024
    Inventors: Han-Yi CHANG, Chun-Han CHEN, Tsung-Kao HSU, Wei-che WANG, Yu-Hung LIN, Wan-Ying GAO, Li-Hao LIU
  • Publication number: 20240143455
    Abstract: A virtual machine backup method, performed by a first host, includes: capturing a request to write data from a virtual machine to a hard disk image file, wherein the request includes written data and input and output location information, copying the written data to a temporary storage area, calculating a first key of the written data, storing the first key, the input and output location information into a first resource location structure, pausing an operation of the virtual machine and generating a second resource location structure according to the first resource location structure, the first key and a second key, and outputting a backup data set to a second host according to the second resource location structure, wherein the backup data set includes the second resource location structure and only one of existing data and the written data when the first key and the second key are the same.
    Type: Application
    Filed: May 15, 2023
    Publication date: May 2, 2024
    Applicant: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Lee Chung CHEN, Li Hao CHIANG, Gin CHI, Wei Jie HSU, Jiann Wen WANG, Wen Dwo HWANG
  • Publication number: 20240140957
    Abstract: Provided herein are Bridged Compounds having the following structures: wherein R1a, R1b, R1c, R1d, R2a, R2b, R2c, R2d, R3a, R3b, R3c, R3d, R4, R5, R6, R7, R8, m1, m2, m3, n2, n3, n4, q, X1, X2, Y1, Y2, L1 and ring A are as defined herein, compositions comprising an effective amount of a Bridged Compound, and methods for treating or preventing various diseases, e.g., pancreatic cancer, or a condition treatable or preventable by inhibition of the function of KRAS protein. In another aspect, a Bridged Compound is useful for treating or preventing a condition treatable or preventable by inhibition of the function of KRAS protein with G12D mutation. In another aspect, a Bridged Compound is useful for treating or preventing a condition treatable or preventable by inhibition of a RAS/MAPK pathway.
    Type: Application
    Filed: January 7, 2022
    Publication date: May 2, 2024
    Inventors: Qi JI, Chao YU, Ce WANG, Hanzi sun, Hao YUAN, Zhiwei WANG
  • Publication number: 20240143332
    Abstract: This application provides an exception locating method includes: A first device receives a first exception signal which changes abruptly from a first communication signal when the first communication signal passes through a location of an exception on a first line. The first device receives exception alarm information which is sent by the second device after the second device receives a second exception signal, the second exception signal is a signal that changes abruptly from a second communication signal when the second communication signal passes through the location of the exception. The first device determines the location of the exception based on a first time interval, where the first time interval is an interval between time at which the first exception signal is received and time at which the exception alarm information is received.
    Type: Application
    Filed: December 19, 2023
    Publication date: May 2, 2024
    Inventors: Wei WU, Jianfeng WANG, Jinhui WANG, Hao LI
  • Publication number: 20240141767
    Abstract: A method of improving a field operation that comprises a gas injection may include assessing a plurality of potential injection gases against a plurality of values of a plurality of parameters associated with a plurality of samples, where each of the plurality of potential injection gases comprises an acidic component, and where the plurality of parameters comprises fluid chemistry parameters and rock properties. The method may also include determining a proposed injection gas from among the plurality of potential injection gases for the field operation that comprises the gas injection to be performed using a first wellbore in fluidic communication with a first subterranean formation, a second wellbore in fluidic communication with the first subterranean formation, a third wellbore in fluidic communication with a second subterranean formation, or any combination thereof.
    Type: Application
    Filed: October 31, 2023
    Publication date: May 2, 2024
    Inventors: Wei Wang, Wei Wei, Johannes Orlando Alvarez Ortiz, Guo-Qing Tang, Hao Sun, Dengen Zhou, Kelly Marie Krezinski, Chao Yan, Christopher Adam Griffith, Jon Edward Burger
  • Publication number: 20240141488
    Abstract: Embodiments of the present disclosure generally relate to a substrate support having a surface coating which reduces defect formation and back side metal contamination during substrate processing. A support body includes a body having an outer surface and a surface coating formed from a non-metal or a reduced-metal material disposed over at least a top surface of the outer surface of the body. In an embodiment, the surface coating includes a two-part coating having an optional first coating layer formed over an entire outer surface of the support body.
    Type: Application
    Filed: October 27, 2022
    Publication date: May 2, 2024
    Inventors: David JORGENSEN, Songjae LEE, Hao WANG, Yi-Chiau HUANG, Christopher BEAUDRY
  • Publication number: 20240141929
    Abstract: This invention discloses a pneumatic and cable-driven hybrid artificial muscle, comprising pneumatic actuator, pneumatic pressure regulating assembly, and cable drive assembly. The pneumatic pressure regulating assembly is connected to the pneumatic actuator to regulate air pressure in the pneumatic actuator for controlling the pneumatic actuator to extend or contract. The cable actuation assembly comprises a cable fixedly connected to the pneumatic actuator for controlling the pneumatic actuator to contract. In this invention, the artificial muscle employs a dual pneumatic and cable actuation mechanism. By leveraging the inherent stiffness of the pneumatic actuator, it can provide substantial actuation force for joint movement. Simultaneously, the cable actuation assembly can provide significant pulling force, effectively ensuring safety in human-machine interaction and offering sufficient bidirectional aiding force to individuals with disabilities who use the artificial muscle as an aiding actuation device.
    Type: Application
    Filed: October 4, 2023
    Publication date: May 2, 2024
    Inventors: Yong HU, Xiao Dong LI, De Hao DUAN MU, Xiao Jun WANG, Xiang CAO
  • Publication number: 20240145540
    Abstract: A semiconductor device includes a first active region, a second active region and a dielectric wall. The second active region disposed adjacent to the first active region, and there is a first space between the first active region and the second active region. The dielectric wall is formed within the first space and has a first sidewall and a second sidewall opposite to the first sidewall. The first sidewall and the second sidewall opposite to the first sidewall continuously extend along a plane.
    Type: Application
    Filed: January 20, 2023
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shi Ning JU, Kuo-Cheng CHIANG, Guan-Lin CHEN, Jung-Chien CHENG, Chih-Hao WANG
  • Publication number: 20240141922
    Abstract: A heat dissipation system of an electronic device including a body, a plurality of heat sources disposed in the body, and at least one centrifugal heat dissipation fan disposed in the body is provided. The centrifugal heat dissipation fan includes a housing and an impeller disposed in the housing on an axis. The housing has at least one inlet on the axis and has a plurality of outlets in different radial directions, and the plurality of outlets respectively correspond to the plurality of heat sources.
    Type: Application
    Filed: January 9, 2024
    Publication date: May 2, 2024
    Applicant: Acer Incorporated
    Inventors: Tsung-Ting Chen, Wen-Neng Liao, Cheng-Wen Hsieh, Yu-Ming Lin, Wei-Chin Chen, Chun-Chieh Wang, Shu-Hao Kuo
  • Publication number: 20240145562
    Abstract: The present disclosure describes a method to form a backside power rail (BPR) semiconductor device with an air gap. The method includes forming a fin structure on a first side of a substrate, forming a source/drain (S/D) region adjacent to the fin structure, forming a first S/D contact structure on the first side of the substrate and in contact with the S/D region, and forming a capping structure on the first S/D contact structure. The method further includes removing a portion of the first S/D contact structure through the capping structure to form an air gap and forming a second S/D contact structure on a second side of the substrate and in contact with the S/D region. The second side is opposite to the first side.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Zhen YU, Lin-Yu HUANG, Cheng-Chi CHUANG, Chih-Hao WANG, Huan-Chieh SU