Abstract: A structure for coupling an optical signal between an integrated circuit photonic structure and an external optical fiber is disclosed as in a method of formation. The coupling structure is sloped relative to a horizontal surface of the photonic structure such that light entering or leaving the photonic structure is substantially normal to its upper surface.

Abstract: Embodiments may relate to a wavelength-division multiplexing (WDM) transceiver that has a silicon waveguide layer coupled with a silicon nitride waveguide layer. In some embodiments, the silicon waveguide layer may include a tapered portion that is coupled with the silicon nitride waveguide layer. In some embodiments, the silicon waveguide layer may be coupled with a first oxide layer with a first z-height, and the silicon nitride waveguide layer may be coupled with a second oxide layer with a second z-height that is greater than the first z-height. Other embodiments may be described or claimed.

Abstract: A device includes a layer including a first III-Nitride (III-N) material, a channel layer including a second III-N material, a release layer including nitrogen and a transition metal, where the release layer is between the first III-N material and the second III-N material. The device further includes a polarization layer including a third III-N material above the release layer, a gate structure above the polarization layer, a source structure and a drain structure on opposite sides of the gate structure where the source structure and the drain structure each include a fourth III-N material. The device further includes a source contact on the source structure and a drain contact on the drain structure.

Abstract: A structure for coupling an optical signal between an integrated circuit photonic structure and an external optical fiber is disclosed as in a method of formation. The coupling structure is sloped relative to a horizontal surface of the photonic structure such that light entering or leaving the photonic structure is substantially normal to its upper surface.

Abstract: Technologies for beam expansion and collimation for photonic integrated circuits (PICs) are disclosed. In one embodiment, an ancillary die is bonded to a PIC die. Vertical couplers in the PIC die direct light from waveguides to flat mirrors on a top side of the ancillary die. The flat mirrors reflect the light towards curved mirrors defined in the bottom surface of the ancillary die. The curved mirrors collimate the light from the waveguides. In another embodiment, a cavity is formed in a PIC die, and curved mirrors are formed in the cavity. Light beams from waveguides in the PIC die are directed to the curved mirrors, which collimate the light beams.

Abstract: Embodiments herein relate to an apparatus for use in a hybrid laser. The apparatus may include a silicon substrate and a waveguide to facilitate transmission of an optical signal in a first direction that is orthogonal to a surface of the silicon substrate. The apparatus may further include a metal shunt that is less than or equal to 10 micrometers from the waveguide in a second direction that is orthogonal to the surface of the silicon substrate and orthogonal to the first direction. Other embodiments may be described and/or claimed.

Abstract: Embodiments may include or relate to an optical coupler. The optical coupler may include a silicon nitride (SiN) waveguide. The waveguide may be formed by placing SiN on an epitaxially grown silicon structure that is then removed subsequent to placement of the SiN. Other embodiments may be described and/or claimed.

Abstract: Silicon photonic integrated circuit (PIC) on a multi-zone semiconductor on insulator (SOI) substrate having at least a first zone and a second zone. Various optical devices of the PIC may be located above certain substrate zones that are most suitable. A first length of a photonic waveguide structure comprises the crystalline silicon and is within the first zone, while a second length of the waveguide structure is within the second zone. Within a first zone, the crystalline silicon layer is spaced apart from an underlying substrate material by a first thickness of dielectric material. Within the second zone, the crystalline silicon layer is spaced apart from the underlying substrate material by a second thickness of the dielectric material.

Abstract: A photodetector structure over a partial length of a silicon waveguide structure within a photonic integrated circuit (PIC) chip. The photodetector structure is embedded within a cladding material surrounding the waveguide structure. The photodetector structure includes an absorption region, for example comprising Ge. A sidewall of the cladding material may be lined with a sacrificial spacer. After forming the absorption region, the sacrificial spacer may be removed and passivation material formed over a sidewall of the absorption region. Between the absorption region an impurity-doped portion of the waveguide structure there may be a carrier multiplication region, for example comprising crystalline silicon. If present, edge facets of the carrier multiplication region may be protected by a spacer material during the formation of an impurity-doped charge carrier layer. Occurrence of edge facets may be mitigated by embedding a portion of the photodetector structure with a thickness of the waveguide structure.

Abstract: Technologies for silicon diffraction gratings are disclosed. In some embodiments, grating lines of the diffraction gratings may have several sub-lines that make up each grating line of the diffraction grating. The sub-lines may be sub-wavelength features. In some embodiments, several silicon diffraction gratings may be made from a wafer, such as a wafer with a diameter of 300 millimeters. The wafer may be etched precisely across the entire wafer, leading to a high yield of the diffraction gratings.

Abstract: Systems and methods for testing a photonic IC (PIC) with an optical probe having an out-of-plane edge coupler to convey test signals between the out-of-plane probe and an edge coupled photonic waveguide within a plane of the PIC. To accommodate dimensions of the optical probe, a test trench may be fabricated in the PIC near an edge coupler of the waveguide. The optical probe may be displaced along one or more axes relative to a prober to position a free end of the prober within the test trench and to align the probe's out-of-plane edge coupler with an edge coupler of a PIC waveguide. Accordingly, a PIC may be probed at the wafer-level, without first dicing a wafer into PIC chips or bars. The optical probe may be physically coupled to a prober through a contact sensor to detect and/or avoid physical contact between probe and PIC.

Abstract: An apparatus comprising a substrate; a waveguide above the substrate; and an undercut into the substrate, the undercut beneath at least a portion of the waveguide, wherein a magnitude of a maximum length of the undercut is lower than a magnitude of a maximum depth of the undercut.

Abstract: A device includes a layer including a first III-Nitride (III-N) material, a channel layer including a second III-N material, a release layer including nitrogen and a transition metal, where the release layer is between the first III-N material and the second III-N material. The device further includes a polarization layer including a third III-N material above the release layer, a gate structure above the polarization layer, a source structure and a drain structure on opposite sides of the gate structure where the source structure and the drain structure each include a fourth III-N material. The device further includes a source contact on the source structure and a drain contact on the drain structure.

Abstract: Embedded three-dimensional electrode capacitors, and methods of fabricating three-dimensional electrode capacitors, are described. In an example, an integrated circuit structure includes a first metallization layer above a substrate, the first metallization layer having a first conductive structure in a first dielectric layer, the first conductive structure having a honeycomb pattern. An insulator structure is on the first conductive structure of the first metallization layer. A second metallization layer is above the first metallization layer, the second metallization layer having a second conductive structure in a second dielectric layer, the second conductive structure on the insulator structure, and the second conductive structure having the honeycomb pattern.

Abstract: Optical receiver packages and device assemblies that include photodetector (PD) chips having focus lenses monolithically integrated on PD die backsides are disclosed. An example receiver package includes a support structure, a PD die, and an optical input device. The PD die includes a PD, integrated proximate to a first face of the PD die, and further includes a lens, integrated on, or proximate to, an opposite second face. The first face of the PD die faces the support structure, while the second face (“backside”) faces the optical input device. The optical receiver architectures described herein may provide an improvement for the optical alignment tolerance issues, especially for high-speed operation in which the active aperture of the PD may have to be very small. Furthermore, architectures described herein advantageously enable integrating a focus lens in a PD die that may be coupled to the support structure in a flip-chip arrangement.

Abstract: In embodiments, an optoelectronic apparatus may include a substrate with a first side and a second side opposite the first side; a photodetector disposed on the first side of the substrate, the photodetector to convert a light signal into an electrical signal; and a dielectric metasurface lens etched into the second side of the substrate, the dielectric metasurface lens to collect incident light and focus it through the substrate onto the photodetector.

Abstract: There is disclosed in one example a fiberoptic communication device, including: a modulator to modulate data onto a laser pulse; and a semiconductor laser source including an active optical waveguide to provide optical gain and support an optical mode, the laser source further including a V-shaped current channel superimposed on the optical waveguide, and disposed to feed the active optical waveguide with electrical current along its length, the current channel having a proximate end to the optical mode, the proximate end having a width substantially matching a diameter of the optical mode, and a removed end from the optical mode, wherein the removed end is substantially wider than the proximate end.

Abstract: A device includes a layer including a first III-Nitride (III-N) material, a channel layer including a second III-N material, a release layer including nitrogen and a transition metal, where the release layer is between the first III-N material and the second III-N material. The device further includes a polarization layer including a third III-N material above the release layer, a gate structure above the polarization layer, a source structure and a drain structure on opposite sides of the gate structure where the source structure and the drain structure each include a fourth III-N material. The device further includes a source contact on the source structure and a drain contact on the drain structure.

Abstract: A device includes a layer including a first III-Nitride (III-N) material, a channel layer including a second III-N material, a release layer including nitrogen and a transition metal, where the release layer is between the first III-N material and the second III-N material. The device further includes a polarization layer including a third III-N material above the release layer, a gate structure above the polarization layer, a source structure and a drain structure on opposite sides of the gate structure where the source structure and the drain structure each include a fourth III-N material. The device further includes a source contact on the source structure and a drain contact on the drain structure.

Abstract: Embodiments include apparatuses, methods, and systems including a semiconductor photonic device having a waveguide disposed above a substrate. The waveguide has a first section including amorphous silicon with a first refractive index, and a second section including crystalline silicon with a second refractive index different from the first refractive index. The semiconductor photonic device further includes a heat element at a vicinity of the first section of the waveguide. The heat element is arranged to generate heat to transform the amorphous silicon of the first section of the waveguide to partially or completely crystallized crystalline silicon with a third refractive index. The amorphous silicon in the first section may be formed with silicon lattice defects caused by an element implanted into the first section. Other embodiments may also be described and claimed.