Abstract: A method of forming a via structure is provided. In the method, a dielectric layer is formed on an anti-reflective coating (ARC) layer covering a first metal layer; and a nitride layer is formed on the dielectric layer. An ultra-thin photoresist layer is formed on the nitride layer, and the ultra-thin photoresist layer is patterned with short wavelength radiation to define a pattern for a via. The patterned ultra-thin photoresist layer is used as a mask during a first etch step to transfer the via pattern to the nitride layer. The first etch step includes an etch chemistry that is selective to the nitride layer over the ultra-thin photoresist layer and the dielectric layer. The nitride layer is employed as a hard mask during a second etch step to form a contact hole corresponding to the via pattern by etching portions of the dielectric layer.

Abstract: A system for regulating reticle temperature is provided. The system includes a reticle for use in a lithographic process and a chuck assembly for supporting the reticle. The chuck assembly includes: a backplate having front and back surfaces, the front surface engaging with a backside of the reticle; and a thermoelectric cooling system operatively coupled to the backplate for regulating temperature of at least a portion of the reticle via heat conduction through the backplate. The chuck assembly also includes a temperature sensing system coupled to the backplate for sensing temperature of at least a portion of the reticle via heat conduction through the backplate; and a heat sink operatively coupled to the thermoelectric cooling system. A voltage driver operatively is coupled to the thermoelectric cooling system, the voltage driver provides a bias voltage to drive the thermoelectric cooling system.

Abstract: A method of forming an alignment mark protection structure is disclosed and includes forming an alignment mark protection layer over a substrate which has an alignment mark associated therewith. The method also includes forming a negative photoresist layer over the alignment mark protection layer and removing a portion of the negative photoresist layer which does not overlie the alignment mark. The removal exposes a portion of the alignment mark protection layer which does not overlie the alignment mark and the exposed portion of the alignment mark protection layer is then removed. Preferably, the removal of a portion of the negative photoresist includes selectively exposing a peripheral portion thereof using an edge-bead removal tool, thereby allowing for the formation of an alignment mark protection structure without an extra masking step.

Abstract: In one embodiment, the present invention relates to a method of forming a metal line, involving the steps of providing a semiconductor substrate comprising a metal layer, an oxide layer over the metal layer, and a silicon nitride layer over the oxide layer; depositing an ultra-thin photoresist over the silicon nitride layer, the ultra-thin photoresist having a thickness less than about 2,000 .ANG.; irradiating the ultra-thin photoresist with electromagnetic radiation having a wavelength of about 250 nm or less; developing the ultra-thin photoresist exposing a portion of the silicon nitride layer; etching the exposed portion of the silicon nitride layer exposing a portion of the oxide layer; etching the exposed portion of the oxide layer exposing a portion of the metal layer; and etching the exposed portion of the metal layer thereby forming the metal line.

Abstract: A method (100) of separating linewidth variations due to reticle generation defects from other linewidth variations at a substrate surface during a pattern transfer process includes generating (102) a test reticle (200) having a first plurality of structures (204) forming a first pattern (202). The method further includes measuring a dimension (104) of two or more of the first plurality of structures (204) on the test reticle (200), thereby creating (106) a first data set representing linewidth variations due to the test reticle generation. A second pattern is transferred (108) to the surface of the substrate, wherein the second pattern includes a second plurality of structures which substantially correspond to the first plurality of structures and a dimension of two or more of the second plurality of structures (110) are measured, thereby creating (112) a second data set representing the linewidth variations at the surface of the substrate.

Abstract: A method and apparatus wherein the height over the complete surface of interest on a wafer/material is scanned and mapped, using either a central or non-central focus system. The type of data gathered is similar to that which is normally acquired in operation of the particular focusing system indicative of the wafer/material surface height. The difference is that according to the present invention, a much larger number of data points are sampled and then processed in a novel manner to provide improved focus information. These data are stored and used to calculate corrections in both the vertical position/height and tilt of the material/wafer for each exposure field, such as the areas (34) in FIGS. 5b and 6b. The invention sorts out selected height data indicating periodic variations in surface height.

Abstract: An improved integrated circuit structure is disclosed wherein a first metal layer is coated with a dielectric material and another metal layer is applied over the dielectric layer and a via electrically interconnects at least a portion of the first metal layer with at least a portion of the second metal layer. The via is formed having a lower first width dimension adjacent the first metal layer and an upper enlarged width portion adjacent the second metal layer formed by masking the dielectric with a mask having an opening conforming to the first dimension and isotropically etching the dielectric through the mask to provide the enlarged portion adjacent the upper surface of the dielectric.