Abstract: A semiconductor package and a manufacturing method prevent electrical shorts that otherwise result from bonding wires contacting the edge of a semiconductor chip. An insulating region at the edge of a semiconductor chip prevents the shorts. One method for forming the insulating region leaves a polyimide layer on the scribe area of a wafer and cuts through the polyimide layer. To avoid chipping, the cutting uses a fine grit blade and a slow cutting rate. An alternative process removes the polyimide from the scribe area and forms the insulating region on the edge of the semiconductor chip. A potting method can deposit the insulating region on a semiconductor chip after cutting a wafer and after attaching a separated chip to a substrate. Alternatively, plotting or printing can apply insulating material on the wafer. A cutting process then cuts through the insulating material and the wafer and leaves insulating regions on each separated chip.

Abstract: A die collet for a semiconductor chip having an exposed electrical structure, the die collet including a body having a vacuum line connected thereto, the die collet including a plurality of parts each having a vacuum hole communicating with the vacuum line. Apparatus for bonding a semiconductor chip to a lead frame, the apparatus including a first die collet for picking up the semiconductor chip, on aligning stage for receiving the semiconductor chip from the first pickup tool and aligning the semiconductor chip. A second die collet picks up the semiconductor chip from the aligning stage and places the semiconductor chip on a lead frame. The first and second die collets are constructed as described above.

Abstract: An apparatus for bonding semiconductor dies to lead frame strips, each of the lead frame strips having a plurality of adjacently spaced lead frame units. The apparatus includes at least two bond units, each attaching the dies to one of the lead frame strips at a time and one die supply unit supplying the dies alternately to the bond units. The apparatus also includes at least two lead frame strip supply units, each supplying the lead frame strips to respective ones of the bond units.

Abstract: A semiconductor device package includes a semiconductor chip and a plurality of inner leads, each having at least one slot formed along an upper surface of the inner lead. An adhesive layer is used to attach a bottom surface of the semiconductor chip to the upper surface of the inner lead. An encapsulant is allowed to flow in a package body mold, around the inner leads and through the slot. The slots prevent the production of turbulence along a side surface of the inner lead opposite to the flow direction, thereby avoiding problems associated with incomplete encapsulation such as the internal voids.

Abstract: An improved mold for forming a semiconductor package, having a molding compound injection gate having a height not greater than the thickness of the lead frame of the semiconductor assembly placed in the mold.

Abstract: A die bonding apparatus for separating a chip from a tested wafer including a plurality of chips and attaching the chip to a lead frame comprising a chip-transferring part for separating the chip from the wafer and transferring the chip to a place where a lead frame is prepared for die bonding; a stage where the transferred chip is placed; a bond head for compressing the chip and the lead frame to bond them together; and a lead frame-transferring part for transferring the lead frame to a predetermined place, the chip-transferring part being comprised of a first rectilinearly moving picking tool and a second revolving picking tool.