Patents by Inventor Hendrich M. Hernandez

Hendrich M. Hernandez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9491265
    Abstract: A protocol processing system includes a plurality of communication interfaces. A control head-end is operable to receive a protocol processing engine identifier over a network through one of the communication interfaces from an external system. A plurality of optimized protocol processing engines are coupled to the control head-end, and the control head-end is operable to select a first optimized protocol processing engine from the plurality of optimized protocol processing engines that is identified by the protocol processing engine identifier. In response to being selected, the first optimized protocol processing engine handles communications between an application processing system and the external system.
    Type: Grant
    Filed: November 13, 2015
    Date of Patent: November 8, 2016
    Assignee: Dell Products L.P.
    Inventors: Eric Alan Kuzmack, Hendrich M. Hernandez, Robert Lee Winter, Geng Lin
  • Publication number: 20160266637
    Abstract: In accordance with embodiments of the present disclosure, an information handling system may include a processor, a network interface communicatively coupled to the processor, a management controller communicatively coupled to the processor and configured to provide management of the information handling system via a communications channel physically isolated from the network interface, and a controller. The controller may be configured to filter for a packet indicative of a request to remotely reset the management controller and, in response to receiving the packet indicative of the request to remotely reset the management controller, perform a reset of the management controller.
    Type: Application
    Filed: March 13, 2015
    Publication date: September 15, 2016
    Inventors: Wade Andrew Butcher, Elie Antoun Jreij, Timothy M. Lambert, Hendrich M. Hernandez
  • Publication number: 20160269283
    Abstract: An information handling system includes a memory and a first controller. The memory stores a mapping table. The first controller is configured to communicate with the memory.
    Type: Application
    Filed: March 12, 2015
    Publication date: September 15, 2016
    Inventors: Dinesh K. Ragupathi, Yogesh P. Kulkarni, Wade A. Butcher, Hendrich M. Hernandez
  • Publication number: 20160234095
    Abstract: Systems and methods for systems and methods for bare-metal network topology discovery. In an illustrative, non-limiting embodiment, an Information Handling System (IHS) may include a processor and a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution by the processor, cause the IHS to: receive network topology information from a server, wherein the server is configured to collect at least one portion of the network topology information from one or more network devices via a baseboard management controller (BMC) circuit while the server operates in low-power mode; and provide a graphical display representing the network topology information, the graphical display including a representation of the server, the one or more network devices, and one or more connections between the server and the one or more network devices.
    Type: Application
    Filed: February 6, 2015
    Publication date: August 11, 2016
    Applicant: DELL PRODUCTS, L.P.
    Inventors: Sudhir Vittal Shetty, Hendrich M. Hernandez, Michael Brundridge, Chandrasekhar Puthillathe
  • Publication number: 20160182689
    Abstract: A network adapter, includes a first transceiver module with a transceiver that operates according to a first network protocol and a memory element that includes information that identifies the first network protocol, a second transceiver module with a transceiver that operates according to a second network protocol and a memory element that includes information that identifies the second network protocol, and a controller that reads the information from the first memory element, directs an information handling system to invoke a first network driver associated with the first network protocol based upon the information, reads the second information from the second memory element, and directs the information handling system to invoke a second network driver associated with the second network protocol based upon the second information.
    Type: Application
    Filed: December 23, 2014
    Publication date: June 23, 2016
    Inventors: Jonathan F. Lewis, Hendrich M. Hernandez, Wade Andrew Butcher, Kevin A. Hughes
  • Publication number: 20160182389
    Abstract: An Ethernet device includes receive buffers and transmit buffers of a port, and a processor. The buffers are each associated with a respective class of service. The processor operates to determine a current buffer utilization in a receive buffer, determine that the current buffer utilization is different than a buffer threshold for the receive buffer, determine a data rate limit for the class of service associated with the receive buffer based upon the difference between the current buffer utilization and the buffer threshold, and send a data rate limit frame to another device coupled to the port. The data rate limit frame includes the data rate limit for the class of service.
    Type: Application
    Filed: February 29, 2016
    Publication date: June 23, 2016
    Inventors: Hendrich M. Hernandez, Gaurav Chawla, Robert L. Winter
  • Publication number: 20160170918
    Abstract: Embodiments of systems and methods for fault tolerant link width maximization in a data bus are described. Embodiments of methods may include checking a data bus connection to determine if a degraded lane exists on the data bus, determining a first set of one or more lanes that contain the degraded lane, and assigning a second set of lanes for operation, wherein the second set of lanes does not contain the degraded lane.
    Type: Application
    Filed: December 16, 2014
    Publication date: June 16, 2016
    Applicant: DELL PRODUCTS, L.P.
    Inventors: Wade Andrew Butcher, Hendrich M. Hernandez, Timothy M. Lambert
  • Patent number: 9300590
    Abstract: An Ethernet device includes receive buffers and transmit buffers of a port, and a processor. The buffers are each associated with a respective class of service. The processor operates to determine a current buffer utilization in a receive buffer, determine that the current buffer utilization is different than a buffer threshold for the receive buffer, determine a data rate limit for the class of service associated with the receive buffer based upon the difference between the current buffer utilization and the buffer threshold, and send a data rate limit frame to another device coupled to the port. The data rate limit frame includes the data rate limit for the class of service.
    Type: Grant
    Filed: June 24, 2011
    Date of Patent: March 29, 2016
    Assignee: DELL PRODUCTS, LP
    Inventors: Hendrich M. Hernandez, Gaurav Chawla, Robert L. Winter
  • Publication number: 20160080530
    Abstract: A protocol processing system includes a plurality of communication interfaces. A control head-end is operable to receive a protocol processing engine identifier over a network through one of the communication interfaces from an external system. A plurality of optimized protocol processing engines are coupled to the control head-end, and the control head-end is operable to select a first optimized protocol processing engine from the plurality of optimized protocol processing engines that is identified by the protocol processing engine identifier. In response to being selected, the first optimized protocol processing engine handles communications between an application processing system and the external system.
    Type: Application
    Filed: November 13, 2015
    Publication date: March 17, 2016
    Inventors: Eric Alan Kuzmack, Hendrich M. Hernandez, Robert Lee Winter, Geng Lin
  • Patent number: 9203762
    Abstract: Information handling system network traffic is managed by populating a DCBX client framework with application network parameters associated with predetermined applications. Network devices, such as information handling system clients and servers, retrieve a TLV from a switch to obtain application network parameters for an application and apply the parameters so that the application executing on the device tags network communications with the associated parameters, such as bandwidth, loss less behavior, priority, latency, through put and CPU utilization.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: December 1, 2015
    Assignee: DELL PRODUCTS L.P.
    Inventors: Gaurav Chawla, Hendrich M. Hernandez, Jacob Cherian, Robert Winter, Saikrishna Kotha
  • Patent number: 9191262
    Abstract: A protocol processing system includes a plurality of communication interfaces. A control head-end is operable to receive a protocol processing engine identifier over a network through one of the communication interfaces from an external system. A plurality of optimized protocol processing engines are coupled to the control head-end, and the control head-end is operable to select a first optimized protocol processing engine from the plurality of optimized protocol processing engines that is identified by the protocol processing engine identifier. In response to being selected, the first optimized protocol processing engine handles communications between an application processing system and the external system.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: November 17, 2015
    Assignee: Dell Products L.P.
    Inventors: Eric Alan Kuzmack, Hendrich M. Hernandez, Robert Lee Winter, Geng Lin
  • Patent number: 9158567
    Abstract: A method includes configuring a host system to instantiate a virtual machine using server configuration information from a virtual machine monitor (VMM) and configuring a switch network to provide the virtual machine with access to resources on the switch network using network configuration information from the VMM. A VMM includes a workload with a server configuration module that configures a host system to include a virtual machine, and a network configuration module that configures a switch network coupled to the host system, such that the virtual machine obtains access to resources on the switch network.
    Type: Grant
    Filed: October 20, 2009
    Date of Patent: October 13, 2015
    Assignee: Dell Products, LP
    Inventors: Gaurav Chawla, Hendrich M. Hernandez, Jacob Cherian, Robert L. Winter, Saikrishna Kotha
  • Patent number: 9059868
    Abstract: A network switch includes a virtual local area network module that determines that a device coupled to a first switch port includes a virtual network interface. The module further identifies a virtual switch port partitioned in the first switch port associated with the virtual network interface and determines that a virtual local area network is associated with the identified virtual switch port.
    Type: Grant
    Filed: June 28, 2012
    Date of Patent: June 16, 2015
    Assignee: Dell Products, LP
    Inventors: Hendrich M. Hernandez, Gaurav Chawla, Rabah S. Hamdi, Robert L. Winter
  • Patent number: 9055467
    Abstract: A network communication pause system includes a network interface device and a management controller. The management controller is operable to monitor first data traffic that is received by the network interface device over a network and that is associated with a sender Media Access Control (MAC) address and a receiver MAC address. If the management controller determines that the first data traffic has exceeded a threshold, a pause frame that includes the sender MAC address is sent over the network through the network interface device to a sender device associated with the sender MAC address. The pause frame may include an operations code that causes intermediate devices coupled between the management controller and the sender device to forward the pause frame to the sender device, and a pause time for which the sender device will pause the sending of data traffic to the receiver MAC address.
    Type: Grant
    Filed: January 14, 2013
    Date of Patent: June 9, 2015
    Assignee: Dell Products L.P.
    Inventors: Hendrich M. Hernandez, Robert Lee Winter
  • Publication number: 20150046618
    Abstract: An information handling system includes a plurality of processors that each includes a cache memory, and a receive side scaling (RSS) indirection table with a plurality of pointers that each points to one of the processors. A network data packet received by the information handling system determines a pointer to a first processor. In response to determining the pointer, information associated with the network data packet is transferred to the cache memory of the first processor. The information handling system also includes a process scheduler that moves a process associated with the network data packet from a second processor to the first processor, and an RSS module that directs the process scheduler to move the process and associates the first pointer with the processor in response to directing the process scheduler.
    Type: Application
    Filed: September 18, 2014
    Publication date: February 12, 2015
    Inventors: Matthew L. Domsch, Hendrich M. Hernandez, Robert L. Winter, Shawn J. Dube
  • Publication number: 20150020073
    Abstract: An information handling system includes a plurality of processors that each includes a cache memory, and a receive side scaling (RSS) indirection table with a plurality of pointers that each points to one of the processors. A network data packet received by the information handling system determines a pointer to a first processor. In response to determining the pointer, information associated with the network data packet is transferred to the cache memory of the first processor, The information handling system also includes a process scheduler that moves a process associated with the network data packet from a second processor to the first processor, and an RSS module that directs the process scheduler to move the process and associates the first pointer with the processor in response to directing the process scheduler.
    Type: Application
    Filed: September 30, 2014
    Publication date: January 15, 2015
    Applicant: Dell Products, LP
    Inventors: Matthew L. Domsch, Hendrich M. Hernandez, Robert L. Winter, Shawn J. Dube
  • Patent number: 8929255
    Abstract: A network switch includes a first network port, a second network port, and a port virtualization module associated with the first network port. The port virtualization module determines that a device coupled to the first network port includes a first virtual network interface and provides a second virtual network interface on the first network port. The second virtual network interface is associated with the first virtual network interface. The network switch provides an aggregation zone including the second network port, the first virtual network interface, and the second virtual network interface.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: January 6, 2015
    Assignee: Dell Products, LP
    Inventors: Hendrich M. Hernandez, Gaurav Chawla, Robert L. Winter
  • Publication number: 20140337456
    Abstract: In accordance with embodiments of the present disclosure, a method may include determining one or more characteristics of each of two endpoints of a data transfer, the one or more characteristics comprising whether the endpoint is Remote Direct Memory Access (RDMA)-capable. The method may also include establishing an RDMA termination between the two endpoints. The method may additionally include configuring a first path between the RDMA termination and a first endpoint of the two endpoints, wherein the first path is RDMA-capable, in response to determining that the first endpoint is RDMA-capable. The method may further include configuring a second path between the RDMA termination and a second endpoint of the two endpoints.
    Type: Application
    Filed: May 7, 2013
    Publication date: November 13, 2014
    Applicant: Dell Products L.P.
    Inventors: Gaurav Chawla, Hendrich M. Hernandez, Robert Lee Winter
  • Patent number: 8879546
    Abstract: A method of configuring a port on a network device includes receiving a frame of information, determining that the frame includes maximum transmission unit (MTU) information, and configuring a prioritized receive queue on the port with an MTU size based on the MTU information. The MTU size is different than another MTU size of another prioritized receive queue on the port. A network interface includes a port, a de-multiplexer coupled to an output or the port, and prioritized receive queues that each have an MTTU size. A first prioritized receive queue has an MTU size different than a second prioritized receive queue.
    Type: Grant
    Filed: October 31, 2012
    Date of Patent: November 4, 2014
    Assignee: Dell Products, LP
    Inventors: Gaurav Chawla, Hendrich M. Hernandez, Robert L. Winter
  • Patent number: 8874786
    Abstract: An information handling system (IHS) includes a plurality of processors that include a cache memory, and a receive side scaling (RSS) indirection table with a plurality of pointers each pointing to a processor. A network data packet received by the IHS determines a pointer to a first processor. In response, information associated with the network data packet is transferred to the cache memory of the first processor, The IHS also includes a process scheduler that moves a process associated with the network data packet from a second processor to the first processor, and RSS module that directs the process scheduler to move the process and associates the first pointer with the processor in response to directing the process scheduler. In one embodiment, the processes are virtual machines so that network packets associated with a virtual machine are processed by sending an interrupt to a processor supporting executing the virtual machine.
    Type: Grant
    Filed: August 23, 2012
    Date of Patent: October 28, 2014
    Assignee: Dell Products L.P.
    Inventors: Matthew L. Domsch, Hendrich M. Hernandez, Robert L. Winter, Shawn J. Dube