Abstract: Embodiments of the present disclosure provide a touch sensation interaction method and apparatus in shopping. The method includes collecting an image of a first object, where the first object is a part of a human body, acquiring information about a second object, where the second object is a wearable item worn by the first object, obtaining parameter information of a touch sensation signal using the image of the first object and the information about the second object, where the touch sensation signal is applied to the first object and is used to simulate a touch sensation caused by the second object to the first object when the second object is worn by the first object, generating the touch sensation signal using the parameter information of the touch sensation signal, and applying the touch sensation signal to the first object.

Abstract: An image switching method and apparatus. The method includes: displaying an image in a first format; receiving an input instruction for switching the image from the first format to a second format; and displaying the image in the second format. The first format is a panorama image format or a wide-view image format, the second format is a panorama image format or a wide-view image format, and the first format is different from the second format. According to the method and the device in the embodiments of the present invention, a manner of simple and flexible interaction between a panorama image and a street side image is provided.

Abstract: The present disclosure involves a method. The method includes providing a substrate including a top surface. The method also includes forming a gate over the top surface of the substrate. The formed gate has a first height measured from the top surface of the substrate. The method also includes etching the gate to reduce the gate to a second height. This second height is substantially less than the first height. The present disclosure also involves a semiconductor device. The semiconductor device includes a substrate. The substrate includes a top surface. The semiconductor device also includes a first gate formed over the top surface of the substrate. The first gate has a first height. The semiconductor device also includes a second gate formed over the top surface of the substrate. The second gate has a second height. The first height is substantially less than the second height.

Abstract: A method and apparatus are disclosed for management of linked lists within a dynamic queue system. In a dynamic queue system where a central memory is shared amongst a set of queues, the method organizes the linked list structures of the queues. The linked list pointers of the queues are organized over a set of single port memories. Memory for the queue entries is allocated in an alternating fashion, which allows the method to provide per-cycle access to queues while reducing the footprint of the memory elements used for maintaining the linked list structures. The method disclosed reduces the overall memory requirements for the design and implementation of queue systems with multiple queues sharing a common pool of memory.

Abstract: The present invention is directed at a method and apparatus for determining a distributed Serial Attached Small computer system interface (SAS) topology in a storage network system. Once a SAS storage network element, such as a SAS Expander, receives notification that a downstream SAS topology has changed, the SAS Expander queries all downstream SAS Expanders to update its route table.

Abstract: The present disclosure involves a method. The method includes providing a substrate including a top surface. The method also includes forming a gate over the top surface of the substrate. The formed gate has a first height measured from the top surface of the substrate. The method also includes etching the gate to reduce the gate to a second height. This second height is substantially less than the first height. The present disclosure also involves a semiconductor device. The semiconductor device includes a substrate. The substrate includes a top surface. The semiconductor device also includes a first gate formed over the top surface of the substrate. The first gate has a first height. The semiconductor device also includes a second gate formed over the top surface of the substrate. The second gate has a second height. The first height is substantially less than the second height.

Abstract: A scatter gather element based caching system is provided along with a modified scatter gather element, that supports efficient logical to physical address translation for arbitrarily aligned and arbitrarily sized fragment (segment) based memory management schemes. This is different from modern CPU implementations with MMUs that support page-based implementations. A primary application of embodiments of the present invention is in DMA applications. The system enables frequent switching of contexts between I/Os using a novel caching technique. An embodiment of the present invention also includes the modification of the conventional scatter-gather element used in DMA for supporting multiple memory spaces, backward list traversals, better error recovery and debugging.

Abstract: A system and method for providing redundant access paths to a storage device make use of a processor to analyze instructions received from hosts to allow for command queuing, host switching, and command replacement where necessary. The system allows for either Serially Attached SCSI or Serial ATA hard drives to be connected to the same topology and to require no host intervention on the coordination of drive access in a multi-host environment. A single ported SATA device can then appear multi-ported and can support a redundant architecture within a SAS topology.

Abstract: Broadcast primitive filtering in a SAS expander using virtual domains. The virtual domains can be non-overlapping or overlapping logical subsets of the physical topology, or a logical construct based on the membership of a device within a group. Broadcast event propagation is handled in accordance with predetermined policies associated with the virtual domains. These policies can, for example, include limiting the broadcast traffic within the boundaries of the logical zones defined by the subsets, or routing the broadcast events in accordance with access policies, or privileges, associated with the group.

Abstract: A method and apparatus are provided for implementing connection management in SAS expander devices. SAS expanders are commonly used within a SAS network topology to allow multiple disk drives to connect to multiple host devices. The method and apparatus provides arbitration of connection requests to be setup or removed among multiple end devices and expander devices so as to increase system performance and reduce hardware cost in a standard compliant manner.

Abstract: A method and system are provided for broadcast message filtering in SAS expanders. Common SAS topology defined by ANSI T10 specification only supports spanning tree topology (without loops) interconnection among multiple end devices and expander devices. Broadcast message filtering provides a mechanism to selectively discard broadcast messages, or primitives, in the SAS expanders to break the infinite loop path that broadcast primitives can traverse. This enables new SAS physical topologies with loops that are otherwise difficult or impossible to realize using SAS expanders that handle primitive broadcasts according to the definition of the SAS standard. By allowing redundant paths in a SAS topology, the problem of infinite broadcast flooding in SAS topology is reduced. Selectively forwarding broadcast messages can be based on whether the broadcast was originated at the source phy, or received by the source phy, or based on whether the source phy is a filtered phy.

Abstract: A method and apparatus are provided for finding the maxima and minima from a set of inputs data. Given a master set K[0 . . . N?1] of N keys, the current invention can pre-compute a comparison matrix, find the maximum key KMAX or minimum key KMIN from the master set K[0 . . . N?1] and indicate the key position index PMAX of the maximum key or PMIN of the minimum key. Given a subset S[0 . . . M?1] of M keys where the subset S[0 . . . M?1] belongs to the master set K[0 . . . N?1], the current invention can also find the maximum key SMAX or minimum key SMIN from the subset S[0 . . . M?1] and indicate the reference key position index PMAX of the maxima SMAX or PMIN of the minima SMIN in the master set K[0 . . . N?1]. The current invention can also find a specific rank of key (example 5th largest key or 6th smallest key) and return the reference key index position in the master set K[0 . . . N?1].

Abstract: Methods and devices for controlling and managing data flow and data transmission rates. A feedback mechanism is used in conjunction with measuring output transmission rates to control the input transmission rates, changing conditions can be accounted for an excess output transmission capacity can be shared among numerous input ports. Similarly, by using maximum and minimum rates which can be requested from an output port, minimum transmission rates can be guaranteed for high priority traffic while capping maximum output rates for low priority traffic. By combining the two ideas of feedback rate control and placing maximum requestable transmission rates, a more equitable output sharing mechanism arises. The measured output transmission rate is used to control and recalculate the maximum requestable output transmission rate for incoming flows, thereby allowing for changing network and data flow conditions.

Abstract: A DMA engine is provided that is suitable for higher performance System On a Chip (SOC) devices that have multiple concurrent on-chip/off-chip memory spaces. The DMA engine operates either on logical addressing method or physical addressing method and provides random and sequential mapping function from logical address to physical address while supporting frequent context switching among a large number of logical address spaces. Embodiments of the present invention utilize per direction (source-destination) queuing and an internal switch to support non-blocking concurrent transfer of data on multiple directions. A caching technique can be incorporated to reduce the overhead of address translation.

Abstract: A method and apparatus are disclosed for implementing STP flow control in SAS expander devices. SAS expanders are commonly used within a SAS network topology to allow multiple disk drives to connect to multiple host devices. Connections to a SATA HDD are supported using SATA Tunnelling Protocol (STP), which allows SATA traffic to be carried over a SAS network topology. Flow control in a STP connection is applied through a set of special SATA primitives, both for forward and backward flow control. A method is described herein in which STP flow control is supported without the use of a SATA link layer state machine. This allows STP flow control to be terminated on a hop-by-hop basis without knowing the data channel direction or maintaining a SATA link state machine, and while minimizing gate count.

Abstract: A method and architecture are provided for SOC (System on a Chip) devices for RAID processing, which is commonly referred as RAID-on-a-Chip (ROC). The architecture utilizes a shared memory structure as interconnect mechanism among hardware components, CPUs and software entities. The shared memory structure provides a common scratchpad buffer space for holding data that is processed by the various entities, provides interconnection for process/engine communications, and provides a queue for message passing using a common communication method that is agnostic to whether the engines are implemented in hardware or software. A plurality of hardware engines are supported as masters of the shared memory. The architectures provide superior throughput performance, flexibility in software/hardware co-design, scalability of both functionality and performance, and support a very simple abstracted parallel programming model for parallel processing.

Abstract: A multi-port switch and a method of command switching using such a switch. Multiple virtual targets provide multiple hosts with access to the physical target device attached to the target interface of the switch. The switch intelligently dispatches operations received by the virtual targets to the physical storage target device to provide shared access. In doing so, the communication between the switch and the physical target can fully comply with the SATA protocol without the physical target being aware that the operations have originated from multiple physical hosts, and without the multiple physical hosts being aware of the shared nature of the physical SATA target device.

Abstract: A receive virtual concatenation processor (processor) is adapted to receive time-slot interleaved data carried over SONET/SDH frames. The processor first generates per time-slot data and subsequently generates per channel data. The processor supports virtual concatenation, contiguous concatenation as well as mixed concatenation in which some channels are contiguously concatenated and others are virtually concatenated. The processor supports virtual concatenation at both STS-1 and STS-3c granularities and with arbitrary differential delay among constituent time-slots. The processor supports contiguous concatenation with any multiple of STS-3c granularity. The processor is highly scalable to support multiple channels and different frame sizes such as STS-12, STS-48, STS-192, etc.

Abstract: A method and apparatus are provided for routing in an SAS expander for logical zoning. Common SAS topology defined by the ANSI T10 specification only relates to physical topology with multiple end devices, as well as to expander devices and the broadcast handling mechanisms in such physical topologies. The present invention introduces the concept of virtual topologies that can be non-overlapping or overlapping subsets of the physical topology and the routing mechanism that handles the routing issues with the virtual topologies.

Abstract: A method and apparatus are provided for implementing connection management in SAS expander devices. SAS expanders are commonly used within a SAS network topology to allow multiple disk drives to connect to multiple host devices. The method and apparatus provides arbitration of connection requests to be setup or removed among multiple end devices and expander devices so as to increase system performance and reduce hardware cost in a standard compliant manner.