Patents by Inventor Heng Liao

Heng Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7496700
    Abstract: A method and apparatus are disclosed for implementing STP flow control in SAS expander devices. SAS expanders are commonly used within a SAS network topology to allow multiple disk drives to connect to multiple host devices. Connections to a SATA HDD are supported using SATA Tunnelling Protocol (STP), which allows SATA traffic to be carried over a SAS network topology. Flow control in a STP connection is applied through a set of special SATA primitives, both for forward and backward flow control. A method is described herein in which STP flow control is supported without the use of a SATA link layer state machine. This allows STP flow control to be terminated on a hop-by-hop basis without knowing the data channel direction or maintaining a SATA link state machine, and while minimizing gate count.
    Type: Grant
    Filed: January 6, 2006
    Date of Patent: February 24, 2009
    Assignee: PMC-Sierra, Inc.
    Inventors: Paul Chong, Heng Liao, Cheng Yi
  • Patent number: 7492714
    Abstract: A method and apparatus for building a packet grooming and aggregation engine is disclosed. The grooming and aggregation engine can be applied to the network for providing flexible aggregation and service multiplexing functions. A method and apparatus achieves the intended function that is easy to implement and easy for the network operator to manage, yet provides enough flexibility to mix and match various services at the edge node of the network. One specific embodiment of the patent is an Ethernet over SONET mapping system where user traffic is aggregated and groomed into SONET transport virtual concatenation channels.
    Type: Grant
    Filed: February 3, 2004
    Date of Patent: February 17, 2009
    Assignee: PMC-SIERRA, Inc.
    Inventors: Heng Liao, Stacy Nichols, Vernon R Little, Kevin Huscroft
  • Patent number: 7474926
    Abstract: A method and apparatus are provided for controlling the powering-up or spin-up of devices such as hard drives using expanders in a SAS topology. The method and apparatus provides a mechanism to coordinate spin-up control among a topology of expanders. The present invention enables an expander to both process the reception of the NOTIFY command to spin up attached devices and to propagate such command to further expanders. Hierarchical spin-up control provides an advantageous, in-band mechanism that controls the expanders within the topology to limit the total number of devices powering-up at any given time.
    Type: Grant
    Filed: March 28, 2006
    Date of Patent: January 6, 2009
    Assignee: PMC-Sierra, Inc.
    Inventors: Larrie Simon Carr, Heng Liao
  • Patent number: 7283520
    Abstract: Multi-stage networks are used for data stream permutations involving merging and demultiplexing—providing arbitrary data unit time-space interchange that can be used to solve a range of problems particularly in the field of digital data communications, particularly in digital data communication involving advanced networks for exchanging data in packets, cells, or other data units.
    Type: Grant
    Filed: April 19, 2002
    Date of Patent: October 16, 2007
    Assignee: PMC-Sierra, Inc.
    Inventors: Heng Liao, Xiaofeng Wang, Zhao Wu
  • Patent number: 7270566
    Abstract: A flexible circuit board connector is at least composed of a base, a loose cover, a plurality of terminals, and a plurality of insertion terminals. The base is provided with symmetric grooves which are used to provide for an emplacement of projected shafts of the loose cover, so as to prevent the loose cover from being displaced horizontally. Next, front ends of the plural terminals are pressed into through-holes of loose cover, so as to prevent the loose cover from being dropped off in a vertical direction. Then, through an insertion of the plural insertion terminals, positions of the projected shafts of loose cover are lifted up by abutted parts at front ends of the insertion terminals, so as to position the loose cover. In addition, the abutted part is also provided with an inverted hook, such that the insertion terminal can be tightly emplaced in the hole.
    Type: Grant
    Filed: May 12, 2006
    Date of Patent: September 18, 2007
    Assignee: Singatron Enterprise Co., Ltd.
    Inventor: Huang-Heng Liao
  • Patent number: 7187694
    Abstract: A packet parser performs a multitude of compare and transition operations to parse through all layers of the networking protocol in accordance with which the packet is formed. The packet parser supports a plurality of packet encapsulation formats and uses directed distance graph syntax for graphical representation. At each node, the packet parser isolates and compares a packet header word with either a number of associated masked values or a number of ranges to find a match. Depending on the match, one of the arcs originating from that node, namely a source node, is selected for transitioning to a destination node. A pointer is incremented as transition from the source node to the destination node is made. The packet parser is adapted to make a transition to a destination node from any number of source nodes, one or more of which may be a destination node for others of these source nodes.
    Type: Grant
    Filed: March 29, 2002
    Date of Patent: March 6, 2007
    Assignee: PMC-Sierra, Inc.
    Inventor: Heng Liao
  • Patent number: 7188168
    Abstract: A packet classification language (GPCL) is provided to specify protocol hierarchies among data packets in a routing device. The GPCL uses regular expressions to match incoming data packets and a syntax to describe the protocol hierarchy. A GPCL compiler produces an enhanced DFA which incorporates the regular expression for recognizing constituent parts of a data packets and which incorporates the grammar graph defining the relationships among the constituent parts. A hardware implemented DFA is used to scan the input stream which constitutes the data packets.
    Type: Grant
    Filed: April 25, 2000
    Date of Patent: March 6, 2007
    Assignee: PMC-Sierra, Inc.
    Inventor: Heng Liao
  • Patent number: 7185081
    Abstract: A packet classification language (PCL) is provided to specify data packets in a routing device. The PCL uses regular expressions to match incoming data packets. Class identifiers associated with each regular expression identifies the class to which each recognized packet belongs for subsequent processing. A PCL compiler produces a DFA which recognizes the data packets as defined by the regular expressions. A hardware implemented DFA is used to scan the input stream which constitutes the data packets.
    Type: Grant
    Filed: March 29, 2000
    Date of Patent: February 27, 2007
    Assignee: PMC-Sierra, Inc.
    Inventor: Heng Liao
  • Patent number: 7177314
    Abstract: A transmit virtual concatenation processor for multiplexing channelized data onto a SONET/SDH frame is disclosed. The processor is scalable and is able to handle mapping a number of data channels to a number of different frame sizes including STS-12, STS-48, STS-192 and STS-768. The processor supports virtual concatenation with arbitrary channel mapping at both STS-1 and STS-3c granularities. The processor also supports contiguous concatenation with STS-12c, STS-24c, STS-48c, STS-192c, etc. capacities (i.e., STS-Nc where N is a multiple of 3). In addition, the processor supports mixed concatenation where some channels are using contiguous concatenation and some other channels are using STS-3c-Xv virtual concatenation. Alternatively, the processor is able to support any virtual concatenation, any contiguous concatenation and any mixed concatenation.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: February 13, 2007
    Assignee: PMC-Sierra, Inc.
    Inventors: Zhao Wu, Heng Liao
  • Patent number: 7116663
    Abstract: Methods and apparatus for finding a match between a target bit pattern and multiple filter bit patterns. A filter array is created from the filter bit patterns and at least one intermediate array is generated from the filter array. Specific columns of the intermediate arrays are then extracted based on bit values of the target bit pattern. A row by row AND operation is performed on these columns to arrive at a match vector. the match vector identifies which of the filter bit patterns in the filter array match the target bit pattern. The method is implemented by using multiple classifier elements operating in parallel with each classifier element handling multiple filter bit patterns.
    Type: Grant
    Filed: July 20, 2001
    Date of Patent: October 3, 2006
    Assignee: PMC-Sierra Ltd.
    Inventor: Heng Liao
  • Publication number: 20060209693
    Abstract: Methods and devices for controlling and managing data flow and data transmission rates. A feedback mechanism is used in conjunction with measuring output transmission rates to control the input transmission rates, changing conditions can be accounted for an excess output transmission capacity can be shared among numerous input ports. Similarly, by using maximum and minimum rates which can be requested from an output port, minimum transmission rates can be guaranteed for high priority traffic while capping maximum output rates for low priority traffic. By combining the two ideas of feedback rate control and placing maximum requestable transmission rates, a more equitable output sharing mechanism arises. The measured output transmission rate is used to control and recalculate the maximum requestable output transmission rate for incoming flows, thereby allowing for changing network and data flow conditions.
    Type: Application
    Filed: April 28, 2006
    Publication date: September 21, 2006
    Applicant: PMC-SIERRA LTD.
    Inventors: Shahram Davari, Heng Liao, Stacy Nichols
  • Patent number: 7068602
    Abstract: Methods and devices for controlling and managing data flow and data transmission rates. A feedback mechanism is used in conjunction with measuring output transmission rates to control the input transmission rates, changing conditions can be accounted for an excess output transmission capacity can be shared among numerous input ports. Similarly, by using maximum and minimum rates which can be requested from an output port, minimum transmission rates can be guaranteed for high priority traffic while capping maximum output rates for low priority traffic. By combining the two ideas of feedback rate control and placing maximum requestable transmission rates, a more equitable output sharing mechanism arises. The measured output transmission rate is used to control and recalculate the maximum requestable output transmission rate for incoming flows, thereby allowing for changing network and data flow conditions.
    Type: Grant
    Filed: January 30, 2002
    Date of Patent: June 27, 2006
    Assignee: PMC-Sierra Ltd.
    Inventors: Shahram Davari, Heng Liao, Stacy William Nichols
  • Patent number: 7054315
    Abstract: Methods and apparatus for reducing the search space processed by mask matching methods. The search space is reduced by grouping the candidate bit patterns into groups and subgroups that have internal bit agreement between the members. By only applying the mask matching methods to a select number of groups selected by their bit agreement with the target bit pattern, the computation time and memory requirement of the mask matching method is reduced.
    Type: Grant
    Filed: September 17, 2001
    Date of Patent: May 30, 2006
    Assignee: PMC-Sierra Ltd.
    Inventor: Heng Liao
  • Patent number: 6633865
    Abstract: An apparatus for executing a multiple step database lookup procedure, the apparatus including a plurality of processing units, at least two processing units being coupled to a memory containing a database to be looked up, and a plurality of data pipelines which couple the plurality of processing units to each other and to external apparatus, wherein each processing unit executes at least one step in the multiple step database lookup procedure.
    Type: Grant
    Filed: December 23, 1999
    Date of Patent: October 14, 2003
    Assignee: PMC-Sierra Limited
    Inventor: Heng Liao
  • Publication number: 20030123459
    Abstract: Methods and apparatus for reducing the search space processed by mask matching methods. The search space is reduced by grouping the candidate bit patterns into groups and subgroups that have internal bit agreement between the members. By only applying the mask matching methods to a select number of groups selected by their bit agreement with the target bit pattern, the computation time and memory requirement of the mask matching method is reduced.
    Type: Application
    Filed: September 17, 2001
    Publication date: July 3, 2003
    Inventor: Heng Liao
  • Publication number: 20030108043
    Abstract: Methods and apparatus for finding a match between a target bit pattern and multiple filter bit patterns. A filter array is created from the filter bit patterns and at least one intermediate array is generated from the filter array. Specific columns of the intermediate arrays are then extracted based on bit values of the target bit pattern. A row by row AND operation is performed on these columns to arrive at a match vector. the match vector identifies which of the filter bit patterns in the filter array match the target bit pattern. The method is implemented by using multiple classifier elements operating in parallel with each classifier element handling multiple filter bit patterns.
    Type: Application
    Filed: July 20, 2001
    Publication date: June 12, 2003
    Inventor: Heng Liao
  • Publication number: 20030043851
    Abstract: A transmit virtual concatenation processor for multiplexing channelized data onto a SONET/SDH frame is disclosed. The processor is scalable and is able to handle mapping a number of data channels to a number of different frame sizes including STS-12, STS-48, STS-192 and STS-768. The processor supports virtual concatenation with arbitrary channel mapping at both STS-1 and STS-3c granularities. The processor also supports contiguous concatenation with STS-12c, STS-24c, STS-48c, STS-192c, etc. capacities (i.e., STS-Nc where N is a multiple of 3). In addition, the processor supports mixed concatenation where some channels are using contiguous concatenation and some other channels are using STS-3c-Xv virtual concatenation. Alternatively, the processor is able to support any virtual concatenation, any contiguous concatenation and any mixed concatenation.
    Type: Application
    Filed: August 30, 2001
    Publication date: March 6, 2003
    Applicant: PMC-Sierra, Inc.
    Inventors: Zhao Wu, Heng Liao
  • Publication number: 20020141379
    Abstract: Methods and devices for controlling and managing data flow and data transmission rates. A feedback mechanism is used in conjunction with measuring output transmission rates to control the input transmission rates, changing conditions can be accounted for an excess output transmission capacity can be shared among numerous input ports. Similarly, by using maximum and minimum rates which can be requested from an output port, minimum transmission rates can be guaranteed for high priority traffic while capping maximum output rates for low priority traffic. By combining the two ideas of feedback rate control and placing maximum requestable transmission rates, a more equitable output sharing mechanism arises. The measured output transmission rate is used to control and recalculate the maximum requestable output transmission rate for incoming flows, thereby allowing for changing network and data flow conditions.
    Type: Application
    Filed: January 30, 2002
    Publication date: October 3, 2002
    Inventors: Shahram Davari, Heng Liao, Stacy William Nichols
  • Patent number: 6381816
    Abstract: A fabric strap retainer having a back insertion hole at a back side thereof for the insertion of two fabric straps in a crossed manner, two post-like stop ends at two sides of the back insertion hole, a partition column disposed on the middle in flush with a front side thereof, two release holes respectively extended from the back insertion hole to the periphery thereof at two sides of the partition column, two hollow engagement units respectively forwardly extended from the release holes to the periphery thereof at two sides of the partition column, the hollow engagement units each having two series of teeth respectively disposed at top and bottom sides thereof.
    Type: Grant
    Filed: August 18, 2000
    Date of Patent: May 7, 2002
    Assignee: Taiwan Industrial Fastener Corporation
    Inventors: Chin-Kuo Lai, Yun-Mei Hsieh, Pin-Heng Liao