Abstract: A technique for reducing the number of layers in a multilayer circuit board having a plurality of electrically conductive signal layers for routing electrical signals to and from a surface of the multilayer circuit board is disclosed. The technique is realized by a method comprising: forming a plurality of electrically conductive vias in the multilayer circuit board extending from the surface of the multilayer circuit board to at least one of the plurality of electrically conductive signal layers; arranging the surface such that a first set of two power/ground pins corresponds to a first via and a second set of two power/ground pins corresponds to a second via positioned adjacent the first via, thereby creating a channel; and routing a first plurality of electrical signals through the channel on the first of the plurality of electrically conductive signal layers.

Abstract: A technique for reducing via capacitance is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for reducing via capacitance. The method may comprise forming, in a circuit board, a via hole that bridges a first trace and a second trace. The method may also comprise forming a channel in a sidewall of the via hole. The method may further comprise filling the via hole and the channel with a conductive material. The method may additionally comprise removing the conductive material from the via hole without depleting the channel, thereby forming an interconnect that couples the first trace to the second trace.

Abstract: Exemplary techniques for tuning the effective capacitance provided by an embedded capacitor are disclosed. The techniques may be realized by modifying one or more conductive features of one or more vias connected to the embedded capacitor to adjust the capacitance contributed by the one or more vias. One technique preferably includes altering the conductive surface area of a pad of one or more vias to which the embedded capacitor is electrically connected to increase or decrease the contributed capacitance. Another technique provides for bore drilling or tap drilling one or more vias connected to the embedded capacitor to increase the surface area of plated interior surfaces of the vias, thereby increasing their capacitive effect. An additional technique includes forming a number of vias having various capacitive effects and electrically connecting the embedded capacitor to one or more of these vias to increase the capacitance.

Abstract: A technique for reducing via capacitance is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for reducing via capacitance. The method may comprise forming, in a circuit board, a via hole that bridges a first trace and a second trace. The method may also comprise forming a channel in a sidewall of the via hole. The method may further comprise filling the via hole and the channel with a conductive material. The method may additionally comprise removing the conductive material from the via hole without depleting the channel, thereby forming an interconnect that couples the first trace to the second trace.

Abstract: Described are a method and system for secure transmission of data through a network. A subcarrier sequence for data transmission is generated. The subcarrier sequence designates at least one subcarrier from a number of orthogonal subcarriers for each of a plurality of intervals in a time sequence. The subcarrier sequence is provided to a receiver. A data signal that includes the subcarriers identified in the subcarrier sequence modulated according to the data is transmitted from a transmitter to the receiver. For additional security, the subcarrier sequence can be transmitted to the receiver using a communications channel that is separate from the communications channel for the data signal. The data signal is detected at the receiver and demodulated according to the subcarrier sequence.

Abstract: Inter-layer shielding is employed to shield printed circuit board transmission lines from EMI and cross-talk at traversals between adjacent inner layers, between inner layers separated by one or more inner layers, between an outer layer and an adjacent inner layer, between an outer layer and an inner layer separated by one or more inner layers, and between an outer layer or inner layer and a component. Inter-layer shielding may be employed in conjunction with intra-layer shielding to provide shielding for an entire run of a transmission line spanning multiple layers. Inter-layer shielding may also be employed around component contacts such as electrically conducting pins. The shielding around the component contacts is designed to mate with a second portion of inter-layer shielding connected with intra-layer shielding such that an overlap is formed.

Abstract: A technique for accommodating electronic components on a multilayer signal routing device is disclosed. In one particular exemplary embodiment, the technique may be realized as a multilayer signal routing device comprising a primary surface and a secondary surface. The primary surface may have a plurality of electrically conductive pads formed thereon, wherein a group of the plurality of electrically conductive pads is in respective electrical connection with a group of electrically conductive micro-vias formed in the multilayer signal routing device. The secondary surface may have a channel formed thereon coinciding with the location of the group of electrically conductive micro-vias, wherein the channel has a channel area on the secondary surface for accommodating an electronic component mounted on the secondary surface.

Abstract: A technique for accommodating electronic components on a multilayer signal routing device is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for accommodating electronic components on a multilayer signal routing device. Such a method comprises determining a component space that is required to accommodate a plurality of electronic components on a surface of a multilayer signal routing device, and then forming at least one signal routing channel on at least the surface of the multilayer signal routing device, wherein the at least one signal routing channel has a channel space that is equal to or greater than the component space.

Abstract: Techniques for reducing the number of layers in a multilayer signal routing device are disclosed. In one particular exemplary embodiment, the techniques may be realized as a method wherein the multilayer signal routing device has a plurality of electrically conductive signal path layers for routing a plurality of electrical signals thereon. The method may comprise forming a plurality of electrically conductive vias in the multilayer signal routing device for electrically connecting at least two of the plurality of electrically conductive signal path layers, wherein the plurality of vias are arranged so as to form at least one channel in at least one other of the plurality of electrically conductive signal path layers. The method may also comprise grouping at least a portion of the plurality of electrical signals based at least in part upon their proximity to the at least one channel so that they may be efficiently routed therein.

Abstract: A technique for reducing the number of layers in a multilayer signal routing device is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for reducing the number of layers in a multilayer signal routing device having a plurality of electrically conductive signal path layers for routing electrical signals to and from at least one electronic component mounted on a surface of the multilayer signal routing device. In such a case, the method comprises routing electrical signals on the plurality of electrically conductive signal path layers in the multilayer signal routing device for connection to and from a high density electrically conductive contact array package based at least in part upon at least one of an electrically conductive contact signal type characteristic and an electrically conductive contact signal direction characteristic.

Abstract: A technique for reducing via capacitance is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for reducing via capacitance. The method may comprise forming, in a circuit board, a via hole that bridges a first trace and a second trace. The method may also comprise forming a channel in a sidewall of the via hole. The method may further comprise filling the via hole and the channel with a conductive material. The method may additionally comprise removing the conductive material from the via hole without depleting the channel, thereby forming an interconnect that couples the first trace to the second trace.

Abstract: A technique for enhancing circuit density and performance is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for enhancing circuit density and performance of a microelectronic module. The method may comprise forming a discrete package, wherein the discrete package comprises one or more passive devices that are desirable for the performance of the microelectronic module. The method may also comprise coupling the discrete package to the microelectronic module.

Abstract: A technique for eliminating electrically conductive vias is disclosed. In one embodiment, the technique is realized as an improved multilayer circuit board for eliminating electrically conductive vias. The multilayer circuit board has a top layer and a buried layer separated by at least one dielectric layer, wherein the buried layer includes an electrically conductive power plane portion and an electrically conductive ground plane portion. The improvement comprises a cavity in the multilayer circuit board extending through the top layer and the at least one dielectric layer so as to expose at least a portion of the power plane portion and the ground plane portion of the buried layer within the cavity.

Abstract: Redundant wireless links in a meshed backhaul network may be used to improve quality of service on the backhaul network by confining knowledge of the duality to the attached network elements. Globally, an aggregate bandwidth of the redundant wireless links may be advertised to allow network level routing to treat the redundant links as a single logical link. At the link level, however, the network elements may differentiate between different types of traffic to provide preferential service to particular types of traffic. By using different physical links within the logical link for particular types of traffic, the quality of service for that type of traffic may be improved by not causing different types of traffic to compete for the same bandwidth.

Abstract: A printed circuit board transmission line has an outer conductive wall surrounding an inner dielectric core. The transmission line may be disposed inside a grounded shielding to provide a form of coaxial conductor that mitigates cross talk from adjacent transmission lines and EMI. Further, groups of dielectric-core transmission lines may be disposed within a single grounded shield. For example, edge coupled differential pairs may be disposed in parallel with each other on a plane defined by a layer of the printed circuit board, i.e., side-by-side. Further, broadside-coupled differential pairs of dielectric-core transmission lines may be disposed in parallel with each other in a stack which is orthogonal with the plane defined by a layer of the printed circuit board, i.e., one on top of the other. Further, a plurality of dielectric-core transmission lines which may include all or ones of single-ended lines and differential pairs may be disposed within a single grounded shield.

Abstract: Inter-layer shielding is employed to shield printed circuit board transmission lines from EMI and cross-talk at traversals between adjacent inner layers, between inner layers separated by one or more inner layers, between an outer layer and an adjacent inner layer, between an outer layer and an inner layer separated by one or more inner layers, and between an outer layer or inner layer and a component. Inter-layer shielding may be employed in conjunction with intra-layer shielding to provide shielding for an entire run of a transmission line spanning multiple layers. Inter-layer shielding may also be employed around component contacts such as electrically conducting pins. The shielding around the component contacts is designed to mate with a second portion of inter-layer shielding connected with intra-layer shielding such that an overlap is formed.

Abstract: Exemplary techniques for providing an embedded preemphasis circuit and/or a deemphasis circuit in a printed circuit board (PCB) or other circuit device are disclosed. In particular, a technique for preemphasizing and/or deemphasizing transmitted signals in a PCB-based circuit is provided. The technique may be realized as a preemphasis circuit for preemphasizing a signal being transmitted from a signal source to a signal destination. The preemphasis circuit comprises a printed circuit board (PCB), a resistor embedded in the PCB and having a first terminal electrically connected to the signal source and a second terminal electrically connected to the signal destination, and a capacitor embedded in the PCB and having a first terminal electrically connected to the signal source and a second terminal electrically connected to the signal destination.

Abstract: A technique for facilitating signal transmission at high signal frequencies in a multi-layer substrate is disclosed. In one embodiment a multi-layer substrate comprises a conductor or pair of conductors, a first dielectric layer on a first side of the conductor or pair of conductors and a second dielectric layer on a second side of the conductor or pair of conductors. An air channel is provided in the first dielectric layer, the air channel formed to be substantially coextensive with the conductor or pair of conductors. A conductive shield surrounds the conductor or pair of conductors, the first dielectric layer, and the second dielectric layer in order to eliminate crosstalk. The conductor or pair of conductors may have discrete spaced edges and the width of the conductor or pair of conductors may be increased in order to adjust the impedance because of the low dielectric constant of air. Furthermore, additional air channels and a supporting layer may be included in the structure.

Abstract: A method for implementing a circuit component on a surface of a multilayer circuit board is provided. The circuit component includes a plurality of pins and the circuit board includes a plurality of electrically conductive vias penetrating at least one layer of the circuit board and being arranged so as to form at least one channel for routing one or more traces at one or more signal layers of the circuit board. The method comprises the step of forming at least one pin of the plurality of pins of the circuit component to have a length compatible with a depth of a corresponding via of the circuit board.

Abstract: A technique for facilitating signal transmission at high signal frequencies in a multi-layer substrate is disclosed. In one embodiment a multi-layer substrate comprises a conductor or pair of conductors, a first dielectric layer on a first side of the conductor or pair of conductors and a second dielectric layer on a second side of the conductor or pair of conductors. An air channel is provided in the first dielectric layer, the air channel formed to be substantially coextensive with the conductor or pair of conductors. A conductive shield surrounds the conductor or pair of conductors, the first dielectric layer, and the second dielectric layer in order to eliminate crosstalk. The conductor or pair of conductors may have discrete spaced edges and the width of the conductor or pair of conductors may be increased in order to adjust the impedance because of the low dielectric constant of air. Furthermore, additional air channels and a supporting layer may be included in the structure.