Abstract: A method for implementing a circuit component on a surface of a multilayer circuit board is provided. The circuit component includes a plurality of pins and the circuit board includes a plurality of electrically conductive vias penetrating at least one layer of the circuit board and being arranged so as to form at least one channel for routing one or more traces at one or more signal layers of the circuit board. The method comprises the step of forming at least one pin of the plurality of pins of the circuit component to have a length compatible with a depth of a corresponding via of the circuit board.

Abstract: A mobile backhaul inter-mesh communication point forms an interface between a wireless mesh network on a first level and a wireless mesh network on a second, higher bandwidth, level. The two wireless networks are differentiated, e.g., by causing the mesh networks to be formed using different spectra, protocols or coding, or antennae. The mobile intra-mesh communication point functions as an access point in the lower level mesh network and as a relay point in the upper level mesh network. Utilizing mobile inter-mesh communication points facilitates deployment of wireless network access points while enabling the location of access points to follow the concentration of network users. Mobile inter-mesh communication points may be deployed in personal vehicles such as cars, trucks, and motorcycles, public transportation vehicles such as busses, trains, and aircraft, emergency vehicles such as fire trucks and ambulances, and many other types of vehicles.

Abstract: A technique for electrically interconnecting a signal between a first circuit board and a second circuit board is disclosed. In each board, at least one signal conductor is shielded by an electrically conductive shield. Multiple conductors may be shielded by the same shield. A first opening is formed in the electrically conductive shield of the first circuit board and a second opening is formed in the electrically conductive shield of the second circuit board so as to expose the signal conductor in the each circuit board. An electrically conductive adhesive, reflowed solder paste, or interposer/elastomer device is applied surrounding at least one of the openings and may further be applied within at least one of the openings. The first circuit board and the second circuit board are then positioned such that the first opening and the second opening are aligned and a signal propagating along the first signal conductor is electrically interconnected to the second signal conductor.

Abstract: A method for implementing a circuit component on a surface of a multilayer circuit board is provided. The circuit component includes a plurality of pins and the circuit board includes a plurality of electrically conductive vias penetrating at least one layer of the circuit board and being arranged so as to form at least one channel for routing one or more traces at one or more signal layers of the circuit board. The method comprises the step of forming at least one pin of the plurality of pins of the circuit component to have a length compatible with a depth of a corresponding via of the circuit board.

Abstract: A circuit device for interconnecting first and second multilayer circuit boards is described herein. The first multilayer circuit board may include a first plurality of electrically conductive vias of varying depths and the second multilayer circuit board may include a second plurality of electrically conductive vias. The circuit device comprises a first plurality of pins located on a first side of the circuit device corresponding to the first plurality of electrically conductive vias of the first multilayer circuit board, each pin having a length compatible with a depth of a respective one of the first plurality of electrically conductive vias of the first multilayer circuit board. The circuit device further comprises a second plurality of pins located on a second side of the circuit device corresponding to the second plurality of electrically conductive vias of the second multilayer circuit board.

Abstract: A technique for improving power/ground flooding is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for improving power and ground flooding in a multilayer circuit board, the multilayer circuit board having a plurality of signal layers. The method may comprise forming a plurality of electrically conductive vias, wherein each of the plurality of electrically conductive vias extends through one or more of the plurality of signal layers. The method may also comprise routing signals associated with the plurality of electrically conductive vias, thereby creating at least one power/ground flooding channel. The method may additionally comprise forming at least one power/ground connection within the at least one power/ground flooding channel.

Abstract: Techniques for improved contact mapping in circuit devices are disclosed. In one particular exemplary embodiment, a technique may be realized as a circuit device comprising a circuit chip having a plurality of electrical contacts positioned at a surface of the circuit chip so as to form one or more channels at the surface, the one or more channels being substantially devoid of electrical contacts such that one or more corresponding channels are formed in a chip carrier for routing electrically conductive traces from one or more of the plurality of electrical contacts on a routing layer of the chip carrier.

Abstract: Techniques for reducing the number of layers in a multilayer signal routing device are disclosed. In one particular exemplary embodiment, the techniques may be realized as a method wherein the multilayer signal routing device has a plurality of electrically conductive signal path layers for routing a plurality of electrical signals thereon. The method may comprise forming a plurality of electrically conductive vias in the multilayer signal routing device for electrically connecting at least two of the plurality of electrically conductive signal path layers, wherein the plurality of vias are arranged so as to form at least one channel in at least one other of the plurality of electrically conductive signal path layers. The method may also comprise grouping at least a portion of the plurality of electrical signals based at least in part upon their proximity to the at least one channel so that they may be efficiently routed therein.

Abstract: Exemplary techniques for providing a test point in a printed circuit board (PCB) or other circuit device that minimizes or eliminates intrusive effects in the transmitted as well as the monitored data signal are disclosed. A deposited resistor is used to provide a connection between a signal electrode and a transmission line of the PCB. Where the transmission line is embedded, the PCB may also include a tap to connect the signal layer of the PCB (having the embedded transmission line) with the signal electrode at the surface layer of the PCB. The deposited resistor is intended to act as a voltage-divider resistor and to buffer any perturbations of the system resulting from the tap and the introduction of a probe. Additionally, the deposited resistor may be positioned relative to the transmission line as to provide a equalization capacitance to compensate for parasitic capacitance.

Abstract: A technique for accommodating electronic components on a multilayer signal routing device is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for accommodating electronic components on a multilayer signal routing device. Such a method comprises determining a component space that is required to accommodate a plurality of electronic components on a surface of a multilayer signal routing device, and then forming at least one signal routing channel on at least the surface of the multilayer signal routing device, wherein the at least one signal routing channel has a channel space that is equal to or greater than the component space.

Abstract: A technique for increasing electronic component density on circuitry boards is disclosed. In one embodiment, the technique is realized as a method for increasing electronic component density on an electronic circuit board. The electronic circuit board has an electrically conductive signal layer formed on a dielectric layer, wherein the electrically conductive signal layer has a plurality of electrically conductive pads formed therein. The method comprises forming a cavity in the electronic circuit board extending through the electrically conductive signal layer and the dielectric layer.

Abstract: Time cycles in the physical layer of a passive optical network may be shared by multiple transmitting network devices (ONUs) to enable transmission of time sensitive traffic in a time sensitive manner. By allocating channels within the cyclic frame structure of the physical layer of the network, transmission of data from the ONUs to the OLT may be smoothed to enhance time dependent characteristics of the network. Where the underlying physical layer is a SONET/SDH based network, each SONET/SDH frame is divided into a given number of channels, such as 125 channels each of which is 1 &mgr;S long. Each ONU is allocated one or more channels on each frame in which to transmit data to the OLT. The total bandwidth allocated to a given ONU is determined based on the number of channels allocated to that ONU.

Abstract: A technique for reducing the number of layers in a multilayer circuit board is disclosed. The multilayer circuit board has a plurality of electrically conductive signal layers for routing electrical signals to and from at least one electronic component mounted on a surface of the multilayer circuit board. In one embodiment, the technique is realized by a method for reducing the number of layers in a multilayer circuit board, the multilayer circuit board having a plurality of electrically conductive signal layers for routing electrical signals to and from at least one electronic component mounted on a surface of the multilayer circuit board.

Abstract: A technique for reducing the number of layers in a multilayer signal routing device is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for reducing the number of layers in a multilayer signal routing device having a plurality of electrically conductive signal path layers for routing electrical signals to and from at least one electronic component mounted on a surface of the multilayer signal routing device. In such a case, the method comprises routing electrical signals on the plurality of electrically conductive signal path layers in the multilayer signal routing device for connection to and from a high density electrically conductive contact array package based at least in part upon at least one of an electrically conductive contact signal type characteristic and an electrically conductive contact signal direction characteristic.

Abstract: A technique for electrically interconnecting electrical signals between an electronic component and a multilayer signal routing device is disclosed. In one particular exemplary embodiment, the technique may be realized as an interconnect array for electrically interconnecting electrical signals between an electronic component and a multilayer signal routing device having a plurality of electrically conductive signal path layers. In such a case, the interconnect array comprises a plurality of electrically conductive contacts grouped into a plurality of arrangements of electrically conductive contacts, wherein each of the plurality of arrangements of electrically conductive contacts are separated from other adjacent ones of the plurality of arrangements of electrically conductive contacts by a channel that is correspondingly formed in the multilayer signal routing device such that an increased number of electrical signals may be routed therein on the plurality of electrically conductive signal path layers.

Abstract: A technique for providing a multi-layer substrate which is capable of signal transmission at multiple propagation speeds is disclosed. In one embodiment, the technique is realized by constructing a multi-layer substrate by creating air channels in dielectric layers adjacent to a conductor. The air channels may also be filled with an alternative dielectric material. At least three types of multi-layer substrates may be produced through this technique. Furthermore, signal tracks of varying lengths can be provided to accommodate differing delays.

Abstract: A technique for electrically interconnecting a signal between a first circuit board and a second circuit board is disclosed. In each board, at least one signal conductor is shielded by an electrically conductive shield. Multiple conductors may be shielded by the same shield. A first opening is formed in the electrically conductive shield of the first circuit board and a second opening is formed in the electrically conductive shield of the second circuit board so as to expose the signal conductor in the each circuit board. An electrically conductive adhesive, reflowed solder paste, or interposer/elastomer device is applied surrounding at least one of the openings and may further be applied within at least one of the openings. The first circuit board and the second circuit board are then positioned such that the first opening and the second opening are aligned and a signal propagating along the first signal conductor is electrically interconnected to the second signal conductor.

Abstract: A technique for improving signal reach and signal integrity when using high bit rates or high signal frequencies is provided. A multi-layer substrate comprises a conductor having a continuous main path and discrete spaced edges protruding from opposing edges of the continuous main path. A first spacer layer is disposed on a first side of the conductor, the first a spacer layer having an air channel substantially coextensive with the continuous main path and a solid portion overlapping with the discrete spaced edges. A second spacer layer is disposed on a second side of the conductor, the second spacer layer having an air channel substantially coextensive with the continuous main path of the conductor and a solid portion overlapping with the discrete spaced edges.

Abstract: A technique for facilitating signal transmission at high signal frequencies in a multi-layer substrate is disclosed. In one embodiment a multi-layer substrate comprises a conductor or pair of conductors, a first dielectric layer on a first side of the conductor or pair of conductors and a second dielectric layer on a second side of the conductor or pair of conductors. An air channel is provided in the first dielectric layer, the air channel formed to be substantially coextensive with the conductor or pair of conductors. A conductive shield surrounds the conductor or pair of conductors, the first dielectric layer, and the second dielectric layer in order to eliminate crosstalk. The conductor or pair of conductors may have discrete spaced edges and the width of the conductor or pair of conductors may be increased in order to adjust the impedance because of the low dielectric constant of air. Furthermore, additional air channels and a supporting layer may be included in the structure.

Abstract: A technique for eliminating electrically conductive vias is disclosed. In one embodiment, the technique is realized as an improved multilayer circuit board for eliminating electrically conductive vias. The multilayer circuit board has a top layer and a buried layer separated by at least one dielectric layer, wherein the buried layer includes an electrically conductive power plane portion and an electrically conductive ground plane portion. The improvement comprises a cavity in the multilayer circuit board extending through the top layer and the at least one dielectric layer so as to expose at least a portion of the power plane portion and the ground plane portion of the buried layer within the cavity.