Patents by Inventor Hideo Arai

Hideo Arai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040076399
    Abstract: The present invention makes possible recording motion pictures accurately starting at a point where a start recording event is received. The recording includes those pictures prior to the start recording event using a picture compressing method that compresses pictures both before and after the starting event, typically using the MPEG2 compression system. To make the above recording method possible, the present invention provides a signal processor and a photographic device that can search a motion vector for changing the object searching range properly, set an compression amount allocation for each picture type, and allow optimized parameters to be set when a start recording event is generated. The pictures processed before the start recording event is generated are stored in a memory buffer and on a recording medium so as to be used for recording or reproduction data entered after the recording starting time.
    Type: Application
    Filed: September 2, 2003
    Publication date: April 22, 2004
    Applicant: Hitachi, Ltd.
    Inventors: Hideo Arai, Yikitoshi Tsuboi, Takashi Nishimura, Eiichi Tanaka, Akira Motosu, Masuo Oku
  • Publication number: 20040008977
    Abstract: An apparatus and method for transmitting and receiving digital information includes a transmitting part for transmitting digital video information and digital audio information and receiving part for receiving digital video information and digital audio information. The transmitting part includes a first compressor for digital video information, a second compressor for digital audio information, a parity signal adder, a modulator, and a transmitter. The receiving part includes a receiver which receives digital information which is digital video information bit-compressed by a first compression system plus digital audio information bit-compressed by a second compression system, and to which has been added a parity signal for error detecting, phase-modulated and transmitted to a transmission path; a demodulator; an error detector, a first expander which bit-expands video information, and a second expander which bit-expands audio information.
    Type: Application
    Filed: June 26, 2003
    Publication date: January 15, 2004
    Inventors: Hideo Arai, Hitoaki Owashi, Kyoichi Hosokawa, Keizo Nishimura, Yoshizumi Watatani, Akira Shibata
  • Patent number: 6643453
    Abstract: The present invention makes possible recording motion pictures accurately starting at a point where a start recording event is received. The recording includes those pictures prior to the start recording event using a picture compressing method that compresses pictures both before and after the starting event, typically using the MPEG2 compression system. To make the above recording method possible, the present invention provides a signal processor and a photographic device that can search a motion vector for changing the object searching range properly, set an compression amount allocation for each picture type, and allow optimized parameters to be set when a start recording event is generated. The pictures processed before the start recording event is generated are stored in a memory buffer and on a recording medium so as to be used for recording or reproduction data entered after the recording starting time.
    Type: Grant
    Filed: August 26, 1999
    Date of Patent: November 4, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Arai, Yikitoshi Tsuboi, Takashi Nishimura, Eiichi Tanaka, Akira Motosu, Masuo Oku
  • Patent number: 6590726
    Abstract: An apparatus and method for transmitting and receiving digital information includes a transmitting part for transmitting digital video information and digital audio information and receiving part for receiving digital video information and digital audio information. The transmitting part includes a first compressor for digital video information, a second compressor for digital audio information, a parity signal adder, a modulator, and a transmitter. The receiving part includes a receiver which receives digital information which is digital video information bit-compressed by a first compression system plus digital audio information bit-compressed by a second compression system, and to which has been added a parity signal for error detecting, phase-modulated and transmitted to a transmission path; a demodulator; an error detector, a first expander which bit-expands video information, and a second expander which bit-expands audio information.
    Type: Grant
    Filed: October 23, 2002
    Date of Patent: July 8, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Arai, Hitoaki Owashi, Kyoichi Hosokawa, Keizo Nishimura, Yoshizumi Watatani, Akira Shibata
  • Publication number: 20030039044
    Abstract: An apparatus and method for transmitting and receiving digital information includes a transmitting part for transmitting digital video information and digital audio information and receiving part for receiving digital video information and digital audio information. The transmitting part includes a first compressor for digital video information, a second compressor for digital audio information, a parity signal adder, a modulator, and a transmitter. The receiving part includes a receiver which receives digital information which is digital video information bit-compressed by a first compression system plus digital audio information bit-compressed by a second compression system, and to which has been added a parity signal for error detecting, phase-modulated and transmitted to a transmission path; a demodulator; an error detector, a first expander which bit-expands video information, and a second expander which bit-expands audio information.
    Type: Application
    Filed: October 23, 2002
    Publication date: February 27, 2003
    Inventors: Hideo Arai, Hitoaki Owashi, Kyoichi Hosokawa, Keizo Nishimura, Yoshizumi Watatani, Akira Shibata
  • Publication number: 20030016878
    Abstract: In the coding of a dynamic image signal that conforms to the MPEG-2 Standard, when one-picture two-path coding is performed, the capacity of a memory for storing one-picture image data is reduced while lowering a throughput to be executed repetitively. Further, a throughput for estimating a generated code amount is reduced. This dynamic image compression coding apparatus has a memory that splits quantization processing into division processing using a quantization matrix and division processing using a quantization scale and temporarily stores one-picture data after quantization using the quantization matrix. In the first coding performed for estimating a code amount generated every macro block, the quantization processing is performed using a bit shift instead of division. Further, round-off processing in the quantization processing is substituted for round-down processing.
    Type: Application
    Filed: August 31, 2001
    Publication date: January 23, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Akira Motosu, Hideo Arai
  • Patent number: 6498691
    Abstract: A digital information transmitting, receiving and/or recording/reproducing system, provided with the digital information transmitting apparatus for transmitting the digital information to a transmission path, a receiving apparatus for receiving the transmitted digital information and a recording/reproducing apparatus for the recording received digital information to a recording media and reproducing therefrom. The apparatus includes a compressor which compresses the digital information, a transmission parity signal adder which adds a transmission parity signal to the output signal of the compressor in order to correct an error occurring in the transmission path, wherein the transmission parity signal is different from a record parity signal to be added at the recording apparatus and a transmitter which transmits the transmission parity signal added compressed digital information added by the transmission parity signal adder to the transmission path.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: December 24, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Arai, Hitoaki Owashi, Kyoichi Hosokawa, Keizo Nishimura, Yoshizumi Watatani, Akira Shibata
  • Publication number: 20020104092
    Abstract: In on-demand distribution, suitable image information corresponding to a receiver terminal and a distribution line is distributed and, even when a user uses a plurality of receiver terminals, distribution can be interrupted and resumed. By selecting and/or processing resolution information, advertisement image information, text information, and reproduction time information of the received-image information based on information relating to a receiver terminal and information relating to a distribution line provided separately, an image distribution apparatus distributes suitable image information corresponding to the receiver terminal and distribution line. When the distribution was interrupted, the apparatus stores a break point at which the distribution was interrupted for each user.
    Type: Application
    Filed: March 30, 2001
    Publication date: August 1, 2002
    Inventors: Hideo Arai, Takashi Nishimura, Tetsuya Oosawa, Akira Motosu
  • Publication number: 20010052105
    Abstract: A digital information transmitting, receiving and/or recording/reproducing system, provided with the digital information transmitting apparatus for transmitting the digital information to a transmission path, a receiving apparatus for receiving the transmitted digital information and a recording/reproducing apparatus for the recording received digital information to a recording media and reproducing therefrom. The apparatus includes a compressor which compresses the digital information, a transmission parity signal adder which adds a transmission parity signal to the output signal of the compressor in order to correct an error occurring in the transmission path, wherein the transmission parity signal is different from a record parity signal to be added at the recording apparatus and a transmitter which transmits the transmission parity signal added compressed digital information added by the transmission parity signal adder to the transmission path.
    Type: Application
    Filed: March 16, 2001
    Publication date: December 13, 2001
    Inventors: Hideo Arai, Hitoaki Owashi, Kyoichi Hosokawa, Keizo Nishimura, Yoshizumi Watatani, Akira Shibata
  • Patent number: 6324025
    Abstract: A digital information transmitting apparatus includes a first bit-compressor for bit-compressing a digital video information by a system of discrete cosine transform and a second bit-compressor for bit-compressing a digital audio information by a different system from the system of the first bit-compressor. A parity signal adder is provided for adding a parity signal to the bit-compressed digital video information from the first bit-compressor and the bit-compressed digital audio information from the second bit-compressor, in order to correct an error which occurs in a transmission path. A modulator is provided for phase-modulating the bit-compressed digital video information and the bit-compressed audio information, to which the parity signal has been added by the parity signal adder, and a transmitter ig provided for transmitting the modulated and parity signal added bit-compressed digital video information and bit-compressed digital audio information from the modulator, to the transmission path.
    Type: Grant
    Filed: September 5, 2000
    Date of Patent: November 27, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Arai, Hitoaki Owashi, Kyoichi Hosokawa, Keizo Nishimura, Yoshizumi Watatani, Akira Shibata
  • Patent number: 6278564
    Abstract: A digital information transmitting, receiving and/or recording/reproducing system, provided with the digital information transmitting apparatus for transmitting the digital information to a transmission path, a receiving apparatus for receiving the transmitted digital information and a recording/reproducing apparatus for the recording received digital information to a recording media and reproducing therefrom. The apparatus includes a compressor which compresses the digital information, a transmission parity signal adder which adds a transmission parity signal to the output signal of the compressor in order to correct an error occurring in the transmission path, wherein the transmission parity signal is different from a record parity signal to be added at the recording apparatus and a transmitter which transmits the transmission parity signal added compressed digital information added by the transmission parity signal adder to the transmission path.
    Type: Grant
    Filed: May 9, 2000
    Date of Patent: August 21, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Arai, Hitoaki Owashi, Kyoichi Hosokawa, Keizo Nishimura, Yoshizumi Watatani, Akira Shibata
  • Patent number: 6069757
    Abstract: A digital information recording/reproducing apparatus and method thereof including a parity signal adder which receives error corrected compressed information which has been corrected based upon a first parity signal added to the compressed information and in which the parity signal adder adds a second parity signal to the compressed information which is different from the first parity signal.
    Type: Grant
    Filed: June 7, 1999
    Date of Patent: May 30, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Arai, Hitoaki Owashi, Kyoichi Hosokawa, Keizo Nishimura, Yoshizumi Watatani, Akira Shibata
  • Patent number: 6002536
    Abstract: A processing system and a recording/reproducing system for a digital signal including a digital video signal and a digital audio signal are disclosed. Upon transmission, the digital signal is transmitted after time-base compression and modulation. The transmitted signal is received and demodulated. In the case where the signal is to be transmitted to a plurality of recording/reproducing systems, address signals designating ones of the plural recording/reproducing systems and a control signal for controlling the start/stop of recording are transmitted. The recording by the recording/reproducing system is controlled so that it is made with the same format in either normal-speed or high-speed mode or in either normal or multiple recording mode.
    Type: Grant
    Filed: November 10, 1998
    Date of Patent: December 14, 1999
    Assignee: Hitachi Ltd.
    Inventors: Hideo Arai, Hitoaki Owashi, Kyoichi Hosokawa, Keizo Nishimura, Yoshizumi Watatani, Akira Shibata
  • Patent number: 5937430
    Abstract: A buffer circuit comprises a storage unit for storing input data, a control unit for controlling an output of input data to an external circuit either directly or via the storage unit by writing the input data into the storage unit and then reading the input data out therefrom, and a selection unit for selecting for an output either the input data for direct output or the input data written into and then read out from the memory unit. The control unit determines whether input data exist and whether the external circuit is ready for receiving output data, and controls, based on a result of the determination, the output of the selection unit to the external circuit.
    Type: Grant
    Filed: July 22, 1996
    Date of Patent: August 10, 1999
    Assignee: Fujitsu Limited
    Inventors: Minoru Saitoh, Hideo Arai
  • Patent number: 5862004
    Abstract: A processing system and a recording/reproducing system for a digital signal including a digital video signal and a digital audio signal are disclosed. Upon transmission, the digital signal is transmitted after time-base compression and modulation. The transmitted signal is received and demodulated. In the case where the signal is to be transmitted to a plurality of recording/reproducing systems, address signals designating ones of the plural recording/reproducing systems and a control signal for controlling the start/stop of recording are transmitted. The recording by the recording/reproducing system is controlled so that it is made with the same format in either normal-speed or high-speed mode or in either normal or multiple recording mode.
    Type: Grant
    Filed: August 25, 1997
    Date of Patent: January 19, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Arai, Hitoaki Owashi, Kyoichi Hosokawa, Keizo Nishimura, Yoshizumi Watatani, Akira Shibata
  • Patent number: 5757824
    Abstract: A product code block generated by adding an outer code block and an inner code block to digital information signal arranged in matrix is received at least twice by a code error correction apparatus. In decoding the first received product code block by use of an inner code parity, an error flag is set for an inner code block having an uncorrectable error by an inner code parity. In decoding the second received product code block by use of an inner code parity, the error flag is referenced so that an inner code block that could be correctly decoded or corrected in the second decoding of all the inner code blocks having an uncorrectable error in the first decoding is replaced by the second inner code block. Also, the check information such as a check sum is generated and stored each time of receiving, and an error flag is set for even an inner code block that could be corrected in either the first or second decoding, if the check sums for them fail to coincide with each other.
    Type: Grant
    Filed: January 25, 1993
    Date of Patent: May 26, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Arai, Keizo Nishimura, Yasuyuki Inoue
  • Patent number: 5699203
    Abstract: An information recording and/or reproducing apparatus including a record parity signal adder for receiving error corrected compressed information and an error corrected control signal both of which have been corrected based upon a transmission parity signal added to the compressed information and to the control signal. The record parity signal adder adds a record parity signal to the compressed information which is different from the transmission parity signal. A modulator is provided for modulating the record parity signal added compressed information and a recorder is provided for recording the compressed information modulated by said modulation means. A controller is provided for controlling a start of recording of the recorder based upon the error corrected control signal.
    Type: Grant
    Filed: March 22, 1996
    Date of Patent: December 16, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Arai, Hitoaki Owashi, Kyoichi Hosokawa, Keizo Nishimura, Yoshizumi Watatani, Akira Shibata
  • Patent number: 5673154
    Abstract: A receiving apparatus for receiving a transmitted bit-compressed signal and a transmitted control signal which controls a performance of a recording apparatus. The transmitted bit-compressed signal and the transmitted control signal are transmitted after adding of a parity signal thereto and effecting modulation thereof. The receiving apparatus includes a reception unit for receiving the transmitted bit-compressed signal and the transmitted control signal, a demodulator for demodulating the bit-compressed signal and the control signal outputted by the reception unit in a manner corresponding to the modulation thereof. An error correcting unit receives the demodulated bit-compressed signal and the demodulated control signal for correcting errors therein in accordance with the parity signal added thereto and for at least outputting an error-correcting bit-compressed signal and an error-corrected control signal.
    Type: Grant
    Filed: March 22, 1996
    Date of Patent: September 30, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Arai, Hitoaki Owashi, Kyoichi Hosokawa, Keizo Nishimura, Yoshizumi Watatani, Akira Shibata
  • Patent number: 5671095
    Abstract: A processing system and a recording/reproducing system for a digital signal including a digital video signal and a digital audio signal. Upon transmission, the digital signal is transmitted after time-base compression and modulation. The transmitted signal is received and demodulated. In the case where the signal is to be transmitted to a plurality of recording/reproducing systems, address signals designating ones of the plural recording/reproducing systems and a control signal for controlling the start/stop of recording are transmitted. The recording by the recording/reproducing system is controlled so that it is made with the same format in either normal-speed or high-speed mode or in either normal or multiple recording mode.
    Type: Grant
    Filed: May 5, 1994
    Date of Patent: September 23, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Arai, Hitoaki Owashi, Kyoichi Hosokawa, Keizo Nishimura, Yoshizumi Watatani, Akira Shibata
  • Patent number: 5530598
    Abstract: A processing system and a recording/reproducing system for a digital signal including a digital video signal and a digital audio signal are disclosed. Upon transmission, the digital signal is transmitted after time-base compression and modulation. The transmitted signal is received and demodulated. In the case where the signal is to be transmitted to a plurality of recording/reproducing systems, address signals designating ones of the plural recording/reproducing systems and a control signal for controlling the start/stop of recording are transmitted. The recording by the recording/reproducing system is controlled so that it is made with the same format in either normal-speed or high-speed mode or in either normal or multiple recording mode.
    Type: Grant
    Filed: June 1, 1995
    Date of Patent: June 25, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Arai, Hitoaki Owashi, Kyoichi Hosokawa, Keizo Nishimura, Yoshizumi Watatani, Akira Shibata