Patents by Inventor Hideto Sugawara

Hideto Sugawara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080176353
    Abstract: A high-luminance light emitting element is manufactured by a method comprising: forming a light emitting layer on a first surface of a GaP substrate including the first surface and a second surface opposed to the first surface and having an area smaller than the first area, the light emitting layer emitting light of a wavelength ? permitted to pass through the GaP substrate; forming a plurality of side surfaces on the GaP substrate to be respectively aslant by substantially the same angle to become narrower toward the second surface; and forming a plurality of depressions and protrusions as high as 0.1? to 3? on the side surfaces.
    Type: Application
    Filed: October 19, 2007
    Publication date: July 24, 2008
    Inventors: Hideto Sugawara, Yukio Watanabe, Hirohisa Abe, Kuniaki Konno
  • Patent number: 7355212
    Abstract: An InGaN active layer is formed on a sapphire substrate. A p-side electrode is formed on the InGaN active layer to supply an electric current to this InGaN active layer. The p-side electrode includes {circle around (1)} an Ni layer for forming an ohmic contact with a p-GaN layer, {circle around (2)} an Mo layer having a barrier function of preventing diffusion of impurities, {circle around (3)} an Al layer as a high-reflection electrode, {circle around (4)} a Ti layer having a barrier function, and {circle around (5)} an Au layer for improving the contact with a submount on a lead frame. The p-side electrode having this five-layered structure realizes an ohmic contact and high reflectance at the same time.
    Type: Grant
    Filed: May 4, 2005
    Date of Patent: April 8, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Haruhiko Okazaki, Hideto Sugawara
  • Publication number: 20080050854
    Abstract: A high-luminance light emitting element is manufactured by a method comprising: forming a light emitting layer on a first surface of a GaP substrate including the first surface and a second surface opposed to the first surface and having an area smaller than the first area, the light emitting layer emitting light of a wavelength ? permitted to pass through the GaP substrate; forming a plurality of side surfaces on the GaP substrate to be respectively aslant by substantially the same angle to become narrower toward the second surface; and forming a plurality of depressions and protrusions as high as 0.1? to 3? on the side surfaces.
    Type: Application
    Filed: October 19, 2007
    Publication date: February 28, 2008
    Inventors: Hideto Sugawara, Yukio Watanabe, Hirohisa Abe, Kuniaki Konno
  • Patent number: 7333523
    Abstract: A semiconductor laser device comprising: a first cladding layer of a first conductivity type; an active layer provided on the first cladding layer and having a quantum well structure; an overflow blocking layer of a second conductivity type provided on the overflow blocking layer. The active layer includes a region having an impurity concentration is 3×1017 cm?3 or more and having a thickness of 30 nm or less between the overflow blocking layer and a well layer in the active layer closet to the overflow blocking layer.
    Type: Grant
    Filed: July 11, 2006
    Date of Patent: February 19, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Tanaka, Hideto Sugawara, Chie Hongo, Yoshiyuki Harada, Masaaki Onomura
  • Patent number: 7221002
    Abstract: An InGaN active layer is formed on a sapphire substrate. A p-side electrode is formed on the InGaN active layer to supply an electric current to this InGaN active layer. The p-side electrode includes {circle around (1)} an Ni layer for forming an ohmic contact with a p-GaN layer, {circle around (2)} an Mo layer having a barrier function of preventing diffusion of impurities, {circle around (3)} an Al layer as a high-reflection electrode, {circle around (4)} a Ti layer having a barrier function, and {circle around (5)} an Au layer for improving the contact with a submount on a lead frame. The p-side electrode having this five-layered structure realizes an ohmic contact and high reflectance at the same time.
    Type: Grant
    Filed: October 4, 2004
    Date of Patent: May 22, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Haruhiko Okazaki, Hideto Sugawara
  • Publication number: 20070086496
    Abstract: A semiconductor light emitting device comprises: a first cladding layer made of nitride semiconductor of a first conductivity type; an active layer provided on the first cladding layer, the active layer including a first barrier layer made of nitride semiconductor, a second barrier layer made of nitride semiconductor, and a well layer made of nitride semiconductor, the well layer being provided between the first barrier layer and the second barrier layer; and a second cladding layer provided on the active layer, the second cladding layer being made of nitride semiconductor of a second conductivity type. The first and second barrier layers and the well layer contain indium. At least one of the first barrier layer and the second barrier layer has a thickness of 30 nm or more.
    Type: Application
    Filed: February 21, 2006
    Publication date: April 19, 2007
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Akira Tanaka, Chie Hongo, Yoshiyuki Harada, Hideto Sugawara, Masaaki Onomura, Hiroshi Katsuno
  • Patent number: 7180088
    Abstract: Nitride based semiconductor light-emitting devices are provided with a sufficiently low contact resistance p-type electrode. The nitride based semiconductor light-emitting devices include a p-type GaN contact layer, protrusions with fine recesses (uneven portions) formed on a surface of the p-type GaN contact layer, and a p-type electrode formed on the uneven portions.
    Type: Grant
    Filed: December 9, 2003
    Date of Patent: February 20, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hideto Sugawara
  • Patent number: 7179671
    Abstract: A method of manufacturing an LED forms an InGaN active layer on a substrate. A p-side electrode is formed on the InGaN active layer to supply an electric current to this InGaN active layer. The p-side electrode includes a nickel layer for forming an ohmic contact with a p-GaN layer, a molybdenum having a barrier function of preventing diffusion of impurities, an aluminum layer as a high-reflection electrode, a titanium layer having a barrier function, and a gold layer for improving the contact with a submount on a lead frame. Forming a p-side electrode with this five-layered structure realizes an ohmic contact and high reflectance at the same time.
    Type: Grant
    Filed: September 21, 2004
    Date of Patent: February 20, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Haruhiko Okazaki, Hideto Sugawara
  • Publication number: 20070009000
    Abstract: A semiconductor laser device comprising: a first cladding layer of a first conductivity type; an active layer provided on the first cladding layer and having a quantum well structure; an overflow blocking layer of a second conductivity type provided on the overflow blocking layer. The active layer includes a region having an impurity concentration is 3×1017 cm?3 or more and having a thickness of 30 nm or less between the overflow blocking layer and a well layer in the active layer closet to the overflow blocking layer.
    Type: Application
    Filed: July 11, 2006
    Publication date: January 11, 2007
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Akira Tanaka, Hideto Sugawara, Chie Hongo, Yoshiyuki Harada, Masaaki Onomura
  • Patent number: 7148518
    Abstract: A group-III nitride semiconductor stack comprises a single-crystal substrate, a first group-III nitride layer formed on a principal surface of the single-crystal substrate, a graded low-temperature deposited layer formed on the group-III nitride layer and made of nitride in which group-III element composition is continuously changed, and a second group-III nitride layer formed on the graded low-temperature deposited layer.
    Type: Grant
    Filed: March 23, 2004
    Date of Patent: December 12, 2006
    Inventors: Hideto Sugawara, Tsunenori Hiratsuka
  • Patent number: 7141445
    Abstract: There are provided a semiconductor light emitting device wherein the variation in tone in each device is small and the variation in tone due to deterioration with age is also small, and a method for manufacturing the same. The semiconductor light emitting device includes an active layer for emitting primary light having a first wavelength by current injection, and a light emitting layer excited by the primary light for emitting secondary light having a second wavelength different from said first wavelength, wherein the primary light and the secondary light are mixed to be outputted.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: November 28, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideto Sugawara, Koichi Nitta, Hirohisa Abe, Kuniaki Konno, Yasuo Idei
  • Patent number: 7138665
    Abstract: An InGaN active layer is formed on a sapphire substrate. A p-side electrode is formed on the InGaN active layer to supply an electric current to this InGaN active layer. The p-side electrode includes {circle around (1)} an Ni layer for forming an ohmic contact with a p-GaN layer, {circle around (2)} an Mo layer having a barrier function of preventing diffusion of impurities, {circle around (3)} an Al layer as a high-reflection electrode, {circle around (4)} a Ti layer having a barrier function, and {circle around (5)} an Au layer for improving the contact with a submount on a lead frame. The p-side electrode having this five-layered structure realizes an ohmic contact and high reflectance at the same time.
    Type: Grant
    Filed: September 22, 2004
    Date of Patent: November 21, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Haruhiko Okazaki, Hideto Sugawara
  • Patent number: 7138664
    Abstract: An InGaN active layer is formed on a sapphire substrate. A p-side electrode is formed on the InGaN active layer to supply an electric current to this InGaN active layer. The p-side electrode includes {circle around (1)} an Ni layer for forming an ohmic contact with a p-GaN layer, {circle around (2)} an Mo layer having a barrier function of preventing diffusion of impurities, {circle around (3)} an Al layer as a high-reflection electrode, {circle around (4)} a Ti layer having a barrier function, and {circle around (5)} an Au layer for improving the contact with a submount on a lead frame. The p-side electrode having this five-layered structure realizes an ohmic contact and high reflectance at the same time.
    Type: Grant
    Filed: September 22, 2004
    Date of Patent: November 21, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Haruhiko Okazaki, Hideto Sugawara
  • Patent number: 7135714
    Abstract: An InGaN active layer is formed on a sapphire substrate. A p-side electrode is formed on the InGaN active layer to supply an electric current to this InGaN active layer. The p-side electrode includes {circle around (1)} an Ni layer for forming an ohmic contact with a p-GaN layer, {circle around (2)} an Mo layer having a barrier function of preventing diffusion of impurities, {circle around (3)} an Al layer as a high-reflection electrode, {circle around (4)} a Ti layer having a barrier function, and {circle around (5)} an Au layer for improving the contact with a submount on a lead frame. The p-side electrode having this five-layered structure realizes an ohmic contact and high reflectance at the same time.
    Type: Grant
    Filed: September 22, 2004
    Date of Patent: November 14, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Haruhiko Okazaki, Hideto Sugawara
  • Publication number: 20060223288
    Abstract: A group-III nitride semiconductor stack comprises a single-crystal substrate, a first group-III nitride layer formed on a principal surface of the single-crystal substrate, a graded low-temperature deposited layer formed on the group-III nitride layer and made of nitride in which group-III element composition is continuously changed, and a second group-III nitride layer formed on the graded low-temperature deposited layer.
    Type: Application
    Filed: May 24, 2006
    Publication date: October 5, 2006
    Inventors: Hideto Sugawara, Tsunenori Hiratsuka
  • Publication number: 20060220044
    Abstract: A gallium nitride based semiconductor device comprises: a first gallium nitride based semiconductor film doped with magnesium; and a second gallium nitride based semiconductor film provided on the first gallium nitride based semiconductor film and doped with magnesium. The first gallium nitride based semiconductor film has substantially flat distributions of magnesium concentration and hydrogen atom concentration, and the magnesium concentration is higher than the hydrogen atom concentration. The second gallium nitride based semiconductor film has a first region in which the magnesium concentration decreases and the hydrogen atom concentration increases toward the surface, and the magnesium concentration in the first region is higher than the hydrogen atom concentration in the first region and higher than the magnesium concentration in the first gallium nitride based semiconductor film.
    Type: Application
    Filed: April 4, 2006
    Publication date: October 5, 2006
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hideto Sugawara, Chie Hongo
  • Publication number: 20050255615
    Abstract: A high-luminance light emitting element is manufactured by a method comprising: forming a light emitting layer on a first surface of a GaP substrate including the first surface and a second surface opposed to the first surface and having an area smaller than the first area, the light emitting layer emitting light of a wavelength ? permitted to pass through the GaP substrate; forming a plurality of side surfaces on the GaP substrate to be respectively aslant by substantially the same angle to become narrower toward the second surface; and forming a plurality of depressions and protrusions as high as 0.1? to 3? on the side surfaces.
    Type: Application
    Filed: July 22, 2005
    Publication date: November 17, 2005
    Inventors: Hideto Sugawara, Yukio Watanabe, Hirohisa Abe, Kuniaki Konno
  • Patent number: 6956241
    Abstract: A high-luminance light emitting element is manufactured by a method comprising: forming a light emitting layer on a first surface of a GaP substrate including the first surface and a second surface opposed to the first surface and having an area smaller than the first area, the light emitting layer emitting light of a wavelength ? permitted to pass through the GaP substrate; forming a plurality of side surfaces on the GaP substrate to be respectively aslant by substantially the same angle to become narrower toward the second surface; and forming a plurality of depressions and protrusions as high as 0.1 ? to 3 ? on the side surfaces.
    Type: Grant
    Filed: April 4, 2003
    Date of Patent: October 18, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideto Sugawara, Yukio Watanabe, Hirohisa Abe, Kuniaki Konno
  • Publication number: 20050218419
    Abstract: An InGaN active layer is formed on a sapphire substrate. A p-side electrode is formed on the InGaN active layer to supply an electric current to this InGaN active layer. The p-side electrode includes {circle over (1)} an Ni layer for forming an ohmic contact with a p-GaN layer, {circle over (2)} an Mo layer having a barrier function of preventing diffusion of impurities, {circle over (3)} an Al layer as a high-reflection electrode, {circle over (4)} a Ti layer having a barrier function, and {circle over (5)} an Au layer for improving the contact with a submount on a lead frame. The p-side electrode having this five-layered structure realizes an ohmic contact and high reflectance at the same time.
    Type: Application
    Filed: May 4, 2005
    Publication date: October 6, 2005
    Inventors: Haruhiko Okazaki, Hideto Sugawara
  • Publication number: 20050202581
    Abstract: Nitride based semiconductor light-emitting devices with a sufficiently low contact resistance p-type electrode and a method of manufacturing the same are disclosed. One such method of manufacturing nitride based semiconductor light-emitting devices includes steps of growing island-like AlGaN films 17 on p-type nitride based semiconductor layer 16, etching a surface of p-type type nitride based semiconductor layer 16 to make uneven portions 18 on its surface by using island-like AlGaN films 17 as a photomask, and forming of a p-type ohmic electrode on an electrode forming region of the uneven portion 18.
    Type: Application
    Filed: April 28, 2005
    Publication date: September 15, 2005
    Inventor: Hideto Sugawara