Patents by Inventor Hiroaki Fujimoto

Hiroaki Fujimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6565399
    Abstract: A number of embodiments of personal watercraft having catalytic exhaust systems for treating and purifying the exhaust gases. In all of the embodiments, the catalyst is positioned and disposed so as to be protected from water. In addition, arrangements are provided for cooling the catalyst, for circulating ventilating air across it, for isolating it from other components such as the fuel tank, and for permitting its flushing with fresh water after operating in a salt water environment.
    Type: Grant
    Filed: March 8, 2002
    Date of Patent: May 20, 2003
    Assignee: Sanshin Kogyo Kabushiki Kaisha
    Inventors: Ryoichi Nakase, Shigeyuki Ozawa, Hiroaki Fujimoto
  • Publication number: 20030089972
    Abstract: A semiconductor device includes: a wiring board; a first semiconductor chip, which has a circuitry side and a non-circuitry side that face each other vertically and which is electrically connected to the wiring board via a raised electrode, the circuitry side of the first chip facing the principal surface of the wiring board; and a second semiconductor chip, which has a circuitry side and a non-circuitry side that face each other vertically and which includes an external electrode on the circuitry side thereof. The non-circuitry sides of the first and second semiconductor chips are secured to each other. The external electrode of the second semiconductor chip is connected to the wiring board via a metal fine wire. The external and raised electrodes are so disposed as not to overlap each other as viewed vertically downward from over the principal surface of the wiring board.
    Type: Application
    Filed: December 17, 2002
    Publication date: May 15, 2003
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroaki Fujimoto, Yoshinobu Kunitomo, Takashi Yui
  • Publication number: 20030085458
    Abstract: A semiconductor device includes: a wiring board; a first semiconductor chip, which has a circuitry side and a non-circuitry side that face each other vertically and which is electrically connected to the wiring board via a raised electrode, the circuitry side of the first chip facing the principal surface of the wiring board; and a second semiconductor chip, which has a circuitry side and a non-circuitry side that face each other vertically and which includes an external electrode on the circuitry side thereof. The non-circuitry sides of the first and second semiconductor chips are secured to each other. The external electrode of the second semiconductor chip is connected to the wiring board via a metal fine wire. The external and raised electrodes are so disposed as not to overlap each other as viewed vertically downward from over the principal surface of the wiring board.
    Type: Application
    Filed: December 17, 2002
    Publication date: May 8, 2003
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroaki Fujimoto, Yoshinobu Kunitomo, Takashi Yui
  • Publication number: 20030085457
    Abstract: A semiconductor device includes: a wiring board; a first semiconductor chip, which has a circuitry side and a non-circuitry side that face each other vertically and which is electrically connected to the wiring board via a raised electrode, the circuitry side of the first chip facing the principal surface of the wiring board; and a second semiconductor chip, which has a circuitry side and a non-circuitry side that face each other vertically and which includes an external electrode on the circuitry side thereof. The non-circuitry sides of the first and second semiconductor chips are secured to each other. The external electrode of the second semiconductor chip is connected to the wiring board via a metal fine wire. The external and raised electrodes are so disposed as not to overlap each other as viewed vertically downward from over the principal surface of the wiring board.
    Type: Application
    Filed: December 17, 2002
    Publication date: May 8, 2003
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroaki Fujimoto, Yoshinobu Kunitomo, Takashi Yui
  • Patent number: 6559528
    Abstract: Disclosed is a semiconductor device 10 comprising a first semiconductor element 11 with an arrangement of first element electrodes 12, a second semiconductor element 13 with an arrangement of second element electrodes 14, a connection member 15 electrically connecting together a portion 12b of the first element electrodes 12 and the second element electrodes 14, an insulation layer 17 covering a major surface 11a of the first semiconductor element 11 and a backside surface 13b of the second semiconductor element 13, a wiring layer 22 formed on the insulation layer 17 and electrically connected to the first element electrode portion 12b exposed in an opening portion 21, and an external electrode 23 formed, as a portion of the wiring layer 22, on the insulation layer 17.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: May 6, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazumi Watase, Hiroaki Fujimoto, Ryuichi Sahara, Nozomi Shimoishizaka, Takahiro Kumakawa, Kazuyuki Kaino, Yoshifumi Nakamura
  • Publication number: 20030038359
    Abstract: Disclosed is a semiconductor device which comprises a semiconductor element having a plurality of electrodes, a plurality of external electrodes disposed around the periphery of the semiconductor element, a fine wire electrically connected between at least one of surfaces of each of the plural external electrodes and at least one of the plural electrodes of the semiconductor element, and an encapsulating resin which encapsulates the semiconductor element, the plural external electrodes, and the fine wires and whose external shape is a rectangular parallelepiped, wherein a bottom surface of the semiconductor element and a bottom surface of each of the plural external electrode are exposed from a bottom surface of the encapsulating resin and a top surface of the semiconductor element and a top surface of each of the plural external electrode are located substantially coplanar with each other.
    Type: Application
    Filed: September 30, 2002
    Publication date: February 27, 2003
    Inventors: Hiroaki Fujimoto, Tsuyoshi Hamatani, Toru Nomura
  • Publication number: 20030032263
    Abstract: A semiconductor wafer of the present invention includes: a plurality of semiconductor chip areas each of which is to be a semiconductor chip; and a cut-off area for separating the plurality of semiconductor chip areas from one another so as to obtain the semiconductor chips, wherein: an integrated circuit and an electrode pad connected to the integrated circuit are provided in each of the semiconductor chip areas; and a probe pad connected to the electrode pad is provided in the cut-off area.
    Type: Application
    Filed: July 24, 2002
    Publication date: February 13, 2003
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Koichi Nagao, Hiroaki Fujimoto
  • Publication number: 20030032216
    Abstract: A semiconductor device includes a first semiconductor chip provided with a first electrode on a first main surface and a second semiconductor chip provided with a second electrode on a second main surface. The first and the second semiconductor chips are integrated so that the first and second main surfaces are opposed to one another and the first and second electrodes are electrically connected. The second semiconductor chip is polished from the opposite side of the second main surface so that the second semiconductor chip has a thickness smaller than the thickness of the first semiconductor chip.
    Type: Application
    Filed: February 5, 2002
    Publication date: February 13, 2003
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yukiko Nakaoka, Kazuhiko Matsumura, Hideyuki Kaneko, Koichi Nagao, Hiroaki Fujimoto
  • Patent number: 6509638
    Abstract: A semiconductor device includes: a wiring board; a first semiconductor chip, which has a circuitry side and a non-circuitry side that face each other vertically and which is electrically connected to the wiring board via a raised electrode, the circuitry side of the first chip facing the principal surface of the wiring board; and a second semiconductor chip, which has a circuitry side and a non-circuitry side that face each other vertically and which includes an external electrode on the circuitry side thereof. The non-circuitry sides of the first and second semiconductor chips are secured to each other. The external electrode of the second semiconductor chip is connected to the wiring board via a metal fine wire. The external and raised electrodes are so disposed as not to overlap each other as viewed vertically downward from over the principal surface of the wiring board.
    Type: Grant
    Filed: September 6, 2001
    Date of Patent: January 21, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroaki Fujimoto, Yoshinobu Kunitomo, Takashi Yui
  • Patent number: 6498393
    Abstract: Disclosed is a semiconductor device which comprises a semiconductor element having a plurality of electrodes, a plurality of external electrodes disposed around the periphery of the semiconductor element, a fine wire electrically connected between at least one of surfaces of each of the plural external electrodes and at least one of the plural electrodes of the semiconductor element, and an encapsulating resin which encapsulates the semiconductor element, the plural external electrodes, and the fine wires and whose external shape is a rectangular parallelepiped, wherein a bottom surface of the semiconductor element and a bottom surface of each of the plural external electrode are exposed from a bottom surface of the encapsulating resin and a top surface of the semiconductor element and a top surface of each of the plural external electrode are located substantially coplanar with each other.
    Type: Grant
    Filed: December 26, 2000
    Date of Patent: December 24, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroaki Fujimoto, Tsuyoshi Hamatani, Toru Nomura
  • Patent number: 6478644
    Abstract: An exhaust pipe cooling system regulates the temperature of a exhaust system catalyzer on a small watercraft to ensure proper functioning and to inhibit overheating of the catalyzer. The cooling system supplies fresh water to a water jacket which surrounds the catalyzer in a manner independent of an engine cooling system. The cooling system also supplies fresh water to an upwardly oriented discharge nozzle. The upward water jet from the nozzle spays well above the surface of the body of water in which the watercraft is operated to provide a visible indicator of location of the small watercraft. A control valve regulate the flow rate of water through the cooling system to adjust the temperature of the catalyzer to fall within a desired range of operating temperatures.
    Type: Grant
    Filed: November 7, 1997
    Date of Patent: November 12, 2002
    Assignee: Yamaha Hatsudoki Kabushiki Kaisha
    Inventors: Shigeyuki Ozawa, Ryoichi Nakase, Hiroaki Fujimoto
  • Publication number: 20020151231
    Abstract: A number of embodiments of personal watercraft having catalytic exhaust systems for treating and purifying the exhaust gases. In all of the embodiments, the catalyst is positioned and disposed so as to be protected from water. In addition, arrangements are provided for cooling the catalyst, for circulating ventilating air across it, for isolating it from other components such as the fuel tank, and for permitting its flushing with fresh water after operating in a salt water environment.
    Type: Application
    Filed: March 8, 2002
    Publication date: October 17, 2002
    Inventors: Ryoichi Nakase, Shigeyuki Ozawa, Hiroaki Fujimoto
  • Publication number: 20020137254
    Abstract: A semiconductor device includes: a wiring substrate; a wiring electrode; a semiconductor chip; a connecting member; a resin encapsulant; and a mark member. The wiring electrode is formed on the wiring substrate. The semiconductor chip is mounted on the wiring substrate. An electrode pad formed on the semiconductor chip and the wiring electrode are electrically connected to each other with the connecting member. The semiconductor chip, the wiring electrode, and the connecting member, for example, are molded with the resin encapsulant on the upper surface of the wiring substrate. The mark member is embedded in the upper surface of the resin encapsulant. The mark member, which is transferred from a transfer sheet in a single process step, is highly visible and can be formed efficiently.
    Type: Application
    Filed: May 23, 2002
    Publication date: September 26, 2002
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Masanori Minamio, Hiroaki Fujimoto, Ryuichi Sahara, Toshiyuki Fukuda, Toru Nomura
  • Publication number: 20020105094
    Abstract: A semiconductor device includes a semiconductor chip, an insulating layer formed on a region excluding the plurality of electrode pads on the principal surface of the semiconductor chip, a plurality of contact pads arranged on the insulating layer, a wiring layer electrically connected to at least one of the plurality of electrode pads and electrically connected to at least one of the plurality of contact pads, thereby establishing rewiring connection, an insulative resin layer formed on a region excluding the plurality of contact pads on the principal surface of the semiconductor chip, a protruded electrode provided on each of the plurality of contact pads, and an underfill material layer provided on the insulative resin layer in such a manner that the top of the protruded electrode is exposed.
    Type: Application
    Filed: February 6, 2002
    Publication date: August 8, 2002
    Applicant: Matsuhita Electric Industrial Co., Ltd.
    Inventors: Ryuichi Sahara, Hiroaki Fujimoto
  • Publication number: 20020083906
    Abstract: Cooling arrangements that cool down fuel injectors exposed to the high temperature combustion in direct injected engines so that no heavy oil components deposit on nozzles of the fuel injectors. A bypass of water flow extends in the proximity of the boss where the fuel injector is inserted to expedite cooling of the fuel injector. A cavity extending toward the boss can replace the bypass or can be additionally provided. The fuel injector boss and a spark plug boss are connected with each other and make a wall that can obstruct water flow. Another bypass is provided to clear water away from a backwater formed at the wall. In case that some heavy oil components deposit on the injector nozzles for some reasons, a control system for controlling the fuel injection is allowed to adjust amounts of the fuel basically in response to the temperature of the injector nozzle.
    Type: Application
    Filed: October 1, 2001
    Publication date: July 4, 2002
    Inventors: Masahiko Kato, Takayuki Sato, Hiroaki Fujimoto
  • Publication number: 20020050631
    Abstract: A semiconductor device includes: a wiring substrate; a wiring electrode; a semiconductor chip; a connecting member; and a resin encapsulant. The wiring electrode is formed on the wiring substrate. The semiconductor chip is mounted on the wiring substrate and a second bottom face of the semiconductor chip is in contact with the wiring substrate. An electrode pad formed on the semiconductor chip and the wiring electrode are electrically connected to each other with the connecting member. The semiconductor chip, the wiring electrode, and the connecting member, for example, are molded with the resin encapsulant on the upper surface of the wiring substrate. A level difference exists between a first bottom face and the second bottom face of the semiconductor chip. The first and second bottom faces are respectively located at a peripheral portion and a central portion of the semiconductor chip. A part of the resin encapsulant is interposed between the first bottom face and the upper surface of the wiring substrate.
    Type: Application
    Filed: October 24, 2001
    Publication date: May 2, 2002
    Inventors: Masanori Minamio, Hiroaki Fujimoto, Ryuichi Sahara, Toshiyuki Fukuda, Toru Nomura
  • Publication number: 20020052056
    Abstract: A semiconductor device includes: a wiring substrate; a wiring electrode; a semiconductor chip; a connecting member; a resin encapsulant; and a mark member. The wiring electrode is formed on the wiring substrate. The semiconductor chip is mounted on the wiring substrate. An electrode pad formed on the semiconductor chip and the wiring electrode are electrically connected to each other with the connecting member. The semiconductor chip, the wiring electrode, and the connecting member, for example, are molded with the resin encapsulant on the upper surface of the wiring substrate. The mark member is embedded in the upper surface of the resin encapsulant. The mark member, which is transferred from a transfer sheet in a single process step, is highly visible and can be formed efficiently.
    Type: Application
    Filed: October 24, 2001
    Publication date: May 2, 2002
    Inventors: Masanori Minamio, Hiroaki Fujimoto, Ryuichi Sahara, Toshiyuki Fukuda, Toru Nomura
  • Publication number: 20020027275
    Abstract: A semiconductor device includes: a wiring board; a first semiconductor chip, which has a circuitry side and a non-circuitry side that face each other vertically and which is electrically connected to the wiring board via a raised electrode, the circuitry side of the first chip facing the principal surface of the wiring board; and a second semiconductor chip, which has a circuitry side and a non-circuitry side that face each other vertically and which includes an external electrode on the circuitry side thereof. The non-circuitry sides of the first and second semiconductor chips are secured to each other. The external electrode of the second semiconductor chip is connected to the wiring board via a metal fine wire. The external and raised electrodes are so disposed as not to overlap each other as viewed vertically downward from over the principal surface of the wiring board.
    Type: Application
    Filed: September 6, 2001
    Publication date: March 7, 2002
    Inventors: Hiroaki Fujimoto, Yoshinobu Kunitomo, Takashi Yui
  • Publication number: 20010040286
    Abstract: Disclosed is a semiconductor device which comprises a semiconductor element having a plurality of electrodes, a plurality of external electrodes disposed around the periphery of the semiconductor element, a fine wire electrically connected between at least one of surfaces of each of the plural external electrodes and at least one of the plural electrodes of the semiconductor element, and an encapsulating resin which encapsulates the semiconductor element, the plural external electrodes, and the fine wires and whose external shape is a rectangular parallelepiped, wherein a bottom surface of the semiconductor element and a bottom surface of each of the plural external electrode are exposed from a bottom surface of the encapsulating resin and a top surface of the semiconductor element and a top surface of each of the plural external electrode are located substantially coplanar with each other.
    Type: Application
    Filed: December 26, 2000
    Publication date: November 15, 2001
    Inventors: Hiroaki Fujimoto, Tsuyoshi Hamatani, Toru Nomura
  • Patent number: 6295955
    Abstract: Cooling arrangements that cool down fuel injectors exposed to the high temperature combustion in direct injected engines so that no heavy oil components deposit on nozzles of the fuel injectors. A bypass of water flow extends in the proximity of the boss where the fuel injector is inserted to expedite cooling of the fuel injector. A cavity extending toward the boss can replace the bypass or can be additionally provided. The fuel injector boss and a spark plug boss are connected with each other and make a wall that can obstruct water flow. Another bypass is provided to clear water away from a backwater formed at the wall. In case that some heavy oil components deposit on the injector nozzles for some reasons, a control system for controlling the fuel injection is allowed to adjust amounts of the fuel basically in response to the temperature of the injector nozzle.
    Type: Grant
    Filed: March 26, 1999
    Date of Patent: October 2, 2001
    Assignee: Sanshin Kogyo Kabushiki Kaisha
    Inventors: Masahiko Kato, Takayuki Sato, Hiroaki Fujimoto