Abstract: A semiconductor device includes a substrate, a plurality of bump electrodes disposed on the substrate, and a support area for supporting the substrate in case of carrying the substrate. The support area is disposed on a surface of the substrate, on which the bump electrode is disposed, and is disposed at a predetermined position, which is dotted on the surface of the substrate. In this device, the support area is sufficiently small, and the number of the bump electrodes can increase. Moreover, degree of freedom in a configuration of the support area increases.

Abstract: In a voltage booster, a voltage detection circuit detects a battery voltage as an input voltage. If the input voltage is lower than a threshold level, an oscillation circuit outputs a gate signal having a relatively high frequency to increase the driving performance of a driving circuit. If the input voltage is higher than the threshold level, the frequency of the gate signal is lowered so as to prevent the driving performance of the driving circuit from rising to an excessively high value. As a result, a predetermined boosted voltage can be obtained regardless of variations in input voltage without using a filter for eliminating noise.

Abstract: A photographic light-sensitive material having a support having a thickness of from 160 to 225 ?m is processed with an automatic developing apparatus, in which at least one of rollers of a developing part, a fixing part and a rinsing rack part of the automatic developing apparatus has a surface mainly containing a nonpolar polymer substance and having a center line surface roughness (Ra) of 20 ?m or less. By using the automatic developing apparatus, dusts generated in the apparatus can be easily removed with a cleaning film.

Abstract: The semiconductor output circuit of the invention has an insulated gate transistor including a first terminal, a second terminal and a gate terminal, a conductive state of the insulated gate transistor being controlled by a drive circuit connected to the gate terminal, a capacitive element and a first resistor connected in series between the second terminal and the gate terminal, and a second resistor connected between the gate terminal and the first terminal. The insulated gate transistor has a cell area formed on a semiconductor substrate, in which a plurality of unit cells each defining a unit transistor connected between the first and second terminals are laid out. The second resistor has such a resistance that all of the unit transistors defined by the unit cells are turned on uniformly when electrostatic discharge is applied to the first or second terminal.

Abstract: Semiconductor equipment includes a semiconductor substrate, a plurality of transistors having a source cell and a drain cell disposed alternately on the substrate, and upper and lower layer wirings for electrically connecting the source cells and the drain cells. The lower layer wiring includes a first source wiring for connecting the neighboring source cells and a first drain wiring for connecting the neighboring drain cells. The upper layer wiring includes a second source wiring for connecting to the first source wiring and a second drain wiring for connecting to the first drain wiring. A width of the second source wiring is wider than that of the first source wiring, and a width of the second drain wiring is wider than that of the first drain wiring. The second source wiring and the second drain wiring are disposed alternately.

Abstract: A reference voltage circuit and an operational amplifier operate when an output voltage is produced from an output terminal of a power supply circuit. When the output voltage is low in the rising phase of a power source voltage, a transistor Q17 in a startup circuit turns on and a transistor Q14 turns off to surely turn on transistors Q11 and Q12. Upon the output voltage exceeding a predetermined level, the transistor Q17 turns off and an ordinary feedback control starts.

Abstract: In the clamp circuit, the first transistor shifts a target clamp voltage by a gate-source voltage to output the target clamp voltage. The buffer circuit inputs the shifted voltage and output a reference voltage on the inputted shifted voltage. The gate of the second transistor is connected to the output terminal of the buffer circuit. The source of the second transistor is connected to the input terminal of the first transistor. In this structure, the reference voltage is supplied to the gate of the second transistor so that, when a terminal voltage of the input terminal of the IC is not less than a clamp voltage corresponding to the sum of the reference voltage and a threshold voltage of the second transistor, the second transistor turns on, whereby the terminal voltage is clamped to a clamp voltage related to the target clamp voltage.

Abstract: A light-sensitive material package includes a light-shielding envelope containing a stack of sheet-form light-sensitive material, the light-shielding envelope having heat-seal parts on four edges. The light-sensitive material package further includes a cushioning member, which holds down all or a part of the heat-seal parts. The light-sensitive material package further includes a fitting-type box for storing the envelope, the fitting-type box being formed from an inner box and a lid. The stiffness of the heat-seal parts is at least 0.05 N·cm.

Abstract: In a circuit according to the present invention, a multi-collector transistor is provided which includes first to third collectors so that, when a current does not flow from the second collector, a current from the first collector increases but a current from the third collector does not vary. When transistors of the circuit turn off because the voltage of an input signal gets out of an in-phase input voltage range, the supply of the current from the second collector comes to a stop and, hence, the current from the first collector increases. In this situation, further transistors carry out their on/off operations, thereby fixing the output of the circuit to a low level. That is, this circuit can, irrespective of poor pair compatibility between the transistors, fix the output logical level to a desired level when the voltage of an input signal gets out of an in-phase input voltage range.

Abstract: In a voltage booster, a voltage detection circuit detects a battery voltage as an input voltage. If the input voltage is lower than a threshold level, an oscillation circuit outputs a gate signal having a relatively high frequency to increase the driving performance of a driving circuit. If the input voltage is higher than the threshold level, the frequency of the gate signal is lowered so as to prevent the driving performance of the driving circuit from rising to an excessively high value. As a result, a predetermined boosted voltage can be obtained regardless of variations in input voltage without using a filter for eliminating noise.

Abstract: Semiconductor equipment includes a semiconductor substrate, a plurality of transistors having a source cell and a drain cell disposed alternately on the substrate, and upper and lower layer wirings for electrically connecting the source cells and the drain cells. The lower layer wiring includes a first source wiring for connecting the neighboring source cells and a first drain wiring for connecting the neighboring drain cells. The upper layer wiring includes a second source wiring for connecting to the first source wiring and a second drain wiring for connecting to the first drain wiring. A width of the second source wiring is wider than that of the first source wiring, and a width of the second drain wiring is wider than that of the first drain wiring. The second source wiring and the second drain wiring are disposed alternately.

Abstract: In the clamp circuit, the first transistor shifts a target clamp voltage by a gate-source voltage to output the target clamp voltage. The buffer circuit inputs the shifted voltage and output a reference voltage on the inputted shifted voltage. The gate of the second transistor is connected to the output terminal of the buffer circuit. The source of the second transistor is connected to the input terminal of the first transistor. In this structure, the reference voltage is supplied to the gate of the second transistor so that, when a terminal voltage of the input terminal of the IC is not less than a clamp voltage corresponding to the sum of the reference voltage and a threshold voltage of the second transistor, the second transistor turns on, whereby the terminal voltage is clamped to a clamp voltage related to the target clamp voltage.

Abstract: In a semiconductor device, a plurality of bump electrodes are formed for a source pad or a drain pad. The bump electrodes and the source or drain pad are connected with each other through wiring patterns. Thus, the following effect is produced unlike cases where one bump electrode is connected with one source pad or one drain pad through a wiring pattern: An amount of current that passes through each of the bump electrodes can be reduced, so that a breakdown of the bump electrodes is lessened.

Abstract: A semiconductor device includes a substrate, a plurality of bump electrodes disposed on the substrate, and a support area for supporting the substrate in case of carrying the substrate. The support area is disposed on a surface of the substrate, on which the bump electrode is disposed, and is disposed at a predetermined position, which is dotted on the surface of the substrate. In this device, the support area is sufficiently small, and the number of the bump electrodes can increase. Moreover, degree of freedom in a configuration of the support area increases.

Abstract: A comparator, having an offset of 0.1V, compares a terminal voltage Vin1 with a clamp voltage VCL (5.1V). When an overvoltage input exceeding the VCL is entered to an input terminal, the comparator turns on a transistor Q11. The current flows across an externally provided resistor R11, the input terminal, and the transistor Q11, and flows into an output terminal of an operational amplifier. With a voltage drop at the resistor R11, the terminal voltage Vin1 starts decreasing toward an output voltage Vc of the operational amplifier.

Abstract: A reference voltage circuit and an operational amplifier operate when an output voltage is produced from an output terminal of a power supply circuit. When the output voltage is low in the rising phase of a power source voltage, a transistor Q17 in a startup circuit turns on and a transistor Q14 turns off to surely turn on transistors Q11 and Q12. Upon the output voltage exceeding a predetermined level, the transistor Q17 turns off and an ordinary feedback control starts.

Abstract: A comparator, having an offset of 0.1V, compares a terminal voltage Vin1 with a clamp voltage VCL(5.1V). When an overvoltage input exceeding the VCL is entered to an input terminal, the comparator turns on a transistor Q11. The current flows across an externally provided resistor R11, the input terminal, and the transistor Q11, and flows into an output terminal of an operational amplifier. With a voltage drop at the resistor R11, the terminal voltage Vin1 starts decreasing toward an output voltage Vc of the operational amplifier.

Abstract: A light-sensitive material package includes a light-shielding envelope containing a stack of sheet-form light-sensitive material, the light-shielding envelope having heat-seal parts on four edges. The light-sensitive material package further includes a cushioning member, which holds down all or a part of the heat-seal parts. The light-sensitive material package further includes a fitting-type box for storing the envelope, the fitting-type box being formed from an inner box and a lid. The stiffness of the heat-seal parts is at least 0.05 N·cm.

Abstract: A light-shielding packaging for a roll of continuous photosensitive web wound on a core having on its each end a light-shielding flange disc has at its leading end a heat-shrinkable light-shielding leader sheet having a thickness of 30 to 200 &mgr;m which shows a heat shrinkage ratio at 50° C. of lower than 1% both in the longitudinal and width directions and a heat shrinkage ratio at 100° C. in the range of 5% to 30% in the longitudinal direction and a heat shrinkage ratio at 100° C. of less than the heat shrinkage ratio in the longitudinal direction by 1% or more in the width direction. The leader sheet has a length larger than the length of the outermost convolution of the roll and a width larger than the distance between the outer face of one flange disc and the outer face of another flange disc, and each side portion of the leader sheet is light-tightly attached by heat shrinkage to the outer face of the flange disc at least at a portion adjacent to the periphery of the flange disc.

Abstract: A light-shielding packaging for a roll of continuous photosensitive web wound on a core having on its each end a light-shielding flange disc has at its leading end a heat-shrinkable light-shielding leader sheet having a thickness of 30 to 200 &mgr;m which shows a heat shrinkage ratio at 50° C. of lower than 1% both in the longitudinal and width directions and a heat shrinkage ratio at 100° C. in the range of 5% to 30% in the longitudinal direction and a heat shrinkage ratio at 100° C. of less than the heat shrinkage ratio in the longitudinal direction by 1% or more in the width direction. The leader sheet has a length larger than the length of the outermost convolution of the roll and a width larger than the distance between the outer face of one flange disc and the outer face of another flange disc, and each side portion of the leader sheet is light-tightly attached by heat shrinkage to the outer face of the flange disc at least at a portion adjacent to the periphery of the flange disc.