Patents by Inventor Hiromitsu Ishii

Hiromitsu Ishii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080305575
    Abstract: A thin film transistor has a semiconductor thin film including zinc oxide, a protection film formed on entirely the upper surface of the semiconductor thin film, a gate insulating film formed on the protection film, a gate electrode formed on the gate insulating film above the semiconductor thin film, and a source electrode and drain electrode formed under the semiconductor thin film so as to be electrically connected to the semiconductor thin film.
    Type: Application
    Filed: August 12, 2008
    Publication date: December 11, 2008
    Applicant: Casio Computer Co., Ltd.
    Inventor: Hiromitsu Ishii
  • Publication number: 20080262151
    Abstract: A resin composition in which a polylactic acid resin (A) 95-5 wt %, an aromatic polycarbonate resin (B) 5-95 wt %, and, with respect to 100 wt parts of the total of the (A) and the (B), at least one compatibilizer selected from a polymer compound containing an acrylic resin or styrene resin unit as a graft (C), a polymer compound to which a glycidyl compound or an acid anhydride is grafted or copolymerized (D) and an oxazoline compound, an oxazine compound and a carbodiimide compound (E) are compounded.
    Type: Application
    Filed: September 20, 2005
    Publication date: October 23, 2008
    Inventors: Hiromitsu Ishii, Takashi Nagao, Hiroyuki Ohme
  • Patent number: 7385224
    Abstract: A thin film transistor of the present invention includes a semiconductor thin film (8); a gate insulating film (7) formed on one surface of the semiconductor thin film (8); a gate electrode (6) formed to be opposite to the semiconductor thin film (8) through the gate insulating film (7); a source electrode (15) and a drain electrode (16) electrically connected to the semiconductor thin film (8); a source region; a drain region; and a channel region. The thin film transistor further includes an insulating film (9) formed on a peripheral portion corresponding to at least the source region and the drain region of the semiconductor thin film (8), and having a contact hole (10, 11) through which at least a part of each of the source region and the drain region is exposed wherein the source electrode (15) and the drain electrode (16) are connected to the semiconductor thin film (8) through the contact hole (10, 11).
    Type: Grant
    Filed: September 1, 2005
    Date of Patent: June 10, 2008
    Assignee: Casio Computer Co., Ltd.
    Inventors: Hiromitsu Ishii, Hitoshi Hokari, Motohiko Yoshida, Ikuhiro Yamaguchi
  • Publication number: 20080117345
    Abstract: A display includes a substrate provided with a display region and a non-display region. A plurality of display electrodes are arranged on the substrate. A plurality of switching elements are respectively connected to the display electrodes. Each of the switching elements includes a control electrode and a data electrode. A plurality of scan lines are respectively connected to the control electrodes of the switching elements. A plurality of data lines are respectively connected to the data electrodes of the switching elements. A scan line electrostatic protection and test circuit is provided in the non-display region and connected to the scan lines The scan line electrostatic protection and test circuit includes an electrostatic protection circuit provided with a protection element which is normally in a non-conduction state and is set in a conduction state by generated static electricity, and an inspection circuit to inspect a conduction state of the scan lines by way of the protection element.
    Type: Application
    Filed: November 15, 2007
    Publication date: May 22, 2008
    Applicant: Casio Computer Co., Ltd.
    Inventors: Hiromitsu Ishii, Yayoi Nakamura
  • Patent number: 7361934
    Abstract: A thin film transistor is provided in a vicinity of a crossing region of scanning and the data lines on a first substrate. A pixel electrode is connected with the thin film transistor. A transparent electroconductive layer which is applied with a common potential is provided between the pixel electrodes and the scanning lines and data lines to cover the scanning and date lines, is superimposed on peripheral portions of the pixel electrodes on both sides. An insulating film is formed between the pixel electrodes and the electroconductive layer. An opposed electrode is formed on a second substrate to correspond to the pixel electrodes. A liquid crystal is provided between the pixel electrodes and opposed electrode.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: April 22, 2008
    Assignee: Casio Computer Co., Ltd.
    Inventor: Hiromitsu Ishii
  • Publication number: 20080074599
    Abstract: A liquid crystal display device provides, on the internal side of one substrate of a pair of substrates a plurality of pixel electrodes, a plurality of TFTs, a plurality of scan lines and signal lines, and a plurality of convex sections each formed on the internal side of the other substrate so as to be located substantially on a center part of each of the plurality of predetermined regions provided in each of the plurality of pixels. Further, the liquid crystal display device provides an opposing electrode on the internal side of the one substrate. Then, the liquid crystal display device provides vertical alignment films on the respective internal sides of the pair of substrates, and a liquid crystal layer having negative dielectric anisotropy and inserted in the gap between the pair of substrates.
    Type: Application
    Filed: September 26, 2007
    Publication date: March 27, 2008
    Inventors: Minoru Yamaguchi, Hiromitsu Ishii
  • Publication number: 20070187760
    Abstract: A thin film transistor includes a substrate, and a pair of source/drain electrodes (i.e., a source electrode and a drain electrode) formed on the substrate and defining a gap therebetween. A pair of low resistance conductive thin films are provided such that each coats at least a part of one of the source/drain electrodes. The low resistance conductive thin films define a gap therebetween. An oxide semiconductor thin film layer is continuously formed on upper surfaces of the pair of low resistance conductive thin films and extends along the gap defined between the low resistance conductive thin films so as to function as a channel. Side surfaces of the oxide semiconductor thin film layer and corresponding side surfaces of the low resistance conductive thin films coincide with each other in a channel width direction of the channel.
    Type: Application
    Filed: February 1, 2007
    Publication date: August 16, 2007
    Applicants: Kochi Industrial Promotion Center, Casio Computer Co., Ltd.
    Inventors: Mamoru Furuta, Takashi Hirao, Hiroshi Furuta, Tokiyoshi Matsuda, Takahiro Hiramatsu, Hiromitsu Ishii, Hitoshi Hokari, Motohiko Yoshida
  • Publication number: 20070126942
    Abstract: In the present liquid crystal display device, a switching element, a data line connected to one end of the switching element, and an interconnecting wire insulated from the data line are formed on a substrate. The switching element, the data line, and the interconnecting wire are covered with an interlayer insulating film. An auxiliary capacitor electrode made of reflective metal and connected to the interconnecting wire is formed on the interlayer insulating film. An upper insulating film is formed on the interlayer insulating film to cover the auxiliary capacitor electrode, and a pixel electrode connected to the other end of the switching element is formed on the upper insulating film. The interconnecting wire is made of a material different from the auxiliary capacitor electrode, and the interlayer insulating film and upper insulating film have a contact hole which reaches the interconnecting wire.
    Type: Application
    Filed: December 1, 2006
    Publication date: June 7, 2007
    Applicant: CASIO COMPUTER CO., LTD.
    Inventors: Hiromitsu Ishii, Yayoi Nakamura, Shigeru Morikawa
  • Publication number: 20070121038
    Abstract: A liquid crystal display device has: a substrate; a switching element disposed at a side of the upper surface of the substrate and including a lower electrode and an upper electrode having a stacked structure of a plurality of metallic layers; a transparent pixel electrode disposed at the side of the upper surface of the substrate and connected to the upper electrode of the switching element; and a reflective plate formed on the upper surface of the pixel electrode so as to expose a part of the pixel electrode and having the same stacked structure as the upper electrode, including layers each made of the same material as the corresponding metallic layer in the upper electrode.
    Type: Application
    Filed: November 29, 2006
    Publication date: May 31, 2007
    Applicant: CASIO COMPUTER CO., LTD.
    Inventors: Hiromitsu Ishii, Shigeru Morikawa, Yayoi Nakamura
  • Publication number: 20070090422
    Abstract: A thin-film transistor panel includes a substrate, and a thin-film transistor formed on the substrate. The transistor includes a gate electrode, a gate insulating film, a semiconductor thin film, first and second ohmic contact layers formed on the semiconductor thin film, and source and drain electrodes which are respectively formed on the first and second ohmic contact layers. The semiconductor thin film includes a channel area between the source electrode and the drain electrode. A pixel electrode is connected to the source electrode of the thin-film transistor. First and second conductive coating films are provided on the source and drain electrodes, respectively, and formed of the same material as the pixel electrode. The first conductive coating film is wider than the source electrode, and the second conductive coating film is wider than the drain electrode.
    Type: Application
    Filed: October 18, 2006
    Publication date: April 26, 2007
    Inventor: Hiromitsu Ishii
  • Publication number: 20060284172
    Abstract: A thin film transistor has a semiconductor thin film including zinc oxide, a protection film formed on entirely the upper surface of the semiconductor thin film, a gate insulating film formed on the protection film, a gate electrode formed on the gate insulating film above the semiconductor thin film, and a source electrode and drain electrode formed under the semiconductor thin film so as to be electrically connected to the semiconductor thin film.
    Type: Application
    Filed: June 7, 2006
    Publication date: December 21, 2006
    Applicant: Casio Computer Co., Ltd.
    Inventor: Hiromitsu Ishii
  • Publication number: 20060278873
    Abstract: A thin film transistor is provided in a vicinity of a crossing region of scanning and the data lines on a first substrate. A pixel electrode is connected with the thin film transistor. A transparent electroconductive layer which is applied with a common potential is provided between the pixel electrodes and the scanning lines and data lines to cover the scanning and date lines, is superimposed on peripheral portions of the pixel electrodes on both sides. An insulating film is formed between the pixel electrodes and the electroconductive layer. An opposed electrode is formed on a second substrate to correspond to the pixel electrodes. A liquid crystal is provided between the pixel electrodes and opposed electrode.
    Type: Application
    Filed: June 7, 2006
    Publication date: December 14, 2006
    Applicant: Casio Computer Co., Ltd.
    Inventor: Hiromitsu Ishii
  • Patent number: 7135509
    Abstract: A flame-retardant polybutylene terephthalate resin composition wherein (A) 20-70% by weight of a polybutylene terephthalate resin or a mixture of a polybutylene terephthalate resin and a polyethylene terephthalate resin, (B) 1–20% by weight of a vinyl based resin, (C) 1–20% by weight of a phosphoric acid ester, (D) 1–30% by weight of a salt of a triazine based compound and cyanuric acid or isocyanuric acid, and (E) 0.1–5% by weight of an alkaline earth metal compound are compounded, and formed articles thereof have high degrees of flame retardancy and tracking resistance, and are unlikely to allow occurrence of metal pollution or deterioration in hydrolysis resistance due to a phosphoric acid ester, and therefore are suitable for machine component parts, electrical/electronic component parts, and automotive component parts.
    Type: Grant
    Filed: September 25, 2002
    Date of Patent: November 14, 2006
    Assignee: Toray Industries, Inc.
    Inventors: Hiromitsu Ishii, Takashi Nagao, Jiro Kumaki
  • Publication number: 20060194500
    Abstract: A thin film transistor panel, including: a transparent substrate; scanning lines made of a transparent electroconductive material, formed on the transparent substrate; data lines formed on the transparent substrate to be perpendicular to the scanning lines; thin film transistors, each provided with a transparent gate electrode connected to one of the scanning lines, a transparent drain electrode connected to one of the data line, a transparent source electrode and a transparent semiconductor thin film; and transparent pixel electrodes connected to the thin film transistors, wherein each of the pixel electrodes is formed to cover each of the thin film transistors.
    Type: Application
    Filed: February 17, 2006
    Publication date: August 31, 2006
    Applicant: Casio Computer Co., Ltd.
    Inventor: Hiromitsu Ishii
  • Publication number: 20060187397
    Abstract: A display device includes a substrate, a plurality of scanning lines formed in parallel with each other on the substrate in one direction, a plurality of data lines formed in parallel with each other on the substrate in orthogonal to the scanning lines, a thin film transistor being formed in the vicinity of each intersection of the scanning lines and the data lines and having a semiconductor thin film, a gate electrode connected to one of the scanning lines, a source electrode, a drain electrode connected to one of the scanning lines; pixel electrodes each connected to the source electrode of the thin film transistor, auxiliary capacitive electrodes each having an overlap region that overlaps with the pixel electrodes and forming an auxiliary capacitance with the pixel electrodes, a first insulating film arranged between the auxiliary capacitive electrodes and the data lines, and a second insulting film arranged between the pixel electrodes and the auxiliary capacitive electrodes.
    Type: Application
    Filed: April 25, 2006
    Publication date: August 24, 2006
    Applicant: Casio Computer Co., Ltd.
    Inventors: Yayoi Nakamura, Hiromitsu Ishii, Shinichi Shimomaki, Hitoshi Watanabe
  • Publication number: 20060142438
    Abstract: A flame-retardant polybutylene terephthalate resin composition wherein (A) 20-70% by weight of a polybutylene terephthalate resin or a mixture of a polybutylene terephthalate resin and a polyethylene terephthalate resin, (B) 1-20% by weight of a vinyl based resin, (C) 1-20% by weight of a phosphoric acid ester, (D) 1-30% by weight of a salt of a triazine based compound and cyanuric acid or isocyanuric acid, and (E) 0.1-5% by weight of an alkaline earth metal compound are compounded, and formed articles thereof have high degrees of flame retardancy and tracking resistance, and are unlikely to allow occurrence of metal pollution or deterioration in hydrolysis resistance due to a phosphoric acid ester, and therefore are suitable for machine component parts, electrical/electronic component parts, and automotive component parts.
    Type: Application
    Filed: September 25, 2002
    Publication date: June 29, 2006
    Applicant: Toray Industries, Inc., a corporation of Japan
    Inventors: Hiromitsu Ishii, Takashi Nagao, Jiro Kumaki
  • Publication number: 20060061713
    Abstract: This invention provides a display panel characterized by having a substrate; an organic film having an irregular surface formed on the substrate; a reflective film formed on the irregular surface of the organic film; and a pixel electrode having a portion, at least the portion of the pixel electrode being overlapped with the reflective film.
    Type: Application
    Filed: September 21, 2005
    Publication date: March 23, 2006
    Applicant: Casio Computer Co., Ltd.
    Inventors: Yayoi Nakamura, Shigeru Morikawa, Hiromitsu Ishii
  • Publication number: 20060043447
    Abstract: A thin film transistor of the present invention includes a semiconductor thin film (8); a gate insulating film (7) formed on one surface of the semiconductor thin film (8); a gate electrode (6) formed to be opposite to the semiconductor thin film (8) through the gate insulating film (7); a source electrode (15) and a drain electrode (16) electrically connected to the semiconductor thin film (8); a source region; a drain region; and a channel region. The thin film transistor further includes an insulating film (9) formed on a peripheral portion corresponding to at least the source region and the drain region of the semiconductor thin film (8), and having a contact hole (10, 11) through which at least a part of each of the source region and the drain region is exposed wherein the source electrode (15) and the drain electrode (16) are connected to the semiconductor thin film (8) through the contact hole (10, 11).
    Type: Application
    Filed: September 1, 2005
    Publication date: March 2, 2006
    Applicant: CASIO COMPUTER CO., LTD.
    Inventors: Hiromitsu Ishii, Hitoshi Hokari, Motohiko Yoshida, Ikuhiro Yamaguchi
  • Patent number: 6924859
    Abstract: There is provided a liquid crystal display apparatus including a first substrate, a second substrate having an inner surface opposing the first substrate. A liquid crystal is placed between the first and second substrates. A plurality of light-transmitting pixel electrodes are arranged between the inner surface of the second substrate and the liquid crystal. A reflecting layer is placed between each pixel electrode and the inner surface of the second substrate and has an area smaller than that of the pixel electrode.
    Type: Grant
    Filed: January 29, 2003
    Date of Patent: August 2, 2005
    Assignee: Casio Computer Co., Ltd.
    Inventors: Hiromitsu Ishii, Shintaro Kuwayama
  • Publication number: 20040239668
    Abstract: A display device for displaying images corresponding to digital signals information comprising a display panel with a plurality of display pixels arranged in matrix form near the intersecting points of a plurality of scanning lines and a plurality of signal lines which intersect perpendicularly with each other; a scanning driver circuit for sequentially applying scanning signals; a signal driver circuit comprising a plurality of gradation current generation supply circuit sections comprising a module current generation circuit which generates a plurality of module currents corresponding to each digital signal bit based on reference voltage; a gradation current generation circuit which integrates selectively each of the module currents, generates gradation currents and supplies each of a plurality of the signal lines; a reference voltage generation circuit which applies in common the reference voltage to a plurality of the gradation current generation circuits sections.
    Type: Application
    Filed: May 26, 2004
    Publication date: December 2, 2004
    Applicant: Casio Computer Co., Ltd.
    Inventors: Katsuhiko Morosawa, Hiromitsu Ishii, Tomoyuki Shirasaki, Shinobu Sumi