Abstract: According to one embodiment, in a method for manufacturing a semiconductor device, a semiconductor substrate having a plurality of first pads is covered with a bonding material. The semiconductor substrate is attached to a reinforcing plate having a plurality of first through-holes corresponding respectively to the first pads. The semiconductor substrate is removed until becoming a predetermined thickness. An electrode film is formed on the semiconductor substrate. A remover of the bonding material is injected into the first through-holes so as to expose the first pads. A probe is in contact with the exposed first pads through the first through-holes so as to measure a current flowing between the probe and the electrode film. The remover is injected into the first through-holes so as to separate the semiconductor substrate from the reinforcing plate. The semiconductor substrate is diced into a plurality of chips.

Abstract: According to one embodiment, a method of manufacturing a semiconductor device includes a polishing step, a first amorphous silicon film formation step, a single crystallization step and a buffer layer formation step. In the first amorphous silicon film formation step, a first amorphous silicon film of the first conductivity type is formed on the polished back surface of the high-resistance layer, the first amorphous silicon film having a higher impurity concentration than the high-resistance layer. In the single crystallization step, the first amorphous silicon film is single-crystallized by irradiating the first amorphous silicon film with a first laser. In the buffer layer formation step, the formation and single-crystallization of the first amorphous silicon film are repeated more than once to form a buffer layer of the first conductivity type on the back surface of the high-resistance layer, the buffer layer having a higher impurity concentration than the high-resistance layer.

Abstract: According to one embodiment, a method is disclosed for manufacturing a semiconductor device. The method can include forming a base region and an emitter region in a front surface of a semiconductor layer. The method can include forming a first impurity implantation region by implanting first impurity of a first conductivity type into a back surface of the semiconductor layer. The method can include selectively forming a second impurity implantation region by selectively implanting second impurity of a second conductivity type into the first impurity implantation region. In addition, the method can include irradiating the first impurity implantation region and the second impurity implantation region with laser light. A peak of impurity concentration profile in a depth direction of at least one of the first impurity implantation region and the second impurity implantation region before irradiation with the laser light is adjusted to a depth of 0.05 ?m or more and 0.

Abstract: A piezoelectric thin film device includes an amorphous metal film disposed on a substrate and a piezoelectric film disposed on the amorphous metal. One of crystal axis of the piezoelectric film is aligned in a direction perpendicular to a surface of the amorphous metal.

Abstract: A piezoelectric thin film device includes an amorphous metal film disposed on a substrate and a piezoelectric film disposed on the amorphous metal. One of crystal axis of the piezoelectric film is aligned in a direction perpendicular to a surface of the amorphous metal.

Abstract: A piezoelectric thin film device includes an amorphous metal film disposed on a substrate and a piezoelectric film disposed on the amorphous metal. One of crystal axis of the piezoelectric film is aligned in a direction perpendicular to a surface of the amorphous metal.

Abstract: A piezoelectric thin film device includes an amorphous metal film disposed on a substrate and a piezoelectric film disposed on the amorphous metal. One of crystal axis of the piezoelectric film is aligned in a direction perpendicular to a surface of the amorphous metal.

Abstract: A film bulk acoustic resonator includes: a support body having a lower hollow portion; a lower electrode supported on the support body and provided above the lower hollow portion; a piezoelectric layer provided on the lower electrode; an upper electrode provided on the piezoelectric layer; a sidewall surrounding the upper electrode; an upper sealing body bonded to an upper end of the sidewall and defining an upper hollow portion along with the sidewall; and a relay electrode. A portion of the sidewall is composed of the piezoelectric layer. The relay electrode is provided on the support body below the portion of the sidewall constituting the piezoelectric layer for extracting the lower electrode and the upper electrode onto the support body outside the sidewall.

Abstract: A thin film piezoelectric resonator, includes: a sealing member; an insulating layer with fine holes which is provided on the sealing member; a semiconductor layer which has a cavity over the fine holes provided on the insulating layer; a protective film provided on the semiconductor layer and over the cavity; a lower electrode provided on the protective film; a piezoelectric film provided on the lower electrode; an upper electrode provided on the piezoelectric film; a first lead electrode connected to the lower electrode and provided on the protective film; a second lead electrode connected to the upper electrode and provided on the protective film; and an etched part of the protective film or a deposited layer part which is formed opposite the fine holes.

Abstract: A piezoelectric thin film device includes an amorphous metal film disposed on a substrate and a piezoelectric film disposed on the amorphous metal. One of crystal axis of the piezoelectric film is aligned in a direction perpendicular to a surface of the amorphous metal.

Abstract: A semiconductor device comprises: a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type provided on the first semiconductor region; a trench formed in the second semiconductor region; a thick gate insulating film selectively provided in a center area of a bottom surface of the trench; a thin gate insulating film provided along a periphery of the bottom surface and on a sidewall of the trench; a third semiconductor region of the first conductivity type that is selectively provided below the thin gate insulating film provided along the periphery of the bottom surface of the trench and that extends to the first semiconductor region; a fourth semiconductor region of the first conductivity type selectively provided in the surface of the second semiconductor region; and a gate electrode filling the trench via the gate insulating film.

Abstract: A film bulk acoustic resonator includes: a substrate having; a lower electrode extending; a piezoelectric film provided on the lower electrode; an upper electrode opposed to the lower electrode and provided on the piezoelectric film; and a plurality of protrusions. The substrate has a cavity in a surface thereof. The lower electrode extends above the cavity from an upper surface of the substrate. The protrusions are provided below the lower electrode in the cavity.

Abstract: A film bulk acoustic resonator includes a substrate having a through hole which is defined by an opening on a bottom surface of the substrate opposed to a top surface thereof. A width of the opening is larger than that at the top surface. A bottom electrode is provided above the through hole and extended over the top surface. A piezoelectric film is disposed on the bottom electrode. A top electrode is disposed on the piezoelectric film so as to face the bottom electrode. A sealing plate is inserted from the bottom surface into the through hole so as to seal the opening.

Abstract: A semiconductor device comprises: a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type provided on the first semiconductor region; a trench formed in the second semiconductor region; a thick gate insulating film selectively provided in a center area of a bottom surface of the trench; a thin gate insulating film provided along a periphery of the bottom surface and on a sidewall of the trench; a third semiconductor region of the first conductivity type that is selectively provided below the thin gate insulating film provided along the periphery of the bottom surface of the trench and that extends to the first semiconductor region; a fourth semiconductor region of the first conductivity type selectively provided in the surface of the second semiconductor region; and a gate electrode filling the trench via the gate insulating film.

Abstract: A piezoelectric thin film device includes an amorphous metal film disposed on a substrate and a piezoelectric film disposed on the amorphous metal. One of crystal axis of the piezoelectric film is aligned in a direction perpendicular to a surface of the amorphous metal.