Patents by Inventor Hiroshi Takada

Hiroshi Takada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8492881
    Abstract: A magnetic storage device which enables stable operation at the time of recording information into MRAM and the stable retention of recorded information. The die of the magnetic storage device has a substrate, first and second wirings, a magnetic storage element and a first magnetic shielding structure. The first magnetic shielding structure is formed to cover the magnetic storage element in a plan view. Second and third magnetic shielding structures sandwich the die in a thickness direction. A lead frame member has the die mounted thereon and contains a ferromagnetic material. The lead frame member overlaps with only part of the die in a plan view.
    Type: Grant
    Filed: March 22, 2010
    Date of Patent: July 23, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Takeharu Kuroiwa, Masayoshi Tarutani, Takashi Takenaga, Hiroshi Takada
  • Patent number: 8456005
    Abstract: A transparent conductive film which is excellent in transparency, electrical conductivity, in-plane uniformity and durability is disclosed, comprising a metal conductive pattern and a transparent conductive material on a transparent film substrate, wherein the transparent conductive material contains a conductive polymer and at least one of a conductive fiber and a conductive metal. A production method thereof is also disclosed.
    Type: Grant
    Filed: October 10, 2008
    Date of Patent: June 4, 2013
    Assignee: Konica Minolta Holdings, Inc.
    Inventors: Shinichi Suzuki, Hiroshi Takada, Yusuke Kawahara
  • Patent number: 8378674
    Abstract: A magnetic field detection device including a magnetic body (magnetic flux guide) provided for adjusting a magnetic field to be applied to a magneto-resistance element. A shape of an on-substrate magnetic body in plan view is a tapered shape on one end portion side and a substantially funnel shape on another end portion side opposite the one end portion, the another end portion being larger in width than the one end portion, and a magneto-resistance element is disposed in front of an output-side end portion. In the on-substrate magnetic body, a contour of a tapered portion is not linear like a funnel, but has a curved shape in which a first curved portion protruding outward with a gentle curvature and a second curved portion protruding inward with a curvature similar to that of the first curved portion are continuously formed.
    Type: Grant
    Filed: May 27, 2008
    Date of Patent: February 19, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Taisuke Furukawa, Takeharu Kuroiwa, Shingo Tomohisa, Takashi Takenaga, Masakazu Taki, Hiroshi Takada, Yuji Abe
  • Patent number: 8291476
    Abstract: There is provided an identifier authenticating system in which information requesting users can share all the predetermined information held in a plurality of information providing servers. In the identifier authentication system, when an identifier holding user 18 presents an identifier to an information requesting server 16, the information requesting server 16 asks a location management server 14 about a location of the information providing server 15, the location management server 14 returns confirmed IP address of the information providing server 15 to the information requesting server 16 based on the location information, and the information requesting server 16 utilizes the confirmed IP address to access the information providing server 15 corresponding to the confirmed IP address, and receives predetermined information corresponding to the presented identifier and a disclosure level from the accessed information providing server 15.
    Type: Grant
    Filed: November 30, 2006
    Date of Patent: October 16, 2012
    Assignees: Japan Registry Services, Co., Ltd.
    Inventors: Takaharu Ui, Toshihide Uotani, Shin Yoshimura, Hiroshi Takada
  • Patent number: 8269295
    Abstract: There is provided a magnetic memory device stable in write characteristics. The magnetic memory device has a recording layer. The planar shape of the recording layer has the maximum length in the direction of the easy-axis over a primary straight line along the easy-axis, and is situated over a length smaller than the half of the maximum length in the direction perpendicular to the easy-axis, and on the one side and on the other side of the primary straight line respectively, the planar shape has a first part situated over a length in the direction perpendicular to the easy-axis, and a second part situated over a length smaller than the length in the direction perpendicular to the easy-axis. The outer edge of the first part includes only a smooth curve convex outwardly of the outer edge.
    Type: Grant
    Filed: April 18, 2011
    Date of Patent: September 18, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Takashi Takenaga, Takeharu Kuroiwa, Hiroshi Takada, Shuichi Ueno, Kiyoshi Kawabata
  • Patent number: 8198796
    Abstract: Disclosed are: a transparent electrode with excellent optical transparency, electrical conductivity, and surface smoothness and is capable of providing lightness in weight and flexibility, comprising a transparent conductive layer on a transparent substrate, wherein the transparent conductive layer contains a conductive fiber and a transparent conductive material, the surface of the transparent conductive layer is composed of the conductive fiber and the transparent conductive material, and the smoothness (Ry) of the surface of the transparent conductive layer is greater than or equal to 1 nm and less than or equal to 50 nm; and a production method of same, and the present invention may provide a light emitting element with excellent uniformity of light emission.
    Type: Grant
    Filed: July 16, 2009
    Date of Patent: June 12, 2012
    Assignee: Konica Minolta Holdings, Inc.
    Inventor: Hiroshi Takada
  • Patent number: 8112547
    Abstract: A method for increasing the capacity of a connection table in a firewall accelerator by means of mapping packets in one session with some common security actions into one table entry. For each of five Network Address Translation (NAT) configurations, a hash function is specified. The hash function takes into account which of four possible arrival types a packet at a firewall accelerator may have. When different arrival types of packets in the same session are processed, two or more arrival types may have the same hash value.
    Type: Grant
    Filed: June 8, 2010
    Date of Patent: February 7, 2012
    Assignee: International Business Machines Corporation
    Inventors: Everett Arthur Corl, Jr., Gordon Taylor Davis, Clark Debs Jeffries, Steven Richard Perrin, Hiroshi Takada, Victoria Sue Thio
  • Publication number: 20120027994
    Abstract: Provided is a low-cost transparent conductive film which has high optical transparency and excellent surface conductivity and surface smoothness. A method for manufacturing such transparent conductive film is also provided. The transparent conductive film has, on a transparent base material, a conductive fiber layer which includes at least a transparent resin and a conductive fiber. At least a part of the conductive fiber is exposed from the surface of the transparent conductive film, and the relationship between the surface roughness (Rz) of the transparent conductive film and the average diameter (D) of the conductive fiber satisfies the inequalities of 0<Rz<D.
    Type: Application
    Filed: March 1, 2010
    Publication date: February 2, 2012
    Applicant: KONICA MINOLTA HOLDINGS, INC.
    Inventors: Hiroshi Takada, Hirokazu Koyama
  • Publication number: 20120001102
    Abstract: A highly clean and high temperature valve apparatus includes a valve driving unit and a valve casing connected to a bonnet supporting a valve stem slidably. A stem portion has one end positioned in a circumferential wall closed at its two ends by upper and lower covers, and supports one end of the valve stem with its other end extending through the lower cover. The stem portion has its ends supported respectively by first and second bellows for closing an axial through hole of the lower cover tightly. A first pipe communicates with a first space isolated by the first bellows, and a second pipe communicates with a second space isolated by the first bellows. The fluid quantities in the first and second spaces are increased or decreased relative to each other, thereby to drive the stem portion supported in a floating state by the first and second bellows.
    Type: Application
    Filed: January 21, 2009
    Publication date: January 5, 2012
    Applicants: Tokyo Electron Limited, Ham-Let Motoyama Japan Ltd.
    Inventors: Yasuhiro Chiba, Kohei Yamamoto, Hiroshi Takada, Kota Koizumi, Yasushi Yagi, Shingo Watanabe, Yuji Ono, Hiroshi Kaneko, Koyu Hasegawa
  • Patent number: 8052773
    Abstract: An object of this invention is to provide a manufacturing method of metal nanowire in which a length and a diameter can be uniformly controlled, metal nanowire having excellent form uniformity, and a transparent electric conductor exhibiting excellent conductivity and transparency by employing metal nanowire having excellent conductivity and transparency. A manufacturing method of metal nanowire which reduces a metal ion in a solution to form metal particles having a wire-form, wherein a nucleus forming process and a particle growth process after said nucleus forming process are provided, and said nucleus forming process reduces a metal ion to form reduced metal, which is directly precipitated on the surface of said particles formed in the said nucleus forming process or on the surface of particles having grown from said nucleus particles during a growth process, whereby metal particles are formed.
    Type: Grant
    Filed: November 13, 2008
    Date of Patent: November 8, 2011
    Assignee: Konica Minolta Holdings, Inc.
    Inventor: Hiroshi Takada
  • Patent number: 8013407
    Abstract: There is provided a magnetic memory device stable in write characteristics. The magnetic memory device has a recording layer. The planar shape of the recording layer has the maximum length in the direction of the easy-axis over a primary straight line along the easy-axis, and is situated over a length smaller than the half of the maximum length in the direction perpendicular to the easy-axis, and on the one side and on the other side of the primary straight line respectively, the planar shape has a first part situated over a length in the direction perpendicular to the easy-axis, and a second part situated over a length smaller than the length in the direction perpendicular to the easy-axis. The outer edge of the first part includes only a smooth curve convex outwardly of the outer edge.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: September 6, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Takashi Takenaga, Takeharu Kuroiwa, Hiroshi Takada, Shuichi Ueno, Kiyoshi Kawabata
  • Publication number: 20110193185
    Abstract: There is provided a magnetic memory device stable in write characteristics. The magnetic memory device has a recording layer. The planar shape of the recording layer has the maximum length in the direction of the easy-axis over a primary straight line along the easy-axis, and is situated over a length smaller than the half of the maximum length in the direction perpendicular to the easy-axis, and on the one side and on the other side of the primary straight line respectively, the planar shape has a first part situated over a length in the direction perpendicular to the easy-axis, and a second part situated over a length smaller than the length in the direction perpendicular to the easy-axis. The outer edge of the first part includes only a smooth curve convex outwardly of the outer edge.
    Type: Application
    Filed: April 18, 2011
    Publication date: August 11, 2011
    Applicant: RENESAS ELECTRONICS CORPORTION
    Inventors: Takashi Takenaga, Takeharu Kuroiwa, Hiroshi Takada, Shuichi Ueno, Kiyoshi Kawabata
  • Patent number: 7936842
    Abstract: A bit-rate automatic control circuit for feedback controlling the gain and bandwidth of a preamplifier in dependence on the bit-rate of a signal is disclosed. The circuit includes a bit-rate discrimination circuit configured to discriminate the bit rate of the signal, and an alarm circuit configured to determine whether the value of received power of the signal is less than the minimum acceptable value of the preamplifier or not. If said alarm circuit determines that the value of received power of the signal is less than the minimum acceptable value of the preamplifier, the bit-rate automatic control circuit determines, irrespective of the discrimination of said bit-rate discrimination circuit, that the bit-rate of the signal is low, and feedback controls the preamplifier based on the determination.
    Type: Grant
    Filed: February 16, 2005
    Date of Patent: May 3, 2011
    Assignees: Nippon Telegraph and Telephone Corporation, NTT Electronics Corporation
    Inventors: Shunji Kimura, Tomoaki Yoshida, Koji Kitahara, Hiroshi Takada
  • Patent number: 7932573
    Abstract: A magnetic memory element having a layer structure containing a fixing layer (pinned layer: PL) having a magnetization direction fixed unidirectionally, a nonmagnetic dielectric layer (TN1) in contact with the fixing layer (PL), and a memory layer (free layer: FL) having a first surface in contact with the nonmagnetic dielectric layer (TN1) and a second surface on the opposite to the first surface, the magnetization direction of the memory layer (FL) having a reversible magnetization direction in response to the current through the layer structure. The entire surface of the first surface of the memory layer (FL) is covered with the nonmagnetic dielectric layer (TN1) and in the joint surface of the nonmagnetic dielectric layer (TN1) and the fixing layer (PL), the first surface of the nonmagnetic dielectric layer (TN1) is exposed in a manner of surrounding the joint surface.
    Type: Grant
    Filed: April 21, 2009
    Date of Patent: April 26, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Hiroshi Takada, Takashi Takenaga, Takeharu Kuroiwa, Taisuke Furukawa
  • Patent number: 7881414
    Abstract: A bit-rate discrimination circuit for determining which bit-rate an input signal has, a first bit-rate or a second bit-rate higher than the first bit-rate, is disclosed. The circuit is characterized by a frequency selection unit configured to filter out a signal having the second bit-rate, and allow at least a fraction of the low frequency component of a signal having the first bit-rate to pass through; a determination unit configured to determine whether the fraction of the low frequency component of the signal having the first bit-rate has passed through said frequency selection unit; a smoothing unit configured to smooth the output of said determination unit; and a level conversion unit configured to convert the output of said smoothing unit to a logic level. According to the above arrangements, the bit-rate of the input signal can be discriminated based on the low frequency component thereof.
    Type: Grant
    Filed: February 16, 2005
    Date of Patent: February 1, 2011
    Assignees: Nippon Telegraph and Telephone Corporation, NTT Electronics Corporation
    Inventors: Shunji Kimura, Tomoaki Yoshida, Koji Kitahara, Hiroshi Takada
  • Publication number: 20110018424
    Abstract: Disclosed are: a transparent electrode with excellent optical transparency, electrical conductivity, and surface smoothness and is capable of providing lightness in weight and flexibility, comprising a transparent conductive layer on a transparent substrate, wherein the transparent conductive layer contains a conductive fiber and a transparent conductive material, the surface of the transparent conductive layer is composed of the conductive fiber and the transparent conductive material, and the smoothness (Ry) of the surface of the transparent conductive layer is greater than or equal to 1 nm and less than or equal to 50 nm; and a production method of same, and the present invention may provide a light emitting element with excellent uniformity of light emission.
    Type: Application
    Filed: July 16, 2009
    Publication date: January 27, 2011
    Inventor: Hiroshi Takada
  • Publication number: 20100254182
    Abstract: A magnetic storage device which enables stable operation at the time of recording information into MRAM and the stable retention of recorded information. The die of the magnetic storage device has a substrate, first and second wirings, a magnetic storage element and a first magnetic shielding structure. The first magnetic shielding structure is formed to cover the magnetic storage element in a plan view. Second and third magnetic shielding structures sandwich the die in a thickness direction. A lead frame member has the die mounted thereon and contains a ferromagnetic material. The lead frame member overlaps with only part of the die in a plan view.
    Type: Application
    Filed: March 22, 2010
    Publication date: October 7, 2010
    Inventors: Takeharu KUROIWA, Masayoshi Tarutani, Takashi Takenaga, Hiroshi Takada
  • Publication number: 20100247870
    Abstract: A transparent conductive film which is excellent in transparency, electrical conductivity, in-plane uniformity and durability is disclosed, comprising a metal conductive pattern and a transparent conductive material on a transparent film substrate, wherein the transparent conductive material contains a conductive polymer and at least one of a conductive fiber and a conductive metal. A production method thereof is also disclosed.
    Type: Application
    Filed: October 10, 2008
    Publication date: September 30, 2010
    Applicant: KONICA MINOLTA HOLDINGS, INC.
    Inventors: Shinichi Suzuki, Hiroshi Takada, Yusuke Kawahara
  • Publication number: 20100241746
    Abstract: A method for increasing the capacity of a connection table in a firewall accelerator by means of mapping packets in one session with some common security actions into one table entry. For each of five Network Address Translation (NAT) configurations, a hash function is specified. The hash function takes into account which of four possible arrival types a packet at a firewall accelerator may have. When different arrival types of packets in the same session are processed, two or more arrival types may have the same hash value.
    Type: Application
    Filed: June 8, 2010
    Publication date: September 23, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Everett Arthur Corl, JR., Gordon Taylor Davis, Clark Debs Jeffries, Steven Richard Perrin, Hiroshi Takada, Victoria Sue Thio
  • Patent number: 7769858
    Abstract: A method for increasing the capacity of a connection table in a firewall accelerator by means of mapping packets in one session with some common security actions into one table entry. For each of five Network Address Translation (NAT) configurations, a hash function is specified. The hash function takes into account which of four possible arrival types a packet at a firewall accelerator may have. When different arrival types of packets in the same session are processed, two or more arrival types may have the same hash value.
    Type: Grant
    Filed: February 23, 2005
    Date of Patent: August 3, 2010
    Assignee: International Business Machines Corporation
    Inventors: Everett Arthur Corl, Jr., Gordon Taylor Davis, Clark Debs Jeffries, Steven Richard Perrin, Hiroshi Takada, Victoria Sue Thio