Patents by Inventor Hiroshi TAKISHITA
Hiroshi TAKISHITA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210043739Abstract: Provided is a semiconductor device comprising a semiconductor substrate, wherein the semiconductor substrate includes a hydrogen containing region including hydrogen, and the hydrogen containing region includes a high concentration region with a higher carrier concentration than a virtual carrier concentration determined based on a concentration of hydrogen included and an activation ratio of hydrogen. The semiconductor substrate includes an N type drift region, an N type emitter region that has a higher carrier concentration than that in the drift region, a P type base region, a P type collector region provided to be in contact with a lower surface of the semiconductor substrate, and an N type buffer region that is provided between the collector region and the drift region, and has a higher carrier concentration than that in the drift region, and the hydrogen containing region is included in the buffer region.Type: ApplicationFiled: October 22, 2020Publication date: February 11, 2021Inventors: Yoshiharu KATO, Toru AJIKI, Tohru SHIRAKAWA, Misaki TAKAHASHI, Kaname MITSUZUKA, Takashi YOSHIMURA, Yuichi ONOZAWA, Hiroshi TAKISHITA, Soichi YOSHIDA
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Publication number: 20200381515Abstract: Provided is a semiconductor device including a semiconductor substrate doped with impurities, a front surface-side electrode provided on a front surface side of the semiconductor substrate, a back surface-side electrode provided on a back surface side of the semiconductor substrate, wherein the semiconductor substrate has a peak region arranged on the back surface side of the semiconductor substrate and having one or more peaks of impurity concentration, a high concentration region arranged closer to the front surface than the peak region and having a gentler impurity concentration than the one or more peaks, and a low concentration region arranged closer to the front surface than the high concentration region and having a lower impurity concentration than the high concentration region.Type: ApplicationFiled: August 19, 2020Publication date: December 3, 2020Inventors: Takahiro TAMURA, Yuichi ONOZAWA, Takashi YOSHIMURA, Hiroshi TAKISHITA, Akio YAMANO
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Patent number: 10847609Abstract: A front surface element structure is formed on the front surface side of an n?-type semiconductor substrate. Then defects are formed throughout an n?-type semiconductor substrate to adjust a carrier lifetime. Hydrogen ions are ion-implanted from a rear surface side of the n?-type semiconductor substrate, and a hydrogen implanted region having a hydrogen concentration higher than a hydrogen concentration of a bulk substrate is formed in the surface layer of a rear surface side of the n?-type semiconductor substrate.Type: GrantFiled: January 8, 2020Date of Patent: November 24, 2020Assignee: FUJI ELECTRIC CO., LTD.Inventors: Yuichi Onozawa, Hiroshi Takishita, Takashi Yoshimura
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Patent number: 10825904Abstract: Provided is a semiconductor device including a buffer region. Provided is a semiconductor device including: semiconductor substrate of a first conductivity type; a drift layer of the first conductivity type provided in the semiconductor substrate; and a buffer region of the first conductivity type provided in the drift layer, the buffer region having a plurality of peaks of a doping concentration, wherein the buffer region has: a first peak which has a predetermined doping concentration, and is provided the closest to a back surface of the semiconductor substrate among the plurality of peaks; and a high-concentration peak which has a higher doping concentration than the first peak, and is provided closer to an upper surface of the semiconductor substrate than the first peak is.Type: GrantFiled: December 21, 2018Date of Patent: November 3, 2020Assignee: FUJI ELECTRIC CO., LTD.Inventors: Yasunori Agata, Takashi Yoshimura, Hiroshi Takishita
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Patent number: 10755933Abstract: Laser light of a short-wavelength laser is irradiated from a rear surface of an n?-type semiconductor substrate, activating a p+-type collector region and an n+-type cathode region. At this time, a surface layer at the rear surface of the n?-type semiconductor substrate is melted and recrystallized, eliminating amorphous parts. Thereafter, laser light of a long-wavelength laser is irradiated from the rear surface of the n?-type semiconductor substrate and an n-type FS region is activated. Substantially no amorphous parts exist in the surface layer at the rear surface of the n?-type semiconductor substrate. Therefore, decreases in the absorption rate and increases in the reflection rate of the laser light of the long-wavelength laser are suppressed and heat from the laser light of the long-wavelength laser is transmitted to the n-type FS region, enabling the n-type FS region to be assuredly activated by laser annealing using lower energy.Type: GrantFiled: February 19, 2019Date of Patent: August 25, 2020Assignee: FUJI ELECTRIC CO., LTD.Inventors: Hiroshi Takishita, Takashi Yoshimura
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Patent number: 10756182Abstract: Provided is a semiconductor device including a semiconductor substrate doped with impurities, a front surface-side electrode provided on a front surface side of the semiconductor substrate, a back surface-side electrode provided on a back surface side of the semiconductor substrate, wherein the semiconductor substrate has a peak region arranged on the back surface side of the semiconductor substrate and having one or more peaks of impurity concentration, a high concentration region arranged closer to the front surface than the peak region and having a gentler impurity concentration than the one or more peaks, and a low concentration region arranged closer to the front surface than the high concentration region and having a lower impurity concentration than the high concentration region.Type: GrantFiled: March 20, 2019Date of Patent: August 25, 2020Assignee: FUJI ELECTRIC CO., LTD.Inventors: Takahiro Tamura, Yuichi Onozawa, Takashi Yoshimura, Hiroshi Takishita, Akio Yamano
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Publication number: 20200194562Abstract: Provided is a semiconductor device including a semiconductor substrate; a hydrogen donor that is provide inside the semiconductor substrate in a depth direction, has a doping concentration that is higher than a doping concentration of a dopant of the semiconductor substrate, has a doping concentration distribution peak at a first position that is a predetermined distance in the depth direction of the semiconductor substrate away from one main surface of the semiconductor substrate, and has a tail of the doping concentration distribution where the doping concentration is lower than at the peak, farther on the one main surface side than where the first position is located; and a crystalline defect region having a crystalline defect density center peak at a position shallower than the first position, in the depth direction of the semiconductor substrate.Type: ApplicationFiled: February 24, 2020Publication date: June 18, 2020Inventors: Takashi YOSHIMURA, Yuichi ONOZAWA, Hiroshi TAKISHITA, Misaki MEGURO, Motoyoshi KUBOUCHI, Naoko KODAMA
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Patent number: 10651269Abstract: Proton irradiation is performed a plurality of times from rear surface of an n-type semiconductor substrate, which is an n? drift layer, forming an n-type FS layer having lower resistance than the n-type semiconductor substrate in the rear surface of the n? drift layer. When the proton irradiation is performed a plurality of times, the next proton irradiation is performed to as to compensate for a reduction in mobility due to disorder which remains after the previous proton irradiation. In this case, the second or subsequent proton irradiation is performed at the position of the disorder which is formed by the previous proton irradiation. In this way, even after proton irradiation and a heat treatment, the disorder is reduced and it is possible to prevent deterioration of characteristics, such as increase in leakage current. It is possible to form an n-type FS layer including a high-concentration hydrogen-related donor layer.Type: GrantFiled: February 4, 2019Date of Patent: May 12, 2020Assignee: FUJI ELECTRIC CO., LTD.Inventors: Hiroshi Takishita, Takashi Yoshimura, Masayuki Miyazaki, Hidenao Kuribayashi
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Publication number: 20200144360Abstract: A front surface element structure is formed on the front surface side of an n?-type semiconductor substrate. Then defects are formed throughout an n?-type semiconductor substrate to adjust a carrier lifetime. Hydrogen ions are ion-implanted from a rear surface side of the n?-type semiconductor substrate, and a hydrogen implanted region having a hydrogen concentration higher than a hydrogen concentration of a bulk substrate is formed in the surface layer of a rear surface side of the n?-type semiconductor substrate.Type: ApplicationFiled: January 8, 2020Publication date: May 7, 2020Applicant: FUJI ELECTRIC CO., LTD.Inventors: Yuichi ONOZAWA, Hiroshi TAKISHITA, Takashi YOSHIMURA
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Publication number: 20200135593Abstract: A method of manufacturing a semiconductor device from a semiconductor wafer in which a plurality of semiconductor chips are formed. The method includes a first process of forming an active region on a first main surface side of the semiconductor wafer and a second process of forming a first process control monitor (PCM) on a second main surface side of the semiconductor wafer. The method further includes before the second process, a third process of forming a second PCM on the first main surface side of the semiconductor wafer. The first PCM and the second PCM are formed at an area located at the same position in a plan view of the semiconductor wafer.Type: ApplicationFiled: August 27, 2019Publication date: April 30, 2020Applicant: FUJI ELECTRIC CO., LTD.Inventors: Hiroshi TAKISHITA, Kazuhiro KITAHARA, Ryouichi KAWANO, Motoyoshi KUBOUCHI
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Publication number: 20200051820Abstract: Provided is a semiconductor device including: a semiconductor substrate doped with an impurity; a front-surface-side electrode provided at a side of a front surface of the semiconductor substrate; and a back-surface-side electrode provided at a side of a back surface of the semiconductor substrate; wherein the semiconductor substrate includes: a peak region arranged at the side of the back surface of the semiconductor substrate and having one or more peaks of an impurity concentration; a high concentration region arranged closer to the front surface than the peak region and having an impurity concentration more gently sloped than the one or more peaks; and a low concentration region arranged closer to the front surface than the high concentration region and having an impurity concentration lower than the impurity concentration of the high concentration region and a substrate concentration of the semiconductor substrate.Type: ApplicationFiled: October 23, 2019Publication date: February 13, 2020Inventors: Hiroshi TAKISHITA, Takashi YOSHIMURA, Takahiro TAMURA, Yuichi ONOZAWA, Akio YAMANO
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Patent number: 10546919Abstract: A front surface element structure is formed on the front surface side of an n?-type semiconductor substrate. Then defects are formed throughout an n?-type semiconductor substrate to adjust a carrier lifetime. Hydrogen ions are ion-implanted from a rear surface side of the n?-type semiconductor substrate, and a hydrogen implanted region having a hydrogen concentration higher than a hydrogen concentration of a bulk substrate is formed in the surface layer of a rear surface side of the n?-type semiconductor substrate.Type: GrantFiled: July 7, 2015Date of Patent: January 28, 2020Assignee: FUJI ELECTRIC CO., LTD.Inventors: Yuichi Onozawa, Hiroshi Takishita, Takashi Yoshimura
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Patent number: 10522355Abstract: A resist protective film protects front surfaces of a front electrode and a polyimide protective film. With a BG tape affixed to the resist protective film, a semiconductor substrate is ground from a rear surface to a predetermined product thickness. After the BG tape is removed, a predetermined diffusion region is formed in a surface layer at the ground rear surface of the semiconductor substrate. The resist protective film is heated to and maintained at a temperature of at least 100 degrees C., for evaporating water in the resist protective film. Laser is irradiated from the rear surface of the semiconductor substrate, activating an impurity of the diffusion region. The resist protective film is removed. Thus, during heat treatment for impurity activation at one main surface of the semiconductor wafer, deterioration, peeling, and deformation of the resist protective film protecting the other main surface of the semiconductor wafer may be suppressed.Type: GrantFiled: July 1, 2019Date of Patent: December 31, 2019Assignee: FUJI ELECTRIC CO., LTD.Inventors: Takashi Yoshimura, Hiroshi Takishita, Seiichi Miyahara
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Patent number: 10468254Abstract: Provided is a semiconductor device including: a semiconductor substrate doped with an impurity; a front-surface-side electrode provided at a side of a front surface of the semiconductor substrate; and a back-surface-side electrode provided at a side of a back surface of the semiconductor substrate; wherein the semiconductor substrate includes: a peak region arranged at the side of the back surface of the semiconductor substrate and having one or more peaks of an impurity concentration; a high concentration region arranged closer to the front surface than the peak region and having an impurity concentration more gently sloped than the one or more peaks; and a low concentration region arranged closer to the front surface than the high concentration region and having an impurity concentration lower than the impurity concentration of the high concentration region and a substrate concentration of the semiconductor substrate.Type: GrantFiled: August 29, 2017Date of Patent: November 5, 2019Assignee: FUJI ELECTRIC CO., LTD.Inventors: Hiroshi Takishita, Takashi Yoshimura, Takahiro Tamura, Yuichi Onozawa, Akio Yamano
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Publication number: 20190326119Abstract: A resist protective film protects front surfaces of a front electrode and a polyimide protective film. With a BG tape affixed to the resist protective film, a semiconductor substrate is ground from a rear surface to a predetermined product thickness. After the BG tape is removed, a predetermined diffusion region is formed in a surface layer at the ground rear surface of the semiconductor substrate. The resist protective film is heated to and maintained at a temperature of at least 100 degrees C., for evaporating water in the resist protective film. Laser is irradiated from the rear surface of the semiconductor substrate, activating an impurity of the diffusion region. The resist protective film is removed. Thus, during heat treatment for impurity activation at one main surface of the semiconductor wafer, deterioration, peeling, and deformation of the resist protective film protecting the other main surface of the semiconductor wafer may be suppressed.Type: ApplicationFiled: July 1, 2019Publication date: October 24, 2019Applicant: FUJI ELECTRIC CO., LTD.Inventors: Takashi YOSHIMURA, Hiroshi TAKISHITA, Seiichi MIYAHARA
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Publication number: 20190319090Abstract: Hydrogen atoms and crystal defects are introduced into an n? semiconductor substrate by proton implantation. The crystal defects are generated in the n? semiconductor substrate by electron beam irradiation before or after the proton implantation. Then, a heat treatment for generating donors is performed. The amount of crystal defects is appropriately controlled during the heat treatment for generating donors to increase a donor generation rate. In addition, when the heat treatment for generating donors ends, the crystal defects formed by the electron beam irradiation and the proton implantation are recovered and controlled to an appropriate amount of crystal defects. Therefore, for example, it is possible to improve a breakdown voltage and reduce a leakage current.Type: ApplicationFiled: June 3, 2019Publication date: October 17, 2019Inventors: Takashi YOSHIMURA, Masayuki MIYAZAKI, Hiroshi TAKISHITA, Hidenao KURIBAYASHI
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Publication number: 20190288078Abstract: A semiconductor device comprises: an n-type semiconductor substrate; a p-type anode region formed in the semiconductor substrate on its front surface side; an n-type field stop region formed in the semiconductor substrate on its rear surface side with protons as a donor; and an n-type cathode region formed in the semiconductor substrate to be closer to its rear surface than the field stop region is, wherein a concentration distribution of the donor in the field stop region in its depth direction has a first peak, and a second peak that is closer to the rear surface of the semiconductor substrate than the first peak is, and has a concentration lower than that of the first peak, and a carrier lifetime in at least a partial region between the anode region and the cathode region is longer than carrier lifetimes in the anode region.Type: ApplicationFiled: June 4, 2019Publication date: September 19, 2019Inventors: Hiroki WAKIMOTO, Hiroshi TAKISHITA, Takashi YOSHIMURA, Takahiro TAMURA, Yuichi ONOZAWA
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Patent number: 10374102Abstract: A semiconductor device includes first to fourth semiconductor regions, and first and second electrodes. The second semiconductor region is selectively disposed in a surface layer of one main surface of the first semiconductor region. The first electrode is in contact with a contact region of the second semiconductor region. The third semiconductor region is disposed in a surface layer on another main surface of the first semiconductor region, and having an impurity concentration higher than that of the first semiconductor region. The second electrode is in contact with the third semiconductor region. The fourth semiconductor region of the second conductivity type is disposed in the first semiconductor region, and disposed closer to the one main surface than the third semiconductor region. The fourth semiconductor region is disposed at least within the contact region in a plan view.Type: GrantFiled: February 5, 2018Date of Patent: August 6, 2019Assignee: FUJI ELECTRIC CO., LTD.Inventors: Yuichi Onozawa, Takashi Yoshimura, Hiroshi Takishita
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Patent number: 10355079Abstract: Hydrogen atoms and crystal defects are introduced into an n-semiconductor substrate by proton implantation. The crystal defects are generated in the n-semiconductor substrate by electron beam irradiation before or after the proton implantation. Then, a heat treatment for generating donors is performed. The amount of crystal defects is appropriately controlled during the heat treatment for generating donors to increase a donor generation rate. In addition, when the heat treatment for generating donors ends, the crystal defects formed by the electron beam irradiation and the proton implantation are recovered and controlled to an appropriate amount of crystal defects. Therefore, for example, it is possible to improve a breakdown voltage and reduce a leakage current.Type: GrantFiled: July 30, 2018Date of Patent: July 16, 2019Assignee: FUJI ELECTRIC CO., LTD.Inventors: Takashi Yoshimura, Masayuki Miyazaki, Hiroshi Takishita, Hidenao Kuribayashi
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Publication number: 20190214462Abstract: Provided is a semiconductor device including a semiconductor substrate doped with impurities, a front surface-side electrode provided on a front surface side of the semiconductor substrate, a back surface-side electrode provided on a back surface side of the semiconductor substrate, wherein the semiconductor substrate has a peak region arranged on the back surface side of the semiconductor substrate and having one or more peaks of impurity concentration, a high concentration region arranged closer to the front surface than the peak region and having a gentler impurity concentration than the one or more peaks, and a low concentration region arranged closer to the front surface than the high concentration region and having a lower impurity concentration than the high concentration region.Type: ApplicationFiled: March 20, 2019Publication date: July 11, 2019Inventors: Takahiro TAMURA, Yuichi ONOZAWA, Takashi YOSHIMURA, Hiroshi TAKISHITA, Akio YAMANO