Patents by Inventor Hirotaka Oosawa

Hirotaka Oosawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7450921
    Abstract: The invention provides a communication semiconductor integrated circuit (RF IC) that, when a transmission oscillator is incorporated into a semiconductor chip, secures the oscillation operation over a wide frequency range, prevents a deterioration of a transmission spectrum, and thereby enhances the accuracy of an oscillation frequency. The integrated circuit corrects a dispersion of the KV characteristic of the transmission oscillator by calibrating a current Icp of the charge pump inside the phase control loop. More in concrete, the integrated circuit measures a KV value Kv of the transmission oscillator, and calibrates the current Icp of the charge pump so that Kv·Icp falls into a predetermined value.
    Type: Grant
    Filed: January 11, 2007
    Date of Patent: November 11, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Satoshi Arayashiki, Hirotaka Oosawa, Noriyuki Kurakami, Akira Okasaka, Yasuyuki Kimura, Toshiya Uozumi, Hirokazu Miyagawa, Satoshi Tanaka
  • Publication number: 20080012649
    Abstract: In a PLL circuit including an oscillator, a phase comparator, a charge pump circuit, and a loop filter, without providing a plurality of capacitative elements, that is, without increasing the occupied area so much, the characteristics of the PLL circuit can be adjusted according to manufacture variations in a resistive element and a capacitative element, and a loop filter can be formed on a chip. A resistive element and a capacitative element of a loop filter are formed on a semiconductor chip. As the resistive element, a plurality of elements having different resistance values are provided and switched by a switch, thereby enabling the resistance value to be adjusted. Current in a charge pump circuit is also made adjustable, and the current of the charge pump circuit is adjusted according to switching among the resistance values of the resistive elements.
    Type: Application
    Filed: September 5, 2007
    Publication date: January 17, 2008
    Inventors: Jiro Shinbo, Satoshi Arayashiki, Hirotaka Oosawa, Toshiya Uozumi, Satoru Yamamoto
  • Publication number: 20080012650
    Abstract: In a PLL circuit including an oscillator, a phase comparator, a charge pump circuit, and a loop filter, without providing a plurality of capacitative elements, that is, without increasing the occupied area so much, the characteristics of the PLL circuit can be adjusted according to manufacture variations in a resistive element and a capacitative element, and a loop filter can be formed on a chip. A resistive element and a capacitative element of a loop filter are formed on a semiconductor chip. As the resistive element, a plurality of elements having different resistance values are provided and switched by a switch, thereby enabling the resistance value to be adjusted. Current in a charge pump circuit is also made adjustable, and the current of the charge pump circuit is adjusted according to switching among the resistance values of the resistive elements.
    Type: Application
    Filed: September 5, 2007
    Publication date: January 17, 2008
    Inventors: Jiro Shinbo, Satoshi Arayashiki, Hirotaka Oosawa, Toshiya Uozumi, Satoru Yamamoto
  • Patent number: 7313369
    Abstract: A communication semiconductor integrated circuit has an oscillator circuit forming part of a transmission PLL circuit fabricated on a single semiconductor chip together with an oscillator circuit forming part of a reception PLL circuit and an oscillator circuit for an intermediate frequency. The oscillator circuit forming part of the transmission PLL circuit is configured to be operable in a plurality of bands. A circuit for measuring the oscillating frequency of the oscillator circuit forming part of the transmission PLL circuit is also used for measuring the oscillating frequency of the oscillator circuit forming part of the reception PLL circuit or for measuring the oscillating frequency of the oscillator circuit for the intermediate frequency.
    Type: Grant
    Filed: May 5, 2005
    Date of Patent: December 25, 2007
    Assignees: Renesas Technology Corp., TTPcom Limited
    Inventors: Hirotaka Oosawa, Jiro Shinbo, Noriyuki Kurakami, Masumi Kasahara, Robert Astle Henshaw
  • Publication number: 20070281651
    Abstract: The invention provides a communication semiconductor integrated circuit device (RF IC) capable of pulling in the frequency of a PLL circuit to a desired set frequency at high speed even in the case where a frequency settable range of the PLL circuit is wide without providing a current source other than a current source for charging and discharging in an normal operation. An oscillator as a component of a PLL circuit is constructed so as to be operative in a plurality of bands. In a state where a control voltage of the oscillator is fixed to a predetermined value, an oscillation frequency of the oscillator is measured in each of bands and stored in a storing circuit. A set value for designating a band supplied at the time of PLL operation is compared with the stored measured frequency value. From a result of comparison, a band to be actually used in the oscillator is determined, and a frequency difference between the maximum frequency of the selected band and the set frequency is obtained.
    Type: Application
    Filed: June 8, 2007
    Publication date: December 6, 2007
    Inventors: Hirotaka Oosawa, Masumi Kasahara, Noriyuki Kurakami, Toshiya Uozumi
  • Patent number: 7279991
    Abstract: In a PLL circuit including an oscillator, a phase comparator, a charge pump circuit, and a loop filter, without providing a plurality of capacitative elements, that is, without increasing the occupied area so much, the characteristics of the PLL circuit can be adjusted according to manufacture variations in a resistive element and a capacitative element, and a loop filter can be formed on a chip. A resistive element and a capacitative element of a loop filter are formed on a semiconductor chip. As the resistive element, a plurality of elements having different resistance values are provided and switched by a switch, thereby enabling the resistance value to be adjusted. Current in a charge pump circuit is also made adjustable, and the current of the charge pump circuit is adjusted according to switching among the resistance values of the resistive elements.
    Type: Grant
    Filed: July 12, 2005
    Date of Patent: October 9, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Jiro Shinbo, Satoshi Arayashiki, Hirotaka Oosawa, Toshiya Uozumi, Satoru Yamamoto
  • Patent number: 7269402
    Abstract: A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.
    Type: Grant
    Filed: July 25, 2006
    Date of Patent: September 11, 2007
    Assignees: Renesas Technology Corp., TTP Com Limited
    Inventors: Toshiya Uozumi, Satoshi Tanaka, Masumi Kasahara, Hirotaka Oosawa, Yasuyuki Kimura, Robert Astle Henshaw
  • Patent number: 7263340
    Abstract: A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.
    Type: Grant
    Filed: July 25, 2006
    Date of Patent: August 28, 2007
    Assignees: Renesas Technology Corporation, TTP Com Limited
    Inventors: Toshiya Uozumi, Satoshi Tanaka, Masumi Kasahara, Hirotaka Oosawa, Yasuyuki Kimura, Robert Astle Henshaw
  • Patent number: 7242916
    Abstract: The invention provides a communication semiconductor integrated circuit device (RF IC) capable of pulling in the frequency of a PLL circuit to a desired set frequency at high speed even in the case where a frequency settable range of the PLL circuit is wide without providing a current source other than a current source for charging and discharging in an normal operation. An oscillator as a component of a PLL circuit is constructed so as to be operative in a plurality of bands. In a state where a control voltage of the oscillator is fixed to a predetermined value, an oscillation frequency of the oscillator is measured in each of bands and stored in a storing circuit. A set value for designating a band supplied at the time of PLL operation is compared with the stored measured frequency value. From a result of comparison, a band to be actually used in the oscillator is determined, and a frequency difference between the maximum frequency of the selected band and the set frequency is obtained.
    Type: Grant
    Filed: September 12, 2006
    Date of Patent: July 10, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Hirotaka Oosawa, Masumi Kasahara, Noriyuki Kurakami, Toshiya Uozumi
  • Publication number: 20070111675
    Abstract: The invention provides a communication semiconductor integrated circuit (RF IC) that, when a transmission oscillator is incorporated into a semiconductor chip, secures the oscillation operation over a wide frequency range, prevents a deterioration of a transmission spectrum, and thereby enhances the accuracy of an oscillation frequency. The integrated circuit corrects a dispersion of the KV characteristic of the transmission oscillator by calibrating a current Icp of the charge pump inside the phase control loop. More in concrete, the integrated circuit measures a KV value Kv of the transmission oscillator, and calibrates the current Icp of the charge pump so that Kv·Icp falls into a predetermined value.
    Type: Application
    Filed: January 11, 2007
    Publication date: May 17, 2007
    Inventors: Satoshi Arayashiki, Hirotaka Oosawa, Noriyuki Kurakami, Akira Okasaka, Yasuyuki Kimura, Toshiya Uozumi, Hirokazu Miyagawa, Satoshi Tanaka
  • Patent number: 7187911
    Abstract: The invention provides a communication semiconductor integrated circuit (RF IC) that, when a transmission oscillator is incorporated into a semiconductor chip, secures the oscillation operation over a wide frequency range, prevents a deterioration of a transmission spectrum, and thereby enhances the accuracy of an oscillation frequency. The integrated circuit corrects a dispersion of the KV characteristic of the transmission oscillator by calibrating a current Icp of the charge pump inside the phase control loop. More in concrete, the integrated circuit measures a KV value Kv of the transmission oscillator, and calibrates the current Icp of the charge pump so that Kv·Icp falls into a predetermined value.
    Type: Grant
    Filed: June 8, 2004
    Date of Patent: March 6, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Satoshi Arayashiki, Hirotaka Oosawa, Noriyuki Kurakami, Akira Okasaka, Yasuyuki Kimura, Toshiya Uozumi, Hirokazu Miyagawa, Satoshi Tanaka
  • Publication number: 20070010225
    Abstract: The invention provides a communication semiconductor integrated circuit device (RF IC) capable of pulling in the frequency of a PLL circuit to a desired set frequency at high speed even in the case where a frequency settable range of the PLL circuit is wide without providing a current source other than a current source for charging and discharging in an normal operation. An oscillator as a component of a PLL circuit is constructed so as to be operative in a plurality of bands. In a state where a control voltage of the oscillator is fixed to a predetermined value, an oscillation frequency of the oscillator is measured in each of bands and stored in a storing circuit. A set value for designating a band supplied at the time of PLL operation is compared with the stored measured frequency value. From a result of comparison, a band to be actually used in the oscillator is determined, and a frequency difference between the maximum frequency of the selected band and the set frequency is obtained.
    Type: Application
    Filed: September 12, 2006
    Publication date: January 11, 2007
    Inventors: Hirotaka Oosawa, Masumi Kasahara, Noriyuki Kurakami, Toshiya Uozumi
  • Patent number: 7154341
    Abstract: A communication semiconductor integrated circuit device includes an RFVCO and a TXVCO and is formed over one semiconductor substrate, and has a first operation mode (idle mode) which does not perform transmission and reception, a second operation mode (warmup mode) which performs a preparation prior to the start of transmission or reception, and a third operation mode (transmission or reception mode) which performs transmission or reception. In the first operation mode, two oscillators are deactivated, and the operation of selecting a frequency band to be used in at least the TXVCO which generates a transmit signal, is performed in the second operation mode.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: December 26, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Satoru Yamamoto, Hirotaka Oosawa, Toshiya Uozumi, Noriyuki Kurakami, Jiro Shinbo
  • Patent number: 7146143
    Abstract: The invention provides a communication semiconductor integrated circuit device (RF IC) capable of pulling in the frequency of a PLL circuit to a desired set frequency at high speed even in the case where a frequency settable range of the PLL circuit is wide without providing a current source other than a current source for charging and discharging in an normal operation. An oscillator as a component of a PLL circuit is constructed so as to be operative in a plurality of bands. In a state where a control voltage of the oscillator is fixed to a predetermined value, an oscillation frequency of the oscillator is measured in each of bands and stored in a storing circuit. A set value for designating a band supplied at the time of PLL operation is compared with the stored measured frequency value. From a result of comparison, a band to be actually used in the oscillator is determined, and a frequency difference between the maximum frequency of the selected band and the set frequency is obtained.
    Type: Grant
    Filed: April 16, 2003
    Date of Patent: December 5, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Hirotaka Oosawa, Masumi Kasahara, Noriyuki Kurakami, Toshiya Uozumi
  • Publication number: 20060258313
    Abstract: A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.
    Type: Application
    Filed: July 25, 2006
    Publication date: November 16, 2006
    Inventors: Toshiya Uozumi, Satoshi Tanaka, Masumi Kasahara, Hirotaka Oosawa, Yasuyuki Kimura, Robert Henshaw
  • Publication number: 20060258312
    Abstract: A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.
    Type: Application
    Filed: July 25, 2006
    Publication date: November 16, 2006
    Inventors: Toshiya Uozumi, Satoshi Tanaka, Masumi Kasahara, Hirotaka Oosawa, Yasuyuki Kimura, Robert Henshaw
  • Publication number: 20060220757
    Abstract: A radio frequency IC includes a PLL circuit and prevents a PLL loop from being easily unlocked upon fluctuation of VCO oscillation frequencies due to a change in temperature. The PLL loop includes a VCO capable of switching oscillation frequency bands, a variable frequency divider, a phase comparison circuit, and a loop filter. A switching switch can apply one of plural predetermined set voltages to the VCO in place of a voltage of the loop filter in an open state in which the loop filter is disconnected from the VCO. The radio frequency IC als has a decision circuit that decides whether the phase of output of the variable frequency divider is ahead of or lags behind that of a reference signal of a predetermined frequency, and an automatic band switching circuit that generates a signal for switching VCO frequency bands, based on output of the decision circuit.
    Type: Application
    Filed: March 28, 2006
    Publication date: October 5, 2006
    Inventors: Kunito Satake, Hirotaka Oosawa, Isao Ikuta, Satoru Yamamoto
  • Patent number: 7103337
    Abstract: A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.
    Type: Grant
    Filed: February 26, 2003
    Date of Patent: September 5, 2006
    Assignees: Hitachi, Ltd., TTP Com Limited
    Inventors: Toshiya Uozumi, Satoshi Tanaka, Masumi Kasahara, Hirotaka Oosawa, Yasuyuki Kimura, Robert Astle Henshaw
  • Patent number: 7085587
    Abstract: Disclosed herein is a direct conversion type signal processing semiconductor integrated circuit device capable of suppressing a DC voltage variation in the output of a variable gain amplifier upon the transition to a reception mode, reproducing stable receiving characteristics and improving receiving sensitivity. In the signal processing semiconductor integrated circuit device, voltage reference circuits for generating reference voltages for controlling or restricting currents for current sources for supplying operating currents for amplifiers constituting a reception-system circuit are boosted upon the transition from an idle mode or the like to the reception mode to allow the currents to flow into the constant-current sources of the amplifiers after the stabilization of the generated reference voltages.
    Type: Grant
    Filed: January 3, 2002
    Date of Patent: August 1, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Ikuya Oono, Toshiki Matsui, Hirotaka Oosawa
  • Patent number: 7020444
    Abstract: A communication semiconductor integrated circuit has an oscillator circuit forming part of a transmission PLL circuit fabricated on a single semiconductor chip together with an oscillator circuit forming part of a reception PLL circuit and an oscillator circuit for an intermediate frequency. The oscillator circuit for the transmission PLL circuit is configured to be operable in a plurality of bands. The communication semiconductor integrated circuit also comprises a circuit for measuring the oscillating frequency of the oscillator circuit for the transmission PLL circuit, and a storage circuit for storing the result of measurement made by the measuring circuit. A band to be used by the oscillator circuit for the transmission PLL circuit is determined based on values for setting the oscillating frequencies of the oscillator circuit forming part of the reception PLL circuit and the intermediate frequency oscillator circuit, and the result of measurement stored in the storage circuit.
    Type: Grant
    Filed: February 26, 2003
    Date of Patent: March 28, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Jiro Shinbo, Hirotaka Oosawa, Noriyuki Kurakami, Masumi Kasahara, Robert Astle Henshaw