Abstract: In a PLL circuit including an oscillator, a phase comparator, a charge pump circuit, and a loop filter, without providing a plurality of capacitative elements, that is, without increasing the occupied area so much, the characteristics of the PLL circuit can be adjusted according to manufacture variations in a resistive element and a capacitative element, and a loop filter can be formed on a chip. A resistive element and a capacitative element of a loop filter are formed on a semiconductor chip. As the resistive element, a plurality of elements having different resistance values are provided and switched by a switch, thereby enabling the resistance value to be adjusted. Current in a charge pump circuit is also made adjustable, and the current of the charge pump circuit is adjusted according to switching among the resistance values of the resistive elements.

Abstract: A communication semiconductor integrated circuit has an oscillator circuit forming part of a transmission PLL circuit fabricated on a single semiconductor chip together with an oscillator circuit forming part of a reception PLL circuit and an oscillator circuit for an intermediate frequency. The oscillator circuit forming part of the transmission PLL circuit is configured to be operable in a plurality of bands. A circuit for measuring the oscillating frequency of the oscillator circuit forming part of the transmission PLL circuit is also used for measuring the oscillating frequency of the oscillator circuit forming part of the reception PLL circuit or for measuring the oscillating frequency of the oscillator circuit for the intermediate frequency.

Abstract: An input/output pin for test corresponding to a test circuit of the digital section is used in common as the input/output pin for normal operation of the analog section. The selection switches are respectively provided between the relevant analog pin and analog circuit and on a signal line up to the test circuit of the digital section from the relevant analog pin and the switches are provided at both end portions of the signal line between the test circuit of digital section and the input/output pin for common use in order to fix the voltage of the signal line to the predetermined voltage such as the ground voltage during the normal operation.

Abstract: A communication semiconductor integrated circuit device includes an RFVCO and a TXVCO and is formed over one semiconductor substrate, and has a first operation mode (idle mode) which does not perform transmission and reception, a second operation mode (warmup mode) which performs a preparation prior to the start of transmission or reception, and a third operation mode (transmission or reception mode) which performs transmission or reception. In the first operation mode, two oscillators are deactivated, and the operation of selecting a frequency band to be used in at least the TXVCO which generates a transmit signal, is performed in the second operation mode.

Abstract: A communication semiconductor integrated circuit has an oscillator circuit forming part of a transmission PLL circuit fabricated on a single semiconductor chip together with an oscillator circuit forming part of a reception PLL circuit and an oscillator circuit for an intermediate frequency. The oscillator circuit forming part of the transmission PLL circuit is configured to be operable in a plurality of bands. A circuit for measuring the oscillating frequency of the oscillator circuit forming part of the transmission PLL circuit is also used for measuring the oscillating frequency of the oscillator circuit forming part of the reception PLL circuit or for measuring the oscillating frequency of the oscillator circuit for the intermediate frequency.

Abstract: The invention provides a communication semiconductor integrated circuit (RF IC) that, when a transmission oscillator is incorporated into a semiconductor chip, secures the oscillation operation over a wide frequency range, prevents a deterioration of a transmission spectrum, and thereby enhances the accuracy of an oscillation frequency. The integrated circuit corrects a dispersion of the KV characteristic of the transmission oscillator by calibrating a current Icp of the charge pump inside the phase control loop. More in concrete, the integrated circuit measures a KV value Kv of the transmission oscillator, and calibrates the current Icp of the charge pump so that Kv·Icp falls into a predetermined value.

Abstract: An input/output pin for test corresponding to a test circuit of the digital section is used in common as the input/output pin for usual operation of the analog section, the selection switches are respectively provided between the relevant analog pin and analog circuit and on a signal line up to the test circuit of the digital section from the relevant analog pin and the switches are provided at both end portions of the signal line between the test circuit of digital section and the input/output pin for common use in order to fix the voltage of the signal line to the predetermined voltage such as the ground voltage during the usual operation.

Abstract: A communication semiconductor integrated circuit has an oscillator circuit forming part of a transmission PLL circuit fabricated on a single semiconductor chip together with an oscillator circuit forming part of a reception PLL circuit and an oscillator circuit for an intermediate frequency. The oscillator circuit for the transmission PLL circuit is configured to be operable in a plurality of bands. The communication semiconductor integrated circuit also comprises a circuit for measuring the oscillating frequency of the oscillator circuit for the transmission PLL circuit, and a storage circuit for storing the result of measurement made by the measuring circuit. A band to be used by the oscillator circuit for the transmission PLL circuit is determined based on values for setting the oscillating frequencies of the oscillator circuit forming part of the reception PLL circuit and the intermediate frequency oscillator circuit, and the result of measurement stored in the storage circuit.

Abstract: A communication semiconductor integrated circuit has an oscillator circuit forming part of a transmission PLL circuit fabricated on a single semiconductor chip together with an oscillator circuit forming part of a reception PLL circuit and an oscillator circuit for an intermediate frequency. The oscillator circuit forming part of the transmission PLL circuit is configured to be operable in a plurality of bands. A circuit for measuring the oscillating frequency of the oscillator circuit forming part of the transmission PLL circuit is also used for measuring the oscillating frequency of the oscillator circuit forming part of the reception PLL circuit or for measuring the oscillating frequency of the oscillator circuit for the intermediate frequency.

Abstract: A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.

Abstract: The invention provides a communication semiconductor integrated circuit device (RF IC) capable of pulling in the frequency of a PLL circuit to a desired set frequency at high speed even in the case where a frequency settable range of the PLL circuit is wide without providing a current source other than a current source for charging and discharging in an normal operation. An oscillator as a component of a PLL circuit is constructed so as to be operative in a plurality of bands. In a state where a control voltage of the oscillator is fixed to a predetermined value, an oscillation frequency of the oscillator is measured in each of bands and stored in a storing circuit. A set value for designating a band supplied at the time of PLL operation is compared with the stored measured frequency value. From a result of comparison, a band to be actually used in the oscillator is determined, and a frequency difference between the maximum frequency of the selected band and the set frequency is obtained.

Abstract: An input/output pin for test corresponding to a test circuit of the digital section is used in common as the input/output pin for usual operation of the analog section, the selection switches are respectively provided between the relevant analog pin and analog circuit and on a signal line up to the test circuit of the digital section from the relevant analog pin and the switches are provided at both end portions of the signal line between the test circuit of digital section and the input/output pin for common use in order to fix the voltage of the signal line to the predetermined voltage such as the ground voltage during the usual operation.

Abstract: An input/output pin for test corresponding to a test circuit of the digital section is used in common as the input/output pin for usual operation of the analog section, the selection switches are respectively provided between the relevant analog pin and analog circuit and on a signal line up to the test circuit of the digital section from the relevant analog pin and the switches are provided at both end portions of the signal line between the test circuit of digital section and the input/output pin for common use in order to fix the voltage of the signal line to the predetermined voltage such as the ground voltage during the usual operation.

Abstract: Disclosed herein is a direct conversion type signal processing semiconductor integrated circuit device capable of suppressing a DC voltage variation in the output of a variable gain amplifier upon the transition to a reception mode, reproducing stable receiving characteristics and improving receiving sensitivity. In the signal processing semiconductor integrated circuit device, voltage reference circuits for generating reference voltages for controlling or restricting currents for current sources for supplying operating currents for amplifiers constituting a reception-system circuit are boosted upon the transition from an idle mode or the like to the reception mode to allow the currents to flow into the constant-current sources of the amplifiers after the stabilization of the generated reference voltages.