Patents by Inventor Hiroyuki Ban
Hiroyuki Ban has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7639060Abstract: A level shift circuit includes a first capacitor circuit including capacitors connected in series between a ground and a predetermined potential, a first trigger circuit coupled to the predetermined potential side of the first capacitor circuit, an input terminal coupled to the ground side of the first capacitor circuit, a second capacitor circuit including capacitors connected in series between the ground and the predetermined potential, a second trigger circuit coupled to the predetermined potential side of the second capacitor circuit, an inverter coupled between the input terminal and the ground potential side of the second capacitor circuit, and a SR latch circuit having a first input coupled to an output of the first trigger circuit and a second input coupled to an output of the second trigger circuit.Type: GrantFiled: March 19, 2008Date of Patent: December 29, 2009Assignee: DENSO CORPORATIONInventors: Satoshi Shiraki, Hiroyuki Ban, Junichi Nagata
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Patent number: 7554314Abstract: A current mirror circuit includes transistors having bases coupled together and emitters connected to a voltage line. The current mirror circuit further includes a zener diode having an anode connected to the bases and a cathode connected to the voltage line. When a base potential of the transistors decreases, a reverse current of the zener diode increases. Therefore, the zener diode has a resistance and acts as a resistor to clamp the base potential of the transistors. A layout area of the zener diode is much smaller than that of the resistor having a resistance equal to that of the zener diode. The current mirror circuit achieves reduced chip size by using the zener diode instead of the resistor.Type: GrantFiled: October 31, 2006Date of Patent: June 30, 2009Assignee: DENSO CORPORATIONInventors: Satoshi Sobue, Hiroyuki Ban, Shigenori Mori
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Patent number: 7542255Abstract: An input protection circuit comprises a reverse flow preventing diode, a series circuit of a diode and a Zener diode, and a current path forming resistor or diode. The reverse flow preventing diode is connected between an input terminal and an internal circuit. The series circuit is connected between the input terminal and a ground. The current path forming resistor or diode is connected between a first common connection point of the reverse flow preventing diode and the internal circuit and a second common connection point of the series circuit, and sets a potential at the first common connection point to be less than a potential at the input terminal when the surge voltage is applied to the input terminal.Type: GrantFiled: March 8, 2007Date of Patent: June 2, 2009Assignee: DENSO CORPORATIONInventors: Shinichiro Nakata, Hiroyuki Ban, Satoshi Ichikawa
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Publication number: 20090127605Abstract: A semiconductor device includes: n transistor elements; n resistive elements; and n capacitive elements, each kind of elements coupled in series between the first and second terminals. The gate of each transistor element has a gate pad, and each transistor element includes transistor pads disposed on both sides. Each resistive element includes resistive pads disposed on both sides. Each capacitive element includes capacitive pads disposed on both sides. The gate pad other than the first stage transistor element, a corresponding resistive pad, and a corresponding capacitive pad are electrically coupled. One transistor pad, one resistive pad, and one capacitive pad in the first stage are electrically coupled. One transistor pad, one resistive pad, and one capacitive pad in the n-th stage are electrically coupled.Type: ApplicationFiled: January 22, 2008Publication date: May 21, 2009Applicant: DENSO CORPORATIONInventors: Satoshi Shiraki, Hiroyuki Ban, Akira Yamada
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Publication number: 20080231340Abstract: A level shift circuit includes a first capacitor circuit including capacitors connected in series between a ground and a predetermined potential, a first trigger circuit coupled to the predetermined potential side of the first capacitor circuit, an input terminal coupled to the ground side of the first capacitor circuit, a second capacitor circuit including capacitors connected in series between the ground and the predetermined potential, a second trigger circuit coupled to the predetermined potential side of the second capacitor circuit, an inverter coupled between the input terminal and the ground potential side of the second capacitor circuit, and a SR latch circuit having a first input coupled to an output of the first trigger circuit and a second input coupled to an output of the second trigger circuit.Type: ApplicationFiled: March 19, 2008Publication date: September 25, 2008Applicant: DENSO CORPORATIONInventors: Satoshi Shiraki, Hiroyuki Ban, Junichi Nagata
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Publication number: 20080007920Abstract: A load driving device includes: an output power device for driving a load; a driving IC for controlling the output power device, wherein the driving IC is electrically coupled with the output power device through a wire or a connection member; and a first electrode substrate. The output power device and the driving IC are mounted on the first electrode substrate. In this case, the output power device is controlled with high speed, and a mounting area of the output power device and the driving IC is reduced.Type: ApplicationFiled: May 31, 2007Publication date: January 10, 2008Applicant: DENSO CORPORATIONInventors: Satoshi Shiraki, Akira Yamada, Hiroyuki Ban
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Publication number: 20070279272Abstract: A semiconductor device includes a semiconductor substrate, a first wire disposed on the semiconductor substrate, an first insulating layer disposed on the semiconductor substrate and the wire, a first thin film resistor having a first resistance within a predetermined error range, and a second thin film resistor having a second resistance which is allowable to be out of the predetermined error range. A surface of the first insulating layer includes a first area and a second area, in which the second area is located adjacent to the first wire. The first thin film resistor is disposed in the first area, and the second thin film resistor is disposed in the second area.Type: ApplicationFiled: May 31, 2007Publication date: December 6, 2007Applicant: DENSO CORPORATIONInventors: Satoshi Sobue, Hiroyuki Ban
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Patent number: 7294912Abstract: A semiconductor device is composed of a heat sink, an IC chip mounted and fixed on a specific face of the heat sink, a lead frame electrically connected to the IC chip and a sealing mold resin package. One or more of the faces of the heat sink has a specific surface area.Type: GrantFiled: August 4, 2005Date of Patent: November 13, 2007Assignee: Denso CorporationInventors: Katsuhito Takeuchi, Naohito Mizuno, Shinichi Hirose, Hiroyuki Ban
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Publication number: 20070234567Abstract: There is provided a groove machining method by means of water jet which machines grooves by means of a water jet device including injection nozzles for injecting a water jet on a face to be machined of a member to be machined, including a step of disposing protection members which are more resistive against an injection power of the water jet than the member to be machined so as to cover a portion which is a part of the face to be machined, and on which grooves are not to be formed in order to form ends of the machined grooves in a travel direction of the injection nozzles inside an outline of the face to be machined, and a step of moving the nozzles across the protection members and the face to be machined while injecting the water jet at a predetermined injection power from the injection nozzles.Type: ApplicationFiled: March 1, 2007Publication date: October 11, 2007Applicant: Kabushiki Kaisha Kobe Seiko Sho (Kobe Steel, Ltd.)Inventors: Koji Noishiki, Hiroyuki Ban
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Publication number: 20070217104Abstract: An input protection circuit comprises a reverse flow preventing diode, a series circuit of a diode and a Zener diode, and a current path forming resistor or diode. The reverse flow preventing diode is connected between an input terminal and an internal circuit. The series circuit is connected between the input terminal and a ground. The current path forming resistor or diode is connected between a first common connection point of the reverse flow preventing diode and the internal circuit and a second common connection point of the series circuit, and sets a potential at the first common connection point to be less than a potential at the input terminal when the surge voltage is applied to the input terminal.Type: ApplicationFiled: March 8, 2007Publication date: September 20, 2007Applicant: DENSO CORPORATIONInventors: Shinichiro Nakata, Hiroyuki Ban, Satoshi Ichikawa
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Publication number: 20070103139Abstract: A current mirror circuit includes transistors having bases coupled together and emitters connected to a voltage line. The current mirror circuit further includes a zener diode having an anode connected to the bases and a cathode connected to the voltage line. When a base potential of the transistors decreases, a reverse current of the zener diode increases. Therefore, the zener diode has a resistance and acts as a resistor to clamp the base potential of the transistors. A layout area of the zener diode is much smaller than that of the resistor having a resistance equal to that of the zener diode. The current mirror circuit achieves reduced chip size by using the zener diode instead of the resistor.Type: ApplicationFiled: October 31, 2006Publication date: May 10, 2007Applicant: DENSO CORPORATIONInventors: Satoshi Sobue, Hiroyuki Ban, Shigenori Mori
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Publication number: 20060289461Abstract: An overheat-sensing circuit includes a temperature-sensing circuit for outputting a temperature-sensing voltage, a reference voltage generation circuit for outputting a reference voltage, and a comparison circuit that compares the temperature-sensing voltage with the reference voltage and outputs an overheat-sensing signal based on a result of the comparison. The reference voltage generation circuit outputs the reference voltage in accordance with a power supply voltage when the power supply voltage is within a predetermined voltage range. In contrast, the reference voltage generation circuit generates a limited voltage based on the power supply voltage and outputs the reference voltage in accordance with the limited voltage when the power supply voltage is outside the predetermined voltage range. This approach reduces a variation in an overheat-sensing temperature at which the comparison circuit outputs the overheat-sensing signal.Type: ApplicationFiled: June 15, 2006Publication date: December 28, 2006Applicant: DENSO CORPORATIONInventors: Akio Kojima, Hiroyuki Ban
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Patent number: 7106031Abstract: In a power supply apparatus, a switching circuit selectively applies one of an input voltage of a power converting circuit and an output voltage of the power converting circuit to a voltage reducing power supply circuit. When the input voltage is applied to the power converting circuit, the switching circuit selects this input voltage, so that the output voltage of the voltage reducing power supply circuit can quickly rise. Thereafter, when the output voltage of the power converting circuit exceeds this output voltage, the switching circuit selects the output voltage of the power converting circuit. As a result, a difference between the input voltage and the output voltage of the voltage reducing power supply circuit is decreased. Thus, a power loss is lowered and noise produced in the power converting circuit is suppressed.Type: GrantFiled: February 10, 2005Date of Patent: September 12, 2006Assignee: Denso CorporationInventors: Junji Hayakawa, Hiroyuki Ban, Jyunichi Nagata
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Patent number: 7049879Abstract: In a power supply circuit, a main transistor, which transmits power from an input terminal to an output terminal, is controlled so that a detected voltage from an input voltage is consistent with a reference voltage indicating a target voltage. An output current is detected and a limited value of the output current is set so that the limited value increases gradually when the output voltage rises up to the target voltage. The main transistor is controlled so that the output current keeps a value less than or equal to the limited value. This configuration is able to suppress an overshoot of the output voltage, thanks to a gradually raised control of the limited value. Additionally, to avoid the influence of a ringing component of the input voltage, a delay control circuit to give a delay to the start of rise of the output voltage can be provided.Type: GrantFiled: July 11, 2003Date of Patent: May 23, 2006Assignee: Denso CorporationInventors: Nobuyoshi Osamura, Takaharu Hutamura, Hiroyuki Ban
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Publication number: 20060027900Abstract: A semiconductor device is composed of a heat sink, an IC chip mounted and fixed on a specific face of the heat sink, a lead frame electrically connected to the IC chip and a sealing mold resin package. One or more of the faces of the heat sink has a specific surface area.Type: ApplicationFiled: August 4, 2005Publication date: February 9, 2006Inventors: Katsuhito Takeuchi, Naohito Mizuno, Shinichi Hirose, Hiroyuki Ban
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Patent number: 6982496Abstract: A semiconductor device includes a substrate, a plurality of bump electrodes disposed on the substrate, and a support area for supporting the substrate in case of carrying the substrate. The support area is disposed on a surface of the substrate, on which the bump electrode is disposed, and is disposed at a predetermined position, which is dotted on the surface of the substrate. In this device, the support area is sufficiently small, and the number of the bump electrodes can increase. Moreover, degree of freedom in a configuration of the support area increases.Type: GrantFiled: April 30, 2003Date of Patent: January 3, 2006Assignee: Denso CorporationInventors: Hirofumi Abe, Hiroyuki Ban
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Patent number: 6972973Abstract: In a voltage booster, a voltage detection circuit detects a battery voltage as an input voltage. If the input voltage is lower than a threshold level, an oscillation circuit outputs a gate signal having a relatively high frequency to increase the driving performance of a driving circuit. If the input voltage is higher than the threshold level, the frequency of the gate signal is lowered so as to prevent the driving performance of the driving circuit from rising to an excessively high value. As a result, a predetermined boosted voltage can be obtained regardless of variations in input voltage without using a filter for eliminating noise.Type: GrantFiled: November 20, 2003Date of Patent: December 6, 2005Assignee: Denso CorporationInventors: Hirofumi Abe, Hirokazu Itakura, Hiroyuki Ban, Shoichi Okuda, Kingo Ota
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Publication number: 20050206323Abstract: In a power supply apparatus, a switching circuit selectively applies one of an input voltage of a power converting circuit and an output voltage of the power converting circuit to a voltage reducing power supply circuit. When the input voltage is applied to the power converting circuit, the switching circuit selects this input voltage, so that the output voltage of the voltage reducing power supply circuit can quickly rise. Thereafter, when the output voltage of the power converting circuit exceeds this output voltage, the switching circuit selects the output voltage of the power converting circuit. As a result, a difference between the input voltage and the output voltage of the voltage reducing power supply circuit is decreased. Thus, a power loss is lowered and noise produced in the power converting circuit is suppressed.Type: ApplicationFiled: February 10, 2005Publication date: September 22, 2005Inventors: Junji Hayakawa, Hiroyuki Ban, Jyunichi Nagata
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Patent number: 6922105Abstract: In an operational amplifier, a differential amplifying circuit is configured to amplify an input voltage inputted from the input terminal. An outputting transistor is connected to the output terminal. A driving transistor is connected to the differential amplifying circuit and the outputting transistor. The driving transistor turns on according to a control signal supplied from the differential amplifying circuit to the driving circuit. The driving transistor is also configured to drive the outputting transistor according to the control signal. A control signal reducing circuit, when a voltage is applied on the driving transistor through the outputting transistor, is configured to reduce the control signal within a range that the driving transistor is kept to on state. The voltage applied on the driving transistor exceeds a predetermined threshold voltage.Type: GrantFiled: August 4, 2003Date of Patent: July 26, 2005Assignee: Denso CorporationInventors: Hiroshi Imai, Mitsuru Aoki, Hiroyuki Ban
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Patent number: 6831331Abstract: A semiconductor device is provided having a power transistor structure. The power transistor structure includes a plurality of first wells disposed independently at a surface portion of a semiconductor layer; a deep region having a portion disposed in the semiconductor layer between the first wells; a drain electrode connected to respective drain regions in the first wells; a source electrode connected to respective source regions and channel well regions in the first wells, such that either the drain electrode or the source electrode is connected to an inductive load; and a connecting member for supplying the deep region with a source potential, where the connecting member is configurable to connect to the drain electrode when the drain electrode is connected to the inductive load and to connect to the source electrode when the source electrode is connected to said inductive load.Type: GrantFiled: September 5, 2001Date of Patent: December 14, 2004Assignee: DENSO CorporationInventors: Yasuhiro Kitamura, Toshio Sakakibara, Kenji Kohno, Shoji Mizuno, Yoshiaki Nakayama, Hiroshi Maeda, Makio Iida, Hiroshi Fujimoto, Mitsuhiro Saitou, Hiroshi Imai, Hiroyuki Ban