Abstract: A disk storage system has a control unit having a plurality of external ports connectable to a mirrored disk including two disks to which write data is written. When the control unit receives two read requests issued from a processor to the disk unit group, a first read operation is performed to read data requested by the first read request from one of the disks and a second read operation is performed to read data requested by the second read request from the other one of the disks. Also, a first transferring operation is performed to transfer data read by the first read operation to one external port of the control unit and a second transferring operation is performed to transfer data read by the second read operation to another external port of the control unit. Further, the data read by the two read operations is transferred to the processor via the external ports.

Abstract: According to one aspect of the present invention, a booster circuit comprises a charge pump, a voltage supply section reducing a power supply voltage and supplying a voltage to the charge pump through an output metal-oxide-semiconductor (MOS) transistor of an operational amplifier and a drive MOS transistor maximizing a drive capacity of the output MOS transistor of the operational amplifier.

Abstract: When receiving a write request from a processor, a control unit checks the condition of existence (or the presence/absence) in a cache for information necessary for generation of an updated value of a parity record, receives write data and reports the completion of the write request to the processor. In asynchronism with the write request from the processor, the control unit performs a load process for that information among the information necessary for generation of the updated value of the parity record which may be prepared in asynchronism with the write request from the processor and a write after process for the updated value of the parity record.

Abstract: When receiving a write request from a processor, a control unit checks the condition of existence (or the presence/absence) in a cache for information necessary for generation of an updated value of a parity record, receives write data and reports the completion of the write request to the processor. In asynchronism with the write request from the processor, the control unit performs a load process for that information among the information necessary for generation of the updated value of the parity record which may be prepared in asynchronism with the write request from the processor and a write after process for the updated value of the parity record.

Abstract: A storage system stores multiple copies of data on physical storage implemented, for example, with multiple disk units. Input/output read requests are received from host systems and distributed in a manner that allows parallel read operations to be conducted over the multiple disk units of the physical storage.

Abstract: When receiving a write request from a processor, a control unit checks the condition of existence (or the presence/absence) in a cache for information necessary for generation of an updated value of a parity record, receives write data and reports the completion of the write request to the processor. In asynchronism with the write request from the processor, the control unit performs a load process for that information among the information necessary for generation of the updated value of the parity record which may be prepared in asynchronism with the write request from the processor and a write after process for the updated value of the parity record.

Abstract: A method of respectively reading and writing data to and from a plurality of physical disk units in response to I/O requests from a host computing system includes establishing a logical disk group having a number of logical disk elements, mapping each of the logical disk elements to corresponding physical disk units, receiving from the host computing system an I/O request for data to select a one of the number of logical disk elements, accessing the physical disk unit corresponding to the selected one logical disk to access for the data, and transferring the accessed data to the host computing system.

Abstract: When receiving a write request from a processor, a control unit checks the condition of existence (or the presence/absence) in a cache for information necessary for generation of an updated value of a parity record, receives write data and reports the completion of the write request to the processor. In asynchronism with the write request from the processor, the control unit performs a load process for that information among the information necessary for generation of the updated value of the parity record which may be prepared in asynchronism with the write request from the processor and a write after process for the updated value of the parity record.

Abstract: In an information processing system having a data processing apparatus, a control unit for a cache memory, and a storage unit for storing a record, respectively interconnected together, wherein when the control unit receives from the data processing apparatus a write request for a record to be written and if the record to be written is not being stored in the cache memory, the control unit receives a data to be written in the object record from the data processing apparatus and stores the received data in the cache memory. After notifying the data processing apparatus of a completion of a data write process, the control unit checks if the object record in which the data stored in the cache memory is being stored in the storage unit, if the object record is being stored in the storage unit, the data in the cache memory is written in the storage unit, and if not, the data in the cache memory is not written and such effect is notified to the data processing apparatus.

Abstract: The control unit arbitrarily with respect to the CPU, including according to an algorithm that is independent of the request a disk unit among the disk units that are inactive when the control unit receives an input/output request involving either read or staging. For a write request from the CPU, the control unit selects a specific disk unit in the disk unit group for the immediate writing of data. In the second kind of load distribution a disk unit is selected to execute read and staging other than the above-mentioned specific disk.

Abstract: A disk storage system has a control unit having a plurality of external ports connectable to a mirrored disk including two disks to which write data is written. When the control unit receives two read requests issued from a processor to the disk unit group, a first read operation is performed to read data requested by the first read request from one of the disks and a second read operation is performed to read data requested by the second read request from the other one of the disks. Also, a first transferring operation is performed to transfer data read by the first read operation to one external port of the control unit and a second transferring operation is performed to transfer data read by the second read operation to another external port of the control unit. Further, the data read by the two read operations is transferred to the processor via the external ports.

Abstract: When receiving a write request from a processor, a control unit checks the condition of existence (or the presence/absence) in a cache for information necessary for generation of an updated value of a parity record, receives write data and reports the completion of the write request to the processor. In asynchronism with the write request from the processor, the control unit performs a load process for that information among the information necessary for generation of the updated value of the parity record which may be prepared in asynchronism with the write request from the processor and a write after process for the updated value of the parity record.

Abstract: When receiving a write request from a processor, a control unit checks the condition of existence (or the presence/absence) in a cache for information necessary for generation of an updated value of a parity record, receives write data and reports the completion of the write request to the processor. In asynchronism with the write request from the processor, the control unit performs a load process for that information among the information necessary for generation of the updated value of the parity record which may be prepared in asynchronism with the write request from the processor and a write after process for the updated value of the parity record.

Abstract: A semiconductor integrated circuit device with a high switching speed of an internal power source voltage supplied via an operational amplifier, when said internal power source voltage is output from a switching circuit, is provided. As input signal Vin goes from “L” level to “H” level, MOSFET 21 in switching circuit 20 turns on. At this point, upon the rising edge of input signal Vin to the “H” level, a one shot pulse is supplied to the gate of MOSFET 31 from one-shot-pulse generating circuit 32, and MOSFET 31 turns on. As MOSFET 31 turns on, electric potential at the gate of MOSFET 14, which is included in operational amplifier 13, becomes “L” level, MOSFET 14 turns on completely flowing electric current quickly from external power source voltage Vcc to a capacitive load via MOSFET 14 and MOSFET 21, and output voltage Vout of switching circuit 20 climb up with a steeply-rising waveform.

Abstract: A semiconductor integrated circuit device with a high switching speed of an internal power source voltage supplied via an operational amplifier, when said internal power source voltage is output from a switching circuit, is provided. As input signal Vin goes from “L” level to “H” level, MOSFET 21 in switching circuit 20 turns on. At this point, upon the rising edge of input signal Vin to the “H” level, a one shot pulse is supplied to the gate of MOSFET 31 from one-shot-pulse generating circuit 32, and MOSFET 31 turns on. As MOSFET 31 turns on, electric potential at the gate of MOSFET 14, which is included in operational amplifier 13, becomes “L” level, MOSFET 14 turns on completely flowing electric current quickly from external power source voltage Vcc to a capacitive load via MOSFET 14 and MOSFET 21, and output voltage Vout of switching circuit 20 climb up with a steeply-rising waveform.

Abstract: When receiving a write request from a processor, a control unit checks the condition of existence (or the presence/absence) in a cache for information necessary for generation of an updated value of a parity record, receives write data and reports the completion of the write request to the processor. In asynchronism with the write request from the processor, the control unit performs a load process for that information among the information necessary for generation of the updated value of the parity record which may be prepared in asynchronism with the write request from the processor and a write after process for the updated value of the parity record.

Abstract: When receiving a write request from a processor, a control unit checks the condition of existence (or the presence/absence) in a cache for information necessary for generation of an updated value of a parity record, receives write data and reports the completion of the write request to the processor. In asynchronism with the write request from the processor, the control unit performs a load process for that information among the information necessary for generation of the updated value of the parity record which may be prepared in asynchronism with the write request from the processor and a write after process for the updated value of the parity record.

Abstract: A storage system stores multiple copies of data on physical storage implemented, for example, with multiple disk units. Input/output read requests are received from host systems and distributed in a manner that allows parallel read operations to be conducted over the multiple disk units of the physical storage.

Abstract: In allocating an area of a cache memory to each storage unit, proper allocation of the cache memory is made to each storage unit. If the amount of write-after data becomes equal to or more than a threshold value, an allocation limit is set to each disk unit. If CPU issues a data write request requiring the amount of data equal to or more than the allocation limit, the data write request is held in a wait state until the amount of write-after data becomes less than the allocation limit. Therefore, the allocation amount to the disk unit becomes neither too large nor too small. In this manner, proper allocation of the cache memory to each disk unit can be realized.

Abstract: When receiving a write request from a processor, a control unit checks the condition of existence (or the presence/absence) in a cache for information necessary for generation of an updated value of a parity record, receives write data and reports the completion of the write request to the processor. In asynchronism with the write request from the processor, the control unit performs a load process for that information among the information necessary for generation of the updated value of the parity record which may be prepared in asynchronism with the write request from the processor and a write after process for the updated value of the parity record.