Patents by Inventor Hiroyuki Miyake

Hiroyuki Miyake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11828613
    Abstract: Provided is a superimposed-image display device configured such that when there is a guidance divergence point, which is a guidance target, ahead in a traveling direction of a vehicle, a plurality of guidance objects that provide guidance on an entry route that enters the guidance divergence point and an exit route are displayed. When a course including the entry route, the guidance divergence point, and the exit route is displayed using a plurality of guidance objects, the plurality of guidance objects are displayed so as to match the elevation of the line of sight of an occupant and displayed so as to be shifted to locations that are on the opposite side to an exit direction at the guidance divergence point relative to the front of the vehicle.
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: November 28, 2023
    Assignee: AISIN CORPORATION
    Inventors: Hiroyuki Miyake, Kenji Watanabe, Takashi Kawai
  • Publication number: 20230376076
    Abstract: To increase the detection sensitivity of a touch panel, provide a thin touch panel, provide a foldable touch panel, or provide a lightweight touch panel. A display element and a capacitor forming a touch sensor are provided between a pair of substrates. Preferably, a pair of conductive layers forming the capacitor each have an opening. The opening and the display element are provided to overlap each other. A light-blocking layer is provided between a substrate on the display surface side and the pair of conductive layers forming the capacitor.
    Type: Application
    Filed: April 19, 2023
    Publication date: November 23, 2023
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Koji KUSUNOKI, Hiroyuki MIYAKE, Kazunori WATANABE
  • Publication number: 20230378188
    Abstract: An object is to prevent an operation defect and to reduce an influence of fluctuation in threshold voltage of a field-effect transistor. A field-effect transistor, a switch, and a capacitor are provided. The field-effect transistor includes a first gate and a second gate which overlap with each other with a channel formation region therebetween, and the threshold voltage of the field-effect transistor varies depending on the potential of the second gate. The switch has a function of determining whether electrical connection between one of a source and a drain of the field-effect transistor and the second gate of the field-effect transistor is established. The capacitor has a function of holding a voltage between the second gate of the field-effect transistor and the other of the source and the drain of the field-effect transistor.
    Type: Application
    Filed: April 17, 2023
    Publication date: November 23, 2023
    Inventor: Hiroyuki MIYAKE
  • Publication number: 20230361128
    Abstract: An oxide semiconductor layer which is intrinsic or substantially intrinsic and includes a crystalline region in a surface portion of the oxide semiconductor layer is used for the transistors. An intrinsic or substantially intrinsic semiconductor from which an impurity which is to be an electron donor (donor) is removed from an oxide semiconductor and which has a larger energy gap than a silicon semiconductor is used. Electrical characteristics of the transistors can be controlled by controlling the potential of a pair of conductive films which are provided on opposite sides from each other with respect to the oxide semiconductor layer, each with an insulating film arranged therebetween, so that the position of a channel formed in the oxide semiconductor layer is determined.
    Type: Application
    Filed: July 21, 2023
    Publication date: November 9, 2023
    Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Hiroyuki MIYAKE
  • Patent number: 11796866
    Abstract: A display device in which parasitic capacitance between wirings can be reduced is provided. Furthermore, a display device in which display quality is improved is provided. Furthermore, a display device in which power consumption can be reduced is provided. The display device includes a signal line, a scan line, a first electrode, a second electrode, a third electrode, a first pixel electrode, a second pixel electrode, and a semiconductor film.
    Type: Grant
    Filed: September 21, 2022
    Date of Patent: October 24, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroyuki Miyake, Makoto Kaneyasu
  • Publication number: 20230335561
    Abstract: An object of an embodiment of the present invention is to manufacture a semiconductor device with high display quality and high reliability, which includes a pixel portion and a driver circuit portion capable of high-speed operation over one substrate, using transistors having favorable electric characteristics and high reliability as switching elements. Two kinds of transistors, in each of which an oxide semiconductor layer including a crystalline region on one surface side is used as an active layer, are formed in a driver circuit portion and a pixel portion. Electric characteristics of the transistors can be selected by choosing the position of the gate electrode layer which determines the position of the channel. Thus, a semiconductor device including a driver circuit portion capable of high-speed operation and a pixel portion over one substrate can be manufactured.
    Type: Application
    Filed: June 8, 2023
    Publication date: October 19, 2023
    Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Hiroyuki MIYAKE
  • Publication number: 20230325017
    Abstract: Sensing time of a touch sensor is shortened to increase responsiveness of touch sensing. A display device includes a gate driver, a plurality of touch sensors, and a plurality of touch wirings. The gate driver has a function of supplying a scan signal to the plurality of touch wirings at the same timing, and the touch sensors in different positions sense a plurality of touches at the same timing. In this manner, the responsiveness of touch sensing is increased. The gate driver has a function of controlling a scan signal for refreshing display and a scan signal used by the touch sensor for sensing.
    Type: Application
    Filed: March 16, 2023
    Publication date: October 12, 2023
    Inventors: Hiroyuki MIYAKE, Takahiro FUKUTOME
  • Patent number: 11785826
    Abstract: A flexible touch panel is provided. Both reduction in thickness and high sensitivity of a touch panel are achieved. The touch panel includes a first flexible substrate, a first insulating layer over the first substrate, a transistor and a light-emitting element over the first insulating layer, a color filter over the light-emitting element, a pair of sensor electrodes over the color filter, a second insulating layer over the sensor electrodes, a second flexible substrate over the second insulating layer, and a protective layer over the second substrate. A first bonding layer is between the light-emitting element and the color filter. The thickness of the first substrate and the second substrate is each 1 ?m to 200 ?m inclusive. The first bonding layer includes a region with a thickness of 50 nm to 10 ?m inclusive.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: October 10, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yoshiharu Hirakata, Hiroyuki Miyake
  • Patent number: 11776968
    Abstract: An object of an embodiment of the present invention is to manufacture a semiconductor device with high display quality and high reliability, which includes a pixel portion and a driver circuit portion capable of high-speed operation over one substrate, using transistors having favorable electric characteristics and high reliability as switching elements. Two kinds of transistors, in each of which an oxide semiconductor layer including a crystalline region on one surface side is used as an active layer, are formed in a driver circuit portion and a pixel portion. Electric characteristics of the transistors can be selected by choosing the position of the gate electrode layer which determines the position of the channel. Thus, a semiconductor device including a driver circuit portion capable of high-speed operation and a pixel portion over one substrate can be manufactured.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: October 3, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Hiroyuki Miyake
  • Patent number: 11777108
    Abstract: A decrease in the capacity of a power storage device is inhibited by adjusting or reducing imbalance in the amount of inserted and extracted carrier ions between positive and negative electrodes, which is caused by decomposition of an electrolyte solution of the negative electrode. Further, the capacity of the power storage device can be restored. Furthermore, impurities in the electrolyte solution can be decomposed with the use of the third electrode. A power storage device including positive and negative electrodes, an electrolyte, and a third electrode is provided. The third electrode has an adequate electrostatic capacitance. The third electrode can include a material with a large surface area. In addition, a method for charging the power storage device including the steps of performing charging by applying a current between the positive and negative electrodes, and performing additional applying a current between the third electrode and the negative electrode is provided.
    Type: Grant
    Filed: January 4, 2021
    Date of Patent: October 3, 2023
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Junpei Momo, Hiroyuki Miyake, Kei Takahashi
  • Publication number: 20230307464
    Abstract: A semiconductor device includes first and second transistors having the same conductivity type and a circuit. One of a source and a drain of the first transistor is electrically connected to that of the second transistor. First and third potentials are supplied to the circuit through respective wirings. A second potential and a first clock signal are supplied to the others of the sources and the drains of the first and second transistors, respectively. A second clock signal is supplied to the circuit. The third potential is higher than the second potential which is higher than the first potential. A fourth potential is equal to or higher than the third potential. The first clock signal alternates the second and fourth potentials and the second clock signal alternates the first and third potentials. The circuit controls electrical connections between gates of the first and second transistors and the wirings.
    Type: Application
    Filed: May 16, 2023
    Publication date: September 28, 2023
    Inventors: Kouhei TOYOTAKA, Jun KOYAMA, Hiroyuki MIYAKE
  • Publication number: 20230288758
    Abstract: A display device with less light leakage and excellent contrast is provided. A display device having a high aperture ratio and including a large-capacitance capacitor is provided. A display device in which wiring delay due to parasitic capacitance is reduced is provided. A display device includes a transistor over a substrate, a pixel electrode connected to the transistor, a signal line electrically connected to the transistor, a scan line electrically connected to the transistor and intersecting with the signal line, and a common electrode overlapping with the pixel electrode and the signal line with an insulating film provided therebetween. The common electrode includes stripe regions extending in a direction intersecting with the signal line.
    Type: Application
    Filed: May 2, 2023
    Publication date: September 14, 2023
    Inventors: Ryo HATSUMI, Daisuke KUBOTA, Hiroyuki MIYAKE
  • Publication number: 20230282649
    Abstract: A display device including a display portion with an extremely high resolution is provided. The display device includes a pixel circuit and a light-emitting element. The pixel circuit includes a first element layer including a first transistor and a second element layer including a second transistor. A channel formation region of the first transistor includes silicon. The first transistor has a function of driving the light-emitting element. The second transistor functions as a switch. A channel formation region of the second transistor includes a metal oxide. The metal oxide functions as a semiconductor. The second element layer is provided over the first element layer.
    Type: Application
    Filed: May 11, 2023
    Publication date: September 7, 2023
    Applicant: Semiconductor Energy Laboratory Co., Ltd
    Inventors: Kei Takahashi, Hiroyuki Miyake
  • Patent number: 11747938
    Abstract: A touch panel with higher sensing accuracy or higher detection sensitivity is provided. The touch panel includes a first conductive layer, a second conductive layer, a plurality of display elements, and a scan line. In a plan view, the first conductive layer has an outline including a first portion that is linear and parallel to a first direction. In the plan view, the second conductive layer has an outline including a second portion that is linear and parallel to the first direction. The first portion and the second portion face each other. The display element is in a position not overlapping with the first conductive layer nor the second conductive layer. The scan line has a portion extending in a second direction. An angle between the first direction and the second direction is greater than or equal to 30° and less than or equal to 60°.
    Type: Grant
    Filed: April 29, 2020
    Date of Patent: September 5, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hiroyuki Miyake
  • Patent number: 11749365
    Abstract: A semiconductor device in which a decrease in the yield by electrostatic destruction can be prevented is provided. A scan line driver circuit for supplying a signal for selecting a plurality of pixels to a scan line includes a shift register for generating the signal. One conductive film functioning as respective gate electrodes of a plurality of transistors in the shift register is divided into a plurality of conductive films. The divided conductive films are electrically connected to each other by a conductive film which is formed in a layer different from the divided conductive films are formed. The plurality of transistors includes a transistor on an output side of the shift register.
    Type: Grant
    Filed: September 21, 2021
    Date of Patent: September 5, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masayuki Sakakura, Yuugo Goto, Hiroyuki Miyake, Daisuke Kurosaki
  • Patent number: 11741895
    Abstract: A light-emitting device in which variation in luminance of pixels is suppressed. A light-emitting device includes at least a transistor, a first wiring, a second wiring, a first switch, a second switch, a third switch, a fourth switch, a capacitor, and a light-emitting element. The first wiring and a first electrode of the capacitor are electrically connected to each other through the first switch. A second electrode of the capacitor is connected to a first terminal of the transistor. The second wiring and a gate of the transistor are electrically connected to each other through the second switch. The first electrode of the capacitor and the gate of the transistor are electrically connected to each other through the third switch. The first terminal of the transistor and an anode of the light-emitting element are electrically connected to each other through the fourth switch.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: August 29, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Seiko Inoue, Hiroyuki Miyake
  • Patent number: 11735596
    Abstract: An object of an embodiment of the present invention is to manufacture a semiconductor device with high display quality and high reliability, which includes a pixel portion and a driver circuit portion capable of high-speed operation over one substrate, using transistors having favorable electric characteristics and high reliability as switching elements. Two kinds of transistors, in each of which an oxide semiconductor layer including a crystalline region on one surface side is used as an active layer, are formed in a driver circuit portion and a pixel portion. Electric characteristics of the transistors can be selected by choosing the position of the gate electrode layer which determines the position of the channel. Thus, a semiconductor device including a driver circuit portion capable of high-speed operation and a pixel portion over one substrate can be manufactured.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: August 22, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Hiroyuki Miyake
  • Publication number: 20230261010
    Abstract: To provide a light-emitting device in which variation in luminance among pixels caused by variation in threshold voltage of transistors can be suppressed. The light-emitting device includes a transistor including a first gate and a second gate overlapping with each other with a semiconductor film therebetween, a first capacitor maintaining a potential difference between one of a source and a drain of the transistor and the first gate, a second capacitor maintaining a potential difference between one of the source and the drain of the transistor and the second gate, a switch controlling conduction between the second gate of the transistor and a wiring, and a light-emitting element to which drain current of the transistor is supplied.
    Type: Application
    Filed: April 25, 2023
    Publication date: August 17, 2023
    Inventor: Hiroyuki MIYAKE
  • Publication number: 20230252952
    Abstract: A scan line to which a selection signal or a non-selection signal is input from its end, and a transistor in which a clock signal is input to a gate, the non-selection signal input to a source, and a drain is connected to the scan line are provided. A signal input to the end of the scan line is switched from the selection signal to the non-selection signal at the same or substantially the same time as the transistor is turned on. The non-selection signal is input not only from one end but also from both ends of the scan line. This makes it possible to inhibit the potentials of portions in the scan line from being changed at different times.
    Type: Application
    Filed: April 20, 2023
    Publication date: August 10, 2023
    Inventor: Hiroyuki MIYAKE
  • Publication number: 20230255089
    Abstract: To provide a display device that is suitable for increasing in size, a display device in which display unevenness is suppressed, or a display device that can display an image along a curved surface. The display device includes a first display panel and a second display panel each including a pair of substrates. The first display panel and the second display panel each include a first region which can transmit visible light, a second region which can block visible light, and a third region which can perform display. The third region of the first display panel and the first region of the second display panel overlap each other. The third region of the first display panel and the second region of the second display panel do not overlap each other.
    Type: Application
    Filed: April 19, 2023
    Publication date: August 10, 2023
    Inventors: Hiroyuki MIYAKE, Hisao IKEDA