Abstract: A method of fabricating a semiconductor device is disclosed that is able to suppress a short channel effect and improve carrier mobility. In the method, trenches are formed in a silicon substrate corresponding to a source region and a drain region. When epitaxially growing p-type semiconductor mixed crystal layers to fill up the trenches, the surfaces of the trenches are demarcated by facets, and extended portions of the semiconductor mixed crystal layers are formed between bottom surfaces of second side wall insulating films and a surface of the silicon substrate, and extended portion are in contact with a source extension region and a drain extension region.

Abstract: A semiconductor device includes an NMOS transistor and a PMOS transistor. The NMOS transistor includes a channel area formed in a silicon substrate, a gate electrode formed on a gate insulating film in correspondence with the channel area, and a source area and a drain area formed in the silicon substrate having the channel area situated therebetween. The PMOS transistor includes another channel area formed in the silicon substrate, another gate electrode formed on another gate insulating film in correspondence with the other channel area, and another source area and another drain area formed in the silicon substrate having the other channel area situated therebetween. The gate electrode has first sidewall insulating films. The other gate electrode has second sidewall insulating films. The distance between the second sidewall insulating films and the silicon substrate is greater than the distance between the first sidewall insulating films and the silicon substrate.

Abstract: A strain measuring device includes a bridge circuit comprising a p-type impurity diffused resistor as a strain detecting portion and a bridge circuit comprising an n-type impurity diffused resistor as a strain detecting portion in a semiconductor single crystalline substrate, Sheet resistance of the p-type impurity diffused resistor is 1.67 to 5 times higher than that of the n-type impurity diffused resistor. Furthermore, the impurity diffused resistor is configured to be a meander shape including strip lines and connecting portions.

Abstract: A recess along a sidewall is formed in a pMOS region and an nMOS region. An SiC layer of which thickness is thicker than a depth of the recess is formed in the recess. A sidewall covering a part of the SiC layer is formed at both lateral sides of a gate electrode in the pMOS region. A recess is formed by selectively removing the SiC layer in the pMOS region. A side surface of the recess at the gate insulating film side is inclined so that the upper region of the side surface, the closer to the gate insulating film in a lateral direction at a region lower than the surface of the silicon substrate. An SiGe layer is formed in the recess in the pMOS region.

Abstract: In a semiconductor device having a Low-k film as an interlayer insulator, peeling of the interlayer insulator in a thermal cycle test is prevented, thereby providing a highly reliable semiconductor device. In a semiconductor device having a structure in which interlayer insulators in which buried wires each having a main electric conductive layer made of copper are formed and cap insulators of the buried wires are stacked, the cap insulator having a relatively high Young's modulus and contacting by its upper surface with the interlayer insulator made of a Low-k film having a relatively low Young's modulus is formed so as not to be provided in an edge portion of the semiconductor device.

Abstract: A semiconductor device includes an NMOS transistor and a PMOS transistor. The NMOS transistor includes a channel area formed in a silicon substrate, a gate electrode formed on a gate insulating film in correspondence with the channel area, and a source area and a drain area formed in the silicon substrate having the channel area situated therebetween. The PMOS transistor includes another channel area formed in the silicon substrate, another gate electrode formed on another gate insulating film in correspondence with the other channel area, and another source area and another drain area formed in the silicon substrate having the other channel area situated therebetween. The gate electrode has first sidewall insulating films. The other gate electrode has second sidewall insulating films. The distance between the second sidewall insulating films and the silicon substrate is greater than the distance between the first sidewall insulating films and the silicon substrate.

Abstract: A method of fabricating a semiconductor device is disclosed that is able to suppress a short channel effect and improve carrier mobility. In the method, trenches are formed in a silicon substrate corresponding to a source region and a drain region. When epitaxially growing p-type semiconductor mixed crystal layers to fill up the trenches, the surfaces of the trenches are demarcated by facets, and extended portions of the semiconductor mixed crystal layers are formed between bottom surfaces of second side wall insulating films and a surface of the silicon substrate, and extended portion are in contact with a source extension region and a drain extension region.

Abstract: A strain measuring device according to the present invention includes a bridged circuit comprising a p-type impurity diffused resistor as a strain detective portion and a bridged circuit comprising an n-type impurity diffused resistor as a strain detective portion in a semiconductor single crystalline substrate, and sheet resistance of the p-type impurity diffused resistor is 1.67 to 5 times higher than that of the n-type impurity diffused resistor. Furthermore, it is preferable that the impurity diffused resistor be configured to be a meander shape comprising strip lines and connecting portions. Moreover, it is preferable that the number of strip lines in the p-type impurity diffused resistor be smaller than that in the n-type impurity diffused resistor.

Abstract: A method of fabricating a semiconductor device is disclosed that is able to suppress a short channel effect and improve carrier mobility. In the method, trenches are formed in a silicon substrate corresponding to a source region and a drain region. When epitaxially growing p-type semiconductor mixed crystal layers to fill up the trenches, the surfaces of the trenches are demarcated by facets, and extended portions of the semiconductor mixed crystal layers are formed between bottom surfaces of second side wall insulating films and a surface of the silicon substrate, and extended portion are in contact with a source extension region and a drain extension region.

Abstract: In a solidification sensor for measuring a solidification state of a liquid with a high degree of accuracy in real time, and for making the sensor small-sized with a reduced power consumption, the solidification sensor comprises a liquid absorbing portion formed of a liquid absorbable material, a substrate coupled to the liquid absorbing portion and a strain sensor for measuring strain exerted to the substrate due to a volumetric change upon solidification of a liquid absorbed in the liquid absorbing portion.

Abstract: A semiconductor device comprises a field-effect transistor arranged in a semiconductor substrate, which transistor has a gate electrode, source/drain impurity diffusion regions, and carbon layers surrounding the source/drain impurity diffusion regions. Each of the carbon layers is provided at an associated of the source/drain impurity diffusion regions and positioned so as to be offset from the front edge of a source/drain extension in direction away from the gate electrode and to surround as profile the associated source/drain impurity diffusion region.

Abstract: A semiconductor device including an n-channel MISFET including source/drain regions 38 formed in a semiconductor substrate 10 with a channel region between them, and a gate electrode 44 of a metal silicide formed over the channel region with a gate insulating film 12 interposed therebetween; and an insulating film 46 formed over the gate electrode 44 from side walls of the gate electrode 44 to an upper surface of the gate electrode 44, having a tensile stress from 1.0 to 2.0 GPa and applying the tensile stress to the channel region.

Abstract: The invention provides a load sensor which is driven by a low electric power consumption, can measure at a high precision, and has a high reliability without being broken. The load sensor is structured such that a detection rod for detecting a strain is provided in an inner portion of a hole formed near a center of a pin via a shock relaxation material and a semiconductor strain sensor is provided in the detection rod, in a load sensor detecting a load applied to the pin from a strain generated in an inner portion of the pin.

Abstract: A mechanical quantity measuring apparatus is provided which can make highly precise measurements and is not easily affected by noise even when it is supplied an electricity through electromagnetic induction or microwaves. At least a strain sensor and an amplifier, an analog/digital converter, a rectification/detection/modulation-demodulation circuit, and a communication control circuit are formed in one and the same silicon substrate. Or, the silicon substrate is also formed at its surface with a dummy resistor which has its longitudinal direction set in a particular crystal orientation and which, together with the strain sensor, forms a Wheatstone bridge. With this arrangement, even when a current flowing through the sensor is reduced, measured data is prevented from being buried in noise, allowing the sensor to operate on a small power and to measure a mechanical quantity with high precision even when it is supplied electricity through electromagnetic induction or microwaves.

Abstract: A single crystal semiconductor including a Wheatstone bridge circuit formed of an impurity diffusion layer whose longitudinal direction is aligned with a particular crystal orientation is connected to a rotating body. A rotating body dynamic quantity measuring device and a system using the measuring device are fatigue- and corrosion-resistant because of the single crystal semiconductor used and are not easily affected by temperature variations because of the bridge circuit considering a single crystal anisotropy.

Abstract: The method of manufacturing a semiconductor device has the steps of: etching a semiconductor substrate to form an isolation trench by using as a mask a pattern including a first silicon nitride film and having a window; depositing a second silicon nitride film covering an inner surface of the isolation trench; forming a first silicon oxide film burying the isolation trench; etching and removing the first silicon oxide film in an upper region of the isolation trench; etching and removing the exposed second silicon nitride film; chemical-mechanical-polishing the second silicon oxide film; and etching and removing the exposed first silicon nitride film.

Abstract: An apparatus structure and measurement method are provided to retain high precision and high reliability of a semiconductor mechanical quantity measuring apparatus which senses a mechanical quantity and transmits measured information wirelessly. As to a silicon substrate of the semiconductor mechanical quantity measuring apparatus, for example, a ratio of a substrate thickness to a substrate length along a measurement direction is set small, and a ratio of a substrate thickness to a substrate length along a direction perpendicular to the measurement direction is set small. The apparatus upper surface is covered with a protective member. It is possible to measure a strain along a particular direction and realize mechanical quantity measurement with less error and high precision. An impact resistance and environment resistance of the apparatus itself can be improved.

Abstract: Generation of dislocation and increase of diffusion resistance at edge portions of source/drain regions in a CMIS are prevented. When source/drain regions in a CMIS are formed, argon is implanted to a P-well layer as a dislocation-suppressing element and nitrogen is implanted to an N-well layer as a dislocation-suppressing element before an ion implantation of impurities to a silicon substrate. In this manner, by separately implanting dislocation-suppressing elements suitable for each of the P-well layer and the N-well layer as well as suppressing the generation of dislocation, increase of diffusion resistance can be suppressed, yield can be improved, and the reliability of devices can be increased.

Abstract: A method of fabricating a semiconductor device is disclosed that is able to suppress a short channel effect and improve carrier mobility. In the method, trenches are formed in a silicon substrate corresponding to a source region and a drain region. When epitaxially growing p-type semiconductor mixed crystal layers to fill up the trenches, the surfaces of the trenches are demarcated by facets, and extended portions of the semiconductor mixed crystal layers are formed between bottom surfaces of second side wall insulating films and a surface of the silicon substrate, and extended portion are in contact with a source extension region and a drain extension region.

Abstract: A single crystal semiconductor including a Wheatstone bridge circuit formed of an impurity diffusion layer whose longitudinal direction is aligned with a particular crystal orientation is connected to a rotating body. A rotating body dynamic quantity measuring device and a system using the measuring device are fatigue- and corrosion-resistant because of the single crystal semiconductor used and are not easily affected by temperature variations because of the bridge circuit considering a single crystal anisotropy.