Patents by Inventor Hiroyuki Uchida

Hiroyuki Uchida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160118576
    Abstract: A storage element includes a magnetization fixed layer, and a magnetization free layer. The magnetization fixed layer includes a plurality of ferromagnetic layers laminated together with a coupling layer formed between each pair of adjacent ferromagnetic layers. The magnetization directions of the ferromagnetic layers are inclined with respect to a magnetization direction of the magnetization fixed layer.
    Type: Application
    Filed: January 4, 2016
    Publication date: April 28, 2016
    Inventors: Yutaka Higo, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Tetsuya Asayama, Kazutaka Yamane, Hiroyuki Uchida
  • Patent number: 9324424
    Abstract: A memory device includes multiple bit lines extending in a first direction, multiple word lines extending in a second direction crossing the first direction, and multiple memory cells each coupled to corresponding two word lines and corresponding two bit lines. Each memory cell includes a memory element configured to store information on the basis of changes in resistance and two select transistors. One terminal of the memory element is coupled to one of the two bit lines corresponding to the memory cell; the other terminal is coupled to respective drains of the select transistors; respective sources of the select transistors are coupled to the other bit line; a gate of one of the select transistors is coupled to one of the two word lines corresponding to the memory cell; and a gate of the other is coupled to the other word line.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: April 26, 2016
    Assignee: SONY CORPORATION
    Inventors: Yutaka Higo, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Kazutaka Yamane, Hiroyuki Uchida
  • Patent number: 9324935
    Abstract: Provided is an information storage element comprising a first layer, an insulation layer coupled to the first layer, and a second layer coupled to the insulation layer opposite the first layer. The first layer has a transverse length that is approximately 45 nm or less, or an area that is approximately 1,600 nm2 or less, so as to be capable of storing information according to a magnetization state of a magnetic material. The magnetization state is configured to be changed by a current. The insulation layer includes a non-magnetic material. The second layer includes a fixed magnetization so as to be capable of serving as a reference of the first layer.
    Type: Grant
    Filed: July 17, 2014
    Date of Patent: April 26, 2016
    Assignee: Sony Corporation
    Inventors: Kazutaka Yamane, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Yutaka Higo, Tetsuya Asayama, Hiroyuki Uchida
  • Patent number: 9324940
    Abstract: A storage element is provided. The storage element includes a memory layer having a first magnetization state of a first material; a fixed magnetization layer having a second magnetization state of a second material; an intermediate layer including a nonmagnetic material and provided between the memory layer and the fixed magnetization layer; wherein the first material includes Co—Fe—B alloy, and at least one of a non-magnetic metal and an oxide.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: April 26, 2016
    Assignee: Sony Corporation
    Inventors: Kazutaka Yamane, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Yutaka Higo, Hiroyuki Uchida
  • Patent number: 9299916
    Abstract: There is disclosed a memory element including a memory layer that maintains information through the magnetization state of a magnetic material, a magnetization-fixed layer with a magnetization that is a reference of information stored in the memory layer, and an intermediate layer that is formed of a non-magnetic material and is provided between the memory layer and the magnetization-fixed layer. The storing of the information is performed by inverting the magnetization of the memory layer by using a spin torque magnetization inversion occurring according to a current flowing in the lamination direction of a layered structure having the memory layer, the intermediate layer, and the magnetization-fixed layer, the memory layer includes an alloy region containing at least one of Fe and Co, and a magnitude of an effective diamagnetic field which the memory layer receives during magnetization inversion thereof is smaller than the saturated magnetization amount of the memory layer.
    Type: Grant
    Filed: April 28, 2014
    Date of Patent: March 29, 2016
    Assignee: Sony Corporation
    Inventors: Kazuhiro Bessho, Masanori Hosomi, Hiroyuki Ohmori, Yutaka Higo, Kazutaka Yamane, Hiroyuki Uchida
  • Publication number: 20160087285
    Abstract: Provided is a method for efficiently manufacturing fine metal particles applicable as a fuel cell electrode catalyst. Provided is a method of manufacturing fine metal particles, including the step of: a hydrogen bubbling step to perform bubbling to a reaction solution, wherein: the reaction solution is prepared by allowing seeds of fine metal particles in a dispersed state and a water soluble noble metal precursor to co-exist in a water-containing solvent; and the bubbling is performed with a reaction gas containing a hydrogen gas, is provided.
    Type: Application
    Filed: April 16, 2014
    Publication date: March 24, 2016
    Applicant: University of Yamanashi
    Inventors: Masahiro Watanabe, Hiroyuki Uchida, Hiroshi Yano, Makoto Uchida
  • Patent number: 9293693
    Abstract: There is disclosed an information storage element including a first layer including a ferromagnetic layer with a magnetization direction perpendicular to a film face; an insulation layer coupled to the first layer; and a second layer coupled to the insulation layer opposite the first layer, the second layer including a fixed magnetization so as to be capable of serving as a reference of the first layer. The first layer is capable of storing information according to a magnetization state of a magnetic material, and the magnetization state is configured to be changed by a spin injection. A magnitude of an effective diamagnetic field which the first layer receives is smaller than a saturated magnetization amount of the first layer.
    Type: Grant
    Filed: July 30, 2014
    Date of Patent: March 22, 2016
    Assignee: Sony Corporation
    Inventors: Kazutaka Yamane, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Yutaka Higo, Hiroyuki Uchida, Tetsuya Asayama
  • Publication number: 20160072053
    Abstract: A storage element is provided. The storage element includes a memory layer having a first magnetization state of a first material; a fixed magnetization layer having a second magnetization state of a second material; an intermediate layer including a nonmagnetic material and provided between the memory layer and the fixed magnetization layer; wherein the first material includes Co—Fe—B alloy, and at least one of a non-magnetic metal and an oxide.
    Type: Application
    Filed: November 17, 2015
    Publication date: March 10, 2016
    Inventors: Kazutaka Yamane, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Yutaka Higo, Hiroyuki Uchida
  • Patent number: 9257635
    Abstract: Spin transfer torque memory elements and memory devices are provided. In one embodiment, the spin transfer torque memory element includes a first portion including CoFeB, a second portion including CoFeB, an intermediate portion interposed between the first and second portions, a third portion adjoining the second portion opposite the intermediate portion, and a fourth portion adjoining the third portion opposite the second portion. The intermediate portion includes MgO. The third portion includes at least one of Ag, Au, Cr, Cu, Hf, Mo, Nb, Os, Re, Ru, Ta, W, and Zr. The fourth portion includes at least alloy of CoPt, FePt, and Ru.
    Type: Grant
    Filed: June 26, 2015
    Date of Patent: February 9, 2016
    Assignee: Sony Corporation
    Inventors: Hiroyuki Ohmori, Masanori Hosomi, Kazuhiro Bessho, Yutaka Higo, Kazutaka Yamane, Hiroyuki Uchida, Tetsuya Asayama
  • Patent number: 9251057
    Abstract: Disclosed is a nonvolatile cache memory including a nonvolatile memory part and a cache controller. The nonvolatile memory part is configured to store cache data. The cache controller is configured to control reading and writing of the cache data with respect to the nonvolatile memory part. Further, the cache controller is configured to perform, as a preparation for an interruption of power supply, standby preparation processing to generate standby state data and store the generated standby state data in the nonvolatile memory part. Further, the cache controller is configured to perform, at resumption of the power supply, restoration processing of the cache data stored in the nonvolatile memory part using the standby state data.
    Type: Grant
    Filed: November 20, 2012
    Date of Patent: February 2, 2016
    Assignee: Sony Corporation
    Inventors: Yutaka Higo, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Tetsuya Asayama, Kazutaka Yamane, Hiroyuki Uchida
  • Patent number: 9224942
    Abstract: There is disclosed a memory element including a layered structure including a memory layer that has a magnetization perpendicular to a film face; a magnetization-fixed layer; and an insulating layer provided between the memory layer. An electron that is spin-polarized is injected in a lamination direction of a layered structure, a magnitude of an effective diamagnetic field which the memory layer receives is smaller than a saturated magnetization amount of the memory layer, in regard to the insulating layer that comes into contact with the memory layer, and the other side layer with which the memory layer comes into contact at a side opposite to the insulating layer, at least an interface that comes into contact with the memory layer is formed of an oxide film, and the memory layer includes at least one of non-magnetic metal and oxide in addition to a Co—Fe—B magnetic layer.
    Type: Grant
    Filed: October 16, 2013
    Date of Patent: December 29, 2015
    Assignee: Sony Corporation
    Inventors: Kazutaka Yamane, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Yutaka Higo, Hiroyuki Uchida
  • Patent number: 9196824
    Abstract: A magnetic storage element including a recording layer and a heat generator. The recording layer has a magnetization direction that is configured to change via spin injection so that information can be recorded. The heat generator is positioned to heat the recording layer. The recording layer comprises (i) cobalt and iron and (ii) a non-magnetic element or a non-magnetic element and an oxide.
    Type: Grant
    Filed: April 18, 2014
    Date of Patent: November 24, 2015
    Assignee: SONY CORPORATION
    Inventors: Kuzutaka Yamane, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Yutaka Higo, Hiroyuki Uchida
  • Patent number: 9196336
    Abstract: Provided is a storage cell that makes it possible to enhance magnetic characteristics of magnetization pinned layer, a storage device and a magnetic head that include the storage cell. The storage cell includes a layer structure including a base layer, a storage layer in which a direction of magnetization is varied in correspondence with information, a magnetization pinned layer that is formed above the base layer and has magnetization that is perpendicular to a film surface and serves as a reference of information stored in the storage layer, and an intermediate layer that is provided between the storage layer and the magnetization pinned layer and is made of a nonmagnetic body. The base layer has a laminated structure of ruthenium and a nonmagnetic body having a face-centered cubic lattice, and the ruthenium is formed at a location adjacent to the magnetization pinned layer.
    Type: Grant
    Filed: August 22, 2013
    Date of Patent: November 24, 2015
    Assignee: SONY CORPORATION
    Inventors: Hiroyuki Uchida, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Yutaka Higo, Tetsuya Asayama, Kazutaka Yamane
  • Patent number: 9196333
    Abstract: There is disclosed a memory element including a memory layer that has a magnetization and a magnetization direction thereof varies corresponding to information; a magnetization-fixed layer that has a magnetization; and an insulating layer that is provided between the memory layer and the magnetization-fixed layer, wherein an electron that is spin-polarized is injected in a lamination direction of a layered structure, and thereby the magnetization direction of the memory layer varies and a recording of information is performed with respect to the memory layer, and a Ta film in contact with a face of the magnetization-fixed layer, the face of the magnetization-fixed layer is opposite to the insulating layer side.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: November 24, 2015
    Assignee: Sony Corporation
    Inventors: Hiroyuki Uchida, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Yutaka Higo, Kazutaka Yamane
  • Publication number: 20150325782
    Abstract: A storage element includes a storage layer having a magnetization perpendicular to a layer surface and storing information according to a magnetization state of a magnetic material; a fixed magnetization layer having the magnetization as a reference of the information of the storage layer and perpendicular to the layer surface; an interlayer formed of a nonmagnetic material and interposed between the storage layer and the fixed magnetization layer; a coercive force enhancement layer adjacent to the storage layer, opposite to the interlayer, and formed of Cr, Ru, W, Si, or Mn; and a spin barrier layer formed of an oxide, adjacent to the coercive force enhancement layer, and opposite to the storage layer.
    Type: Application
    Filed: July 21, 2015
    Publication date: November 12, 2015
    Inventors: Hiroyuki OHMORI, Masanori HOSOMI, Kazuhiro BESSHO, Yutaka HIGO, Kazutaka YAMANE, Hiroyuki UCHIDA, Tetsuya ASAYAMA
  • Publication number: 20150303375
    Abstract: A memory element has a layered structure, including a memory layer that has magnetization perpendicular to a film face in which a magnetization direction is changed depending on information, and includes a Co—Fe—B magnetic layer, the magnetization direction being changed by applying a current in a lamination direction of the layered structure to record the information in the memory layer, a magnetization-fixed layer having magnetization perpendicular to a film face that becomes a base of the information stored in the memory layer, and an intermediate layer that is formed of a non-magnetic material and is provided between the memory layer and the magnetization-fixed layer, a first oxide layer and a second oxide layer.
    Type: Application
    Filed: June 4, 2015
    Publication date: October 22, 2015
    Applicant: Sony Corporation
    Inventors: Kazutaka Yamane, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Yutaka Higo, Tetsuya Asayama, Hiroyuki Uchida
  • Publication number: 20150295252
    Abstract: A metallic separator for fuel cells having a metal plate, an electroconductive coating layer covering at least a surface in front and back surfaces of the metal plate which contacts a raw material and/or a reaction product, and an electroconductive channel-forming member disposed on a surface of the coating layer and forming a channel for the raw material and/or the reaction product and/or a channel for a cooling medium for cooling. A surface layer on the metal plate has a tensile residual stress within such a range that no stress-corrosion cracking occurs.
    Type: Application
    Filed: June 24, 2015
    Publication date: October 15, 2015
    Applicant: UNIVERSITY OF YAMANASHI
    Inventors: Masahiro WATANABE, Hiroyuki UCHIDA, Hisao YAMASHITA, Kenji MIYATAKE
  • Publication number: 20150295169
    Abstract: Spin transfer torque memory elements and memory devices are provided. In one embodiment, the spin transfer torque memory element includes a first portion including CoFeB, a second portion including CoFeB, an intermediate portion interposed between the first and second portions, a third portion adjoining the second portion opposite the intermediate portion, and a fourth portion adjoining the third portion opposite the second portion. The intermediate portion includes MgO. The third portion includes at least one of Ag, Au, Cr, Cu, Hf, Mo, Nb, Os, Re, Ru, Ta, W, and Zr. The fourth portion includes at least alloy of CoPt, FePt, and Ru.
    Type: Application
    Filed: June 26, 2015
    Publication date: October 15, 2015
    Inventors: Hiroyuki OHMORI, Masanori HOSOMI, Kazuhiro BESSHO, Yutaka HIGO, Kazutaka YAMANE, Hiroyuki UCHIDA, Tetsuya ASAYAMA
  • Patent number: 9147455
    Abstract: A storage element includes: a storage layer which has magnetization perpendicular to a film surface, the direction of the magnetization being changed in accordance with information; a magnetization fixed layer which has magnetization perpendicular to a film surface used as a base of information stored in the storage layer; and an insulating layer of a nonmagnetic substance provided between the storage layer and the magnetization fixed layer. In the storage element described above, the magnetization of the storage layer is reversed using a spin torque magnetization reversal generated by a current flowing in a lamination direction of a layer structure including the storage layer, the insulating layer, and the magnetization fixed layer to store information, and the storage layer has a laminate structure including a magnetic layer and a conductive oxide.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: September 29, 2015
    Assignee: SONY CORPORATION
    Inventors: Kazuhiro Bessho, Masanori Hosomi, Hiroyuki Ohmori, Yutaka Higo, Kazutaka Yamane, Hiroyuki Uchida, Tetsuya Asayama
  • Patent number: 9135210
    Abstract: In one embodiment of the present invention, processor 1000 comprising a plurality of processor cores for processing an instruction-execution sequence is provided. Signal path 140 that is able to communicate an inter-core interrupt signal fint is connected to at least two processor cores 100A and 100B. Each core of the at least two cores has an inter-core interrupt count setting register (ICSR) 110 and a FIFO counter 120. Inter-core interrupt synchronization function, inter-core interrupt generation function, and FIFO counter updating function are implemented to the every core. In embodiments of the present invention, a core and a method therefor are also provided.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: September 15, 2015
    Assignee: TOPS SYSTEMS CORPORATION
    Inventors: Yukoh Matsumoto, Hiroyuki Uchida