Patents by Inventor Hiroyuki Yamakita
Hiroyuki Yamakita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11985773Abstract: Disclosed herein is a display device including a display panel having a display portion configured to display an image, a plate-shaped member having a first principal surface and a second principal surface, the display panel being disposed on a second principal surface side, the plate-shaped member including a screen portion disposed in a position corresponding to the display portion, an opaque frame member disposed at a peripheral edge of the screen portion, a bonding member that has transparency and is configured to bond the display panel and the plate-shaped member to each other, a holding member disposed on the second principal surface side of the plate-shaped member, and a fixing member configured to fix the frame member and the holding member to the plate-shaped member, the plate-shaped member further including a transparent peripheral edge portion disposed on an outside of the frame member.Type: GrantFiled: August 26, 2022Date of Patent: May 14, 2024Assignee: JOLED INC.Inventors: Hiroyuki Yamakita, Teruo Nanmoku, Masaki Kawasaki, Tetsuro Nakamura, Shunsuke Itakura
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Publication number: 20230061015Abstract: Disclosed herein is a display device including a display panel having a display portion configured to display an image, a plate-shaped member having a first principal surface and a second principal surface, the display panel being disposed on a second principal surface side, the plate-shaped member including a screen portion disposed in a position corresponding to the display portion, an opaque frame member disposed at a peripheral edge of the screen portion, a bonding member that has transparency and is configured to bond the display panel and the plate-shaped member to each other, a holding member disposed on the second principal surface side of the plate-shaped member, and a fixing member configured to fix the frame member and the holding member to the plate-shaped member, the plate-shaped member further including a transparent peripheral edge portion disposed on an outside of the frame member.Type: ApplicationFiled: August 26, 2022Publication date: March 2, 2023Inventors: Hiroyuki YAMAKITA, Teruo NANMOKU, Masaki KAWASAKI, Tetsuro NAKAMURA, Shunsuke ITAKURA
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Patent number: 9812058Abstract: The application discloses a method for manufacturing a luminescent panel including a luminescent area provided with emission pixels arranged in row and column directions. The manufacturing method includes a first step of dividing the luminescent area into segment areas so that each of the segment areas includes at least one of the emission pixels; a second step of selecting a part of the segment areas as a first area, and the segment areas adjacent to the first area in the row and column directions as second areas; and a third step of aging the emission pixel in the first area by energization to generate an aging area.Type: GrantFiled: April 17, 2013Date of Patent: November 7, 2017Assignee: JOLED INC.Inventors: Kenichi Masumoto, Hiroyuki Yamakita, Hiroki Yamamoto
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Patent number: 9801253Abstract: A method for manufacturing an emission panel which has an emission portion including pixels, through which currents of mutually different values flow under a condition that voltages of mutually identical values are applied to the respective pixels is disclosed. This manufacturing method includes: an acquisition step of acquiring correction coefficients for correcting the values of the voltages applied to the respective pixels to reduce differences among the values in current flowing through the respective pixels; and an aging step of executing aging processing on the pixels, the aging processing being executed by correcting the values of the voltages applied to the respective pixels using the correction coefficients and by applying the corrected voltages to the respective pixels.Type: GrantFiled: November 2, 2012Date of Patent: October 24, 2017Assignee: JOLED INC.Inventors: Hiroki Yamamoto, Hiroyuki Yamakita, Kenichi Masumoto
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Patent number: 9226432Abstract: The present application discloses a display device including a display panel for displaying images; a first thermal conduction layer including a flexible and compressively deformable portion in contact with the display panel, and a thermal conduction portion for conducting heat from the flexible portion; and a second thermal conduction layer in contact with the thermal conduction portion. The first thermal conduction layer conducts heat isotropically. The second thermal conduction layer with higher thermal conduction characteristics in an in-plane direction than the first thermal conduction layer forms a thermal conduction element with the thermal conduction portion. The thermal conduction element includes a first area corresponding to a center of the display panel and a second area closer to an edge of the display panel than the first area. The second area has higher thermal conductivity in the in-plane direction than the first area does.Type: GrantFiled: July 12, 2012Date of Patent: December 29, 2015Assignee: JOLED INC.Inventor: Hiroyuki Yamakita
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Patent number: 9129920Abstract: The present application discloses a display panel including flexible substrates on which first power lines are mounted to supply power; a substrate including a first surface provided with a display area, a second surface opposite to the first surface, and second power lines for connecting the first power lines to the display pixels; a thermal conduction member partially covering the second surface and conducting heat in an in-plane direction; and a thermal conduction seal covering a periphery of the thermal conduction member. The first surface includes an arrangement area to arrange the second power lines between the flexible substrates and the display area. The second surface includes a first area opposite to the display area and a second area opposite to the arrangement area. The thermal conduction member covers at least the first area. The thermal conduction seal covers the second area.Type: GrantFiled: July 22, 2011Date of Patent: September 8, 2015Assignee: JOLED INC.Inventors: Kenichi Masumoto, Hiroyuki Yamakita
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Patent number: 8975624Abstract: The present application discloses OEL display panel including OEL board including organic emission elements situated in respective emission regions compartmentalized by confining wall, and black matrix facing OEL board. The black matrix is provided with openings, each of which allows passage of light from each of the organic emission elements. Organic emission elements include first organic emission element with organic emission layer for emitting light in first emission color, and second organic emission element with organic emission layer for emitting light in second emission color different from first emission color. Openings include first opening corresponding to first organic emission element, and second opening corresponding to second organic emission element. First organic emission element has lower emission efficiency than second organic emission element does. Thermal conductivity is higher around first opening than second opening.Type: GrantFiled: July 19, 2011Date of Patent: March 10, 2015Assignee: Panasonic CorporationInventors: Hiroyuki Yamakita, Kenichi Masumoto
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Publication number: 20150049127Abstract: The application discloses a method for manufacturing a luminescent panel including a luminescent area provided with emission pixels arranged in row and column directions. The manufacturing method includes a first step of dividing the luminescent area into segment areas so that each of the segment areas includes at least one of the emission pixels; a second step of selecting a part of the segment areas as a first area, and the segment areas adjacent to the first area in the row and column directions as second areas; and a third step of aging the emission pixel in the first area by energization to generate an aging area.Type: ApplicationFiled: April 17, 2013Publication date: February 19, 2015Applicant: PANASONIC CORPORATIONInventors: Kenichi Masumoto, Hiroyuki Yamakita, Hiroki Yamamoto
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Publication number: 20140320042Abstract: A method for manufacturing an emission panel which has an emission portion including pixels, through which currents of mutually different values flow under a condition that voltages of mutually identical values are applied to the respective pixels is disclosed. This manufacturing method includes: an acquisition step of acquiring correction coefficients for correcting the values of the voltages applied to the respective pixels to reduce differences among the values in current flowing through the respective pixels; and an aging step of executing aging processing on the pixels, the aging processing being executed by correcting the values of the voltages applied to the respective pixels using the correction coefficients and by applying the corrected voltages to the respective pixels.Type: ApplicationFiled: November 2, 2012Publication date: October 30, 2014Inventors: Hiroki Yamamoto, Hiroyuki Yamakita, Kenichi Masumoto
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Publication number: 20140160674Abstract: The present application discloses a display device including a display panel for displaying images; a first thermal conduction layer including a flexible and compressively deformable portion in contact with the display panel, and a thermal conduction portion for conducting heat from the flexible portion; and a second thermal conduction layer in contact with the thermal conduction portion. The first thermal conduction layer conducts heat isotropically. The second thermal conduction layer with higher thermal conduction characteristics in an in-plane direction than the first thermal conduction layer forms a thermal conduction element with the thermal conduction portion. The thermal conduction element includes a first area corresponding to a center of the display panel and a second area closer to an edge of the display panel than the first area. The second area has higher thermal conductivity in the in-plane direction than the first area does.Type: ApplicationFiled: July 12, 2012Publication date: June 12, 2014Applicant: PANASONIC CORPORATIONInventor: Hiroyuki Yamakita
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Patent number: 8730278Abstract: Disclosed is a paper-like display device. A front substrate 1 and a back substrate 2 are disposed to face each other with a space therebetween, and partition walls 5 partition the space vertically (Y) and horizontally (X) into cell spaces 3. A predetermined quantity of black-colored particles 4 is enclosed within each cell space 3. A white reflective layer 6, first electrodes 7, and an insulating layer 8 are formed on the inner surface of the back substrate 2. Each first electrode 7 is separately formed for a different pixel and extends along the bottom surface of the cell space 3. Each partition wall 5 includes an upper partition wall 5b, facing the front substrate 1, and a lower partition wall 5a, facing the back substrate 2. A second electrode 9 serving as a common electrode is formed between the upper partition wall 5b and the lower partition wall 5a.Type: GrantFiled: November 5, 2010Date of Patent: May 20, 2014Assignee: Panasonic CorporationInventor: Hiroyuki Yamakita
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Publication number: 20140131693Abstract: The present application discloses a display panel including flexible substrates on which first power lines are mounted to supply power; a substrate including a first surface provided with a display area, a second surface opposite to the first surface, and second power lines for connecting the first power lines to the display pixels; a thermal conduction member partially covering the second surface and conducting heat in an in-plane direction; and a thermal conduction seal covering a periphery of the thermal conduction member. The first surface includes an arrangement area to arrange the second power lines between the flexible substrates and the display area. The second surface includes a first area opposite to the display area and a second area opposite to the arrangement area. The thermal conduction member covers at least the first area. The thermal conduction seal covers the second area.Type: ApplicationFiled: July 22, 2011Publication date: May 15, 2014Applicant: PANASONIC CORPORATIONInventors: Kenichi Masumoto, Hiroyuki Yamakita
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Publication number: 20140042424Abstract: The present application discloses OEL display panel including OEL board including organic emission elements situated in respective emission regions compartmentalized by confining wall, and black matrix facing OEL board. The black matrix is provided with openings, each of which allows passage of light from each of the organic emission elements. Organic emission elements include first organic emission element with organic emission layer for emitting light in first emission color, and second organic emission element with organic emission layer for emitting light in second emission color different from first emission color. Openings include first opening corresponding to first organic emission element, and second opening corresponding to second organic emission element. First organic emission element has lower emission efficiency than second organic emission element does. Thermal conductivity is higher around first opening than second opening.Type: ApplicationFiled: July 19, 2011Publication date: February 13, 2014Applicant: PANASONIC CORPORATIONInventors: Hiroyuki Yamakita, Kenichi Masumoto
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Publication number: 20120069064Abstract: Disclosed is a paper-like display device which has improved contrast and image quality and is capable of high-speed operation. A front substrate 1 and a back substrate 2 are disposed to face each other with a space therebetween, and the space is partitioned by partition walls 5 in the vertical (Y) direction and the horizontal (X) direction in a crisscrossed fashion into cell spaces 3. A predetermined quantity of black-colored particles 4 is enclosed within each cell space 3. A white reflective layer 6, first electrodes 7, and an insulating layer 8 are formed on the inner surface of the back substrate 2. Each first electrode 7 is separately formed for a different pixel and extends along the bottom surface of the cell space 3. Each partition wall 5 includes an upper partition wall 5b, facing the front substrate 1, and a lower partition wall 5a, facing the back substrate 2. A second electrode 9 serving as a common electrode is formed between the upper partition wall 5b and the lower partition wall 5a.Type: ApplicationFiled: November 5, 2010Publication date: March 22, 2012Inventor: Hiroyuki Yamakita
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Patent number: 7956540Abstract: A PDP (101) with a reduced discharge inception voltage and discharge sustaining voltage for improving luminous efficiency has at least a pair of substrates (110 and 111) that are disposed in opposition to sandwich a discharge space therebetween. At least a portion of at least one of the substrates has two or more display electrode pairs (104) that include narrow bus electrodes (159 and 169), a dielectric layer (107) formed so as to cover the display electrode pairs (104), and a protective layer (108) formed so as to cover the dielectric layer (107). The dielectric layer (107) has a dense film structure with a dielectric breakdown voltage of 1.0×106 [V/cm] to 1.0×107 [V/cm].Type: GrantFiled: August 11, 2005Date of Patent: June 7, 2011Assignee: Panasonic CorporationInventors: Hiroyuki Yamakita, Masatoshi Kitagawa, Mikihiko Nishitani
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Publication number: 20110089827Abstract: The present invention provides a PDP especially having a high definition or super high definition cell structure and realizing excellent image display performance by obtaining light-emitting efficiency as favorable as or more favorable than conventional PDPs while suppressing discharge voltage rise. Therefore, strip-shaped display electrodes 4 and 5 of a PDP 1 are respectively composed of a combination of a transparent electrode 41 and a bus electrode 42 and a combination of a transparent electrode 51 and a bus electrode 52. An electrode gap d between electrodes 41 and 51 falls in a range of 5 ?m to 60 ?m. A ratio of a total surface area of the electrodes 41 and 51 to a total surface area of discharge cells falls in a range of 0.6 to 0.92. Thus, a discharge start length is larger than the electrode gap d. A product of a total pressure P of a discharge gas and the electrode gap d falls in a range of 13.33 Pa·cm to 133.3 Pa·cm. The discharge gas consists of xenon of 100%.Type: ApplicationFiled: May 15, 2009Publication date: April 21, 2011Applicant: PANASONIC CORPORATIONInventors: Hiroto Yanagawa, Hiroyuki Yamakita, Kiyoshi Hishimotodani, Keisuke Okada
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Patent number: 7928658Abstract: An object of the present invention is to provide a high-definition PDP having a high luminance and low electric power consumption by keeping a line resistance of a bus electrode low and supplying enough electric power to a bus electrode edge in an extending direction of the bus electrode. Therefore, in a PDP having a construction in which a barrier rib (14) for separating adjacent discharge cells (101) is provided so as to cross over a display electrode pair (4), a projection (91) is formed in a barrier rib crossing part (93) in which a bus electrode (9) crosses over the barrier rib (14). Then, a line width (D1) of the projection (91) is set to be larger than a line width (D2) of a discharge space part (92) facing to a discharge space. Also, a width (W1) of the projection (91) is set to be smaller than a maximum width (W2) of the barrier rib (14).Type: GrantFiled: April 14, 2006Date of Patent: April 19, 2011Assignee: Panasonic CorporationInventor: Hiroyuki Yamakita
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Patent number: 7583347Abstract: A liquid crystal display including: a liquid crystal panel including an array substrate having an upper surface on which a common electrode and a pixel electrode are formed, an opposing substrate disposed so as to be opposite to the upper surface and a liquid crystal layer disposed between the array substrate and the opposing substrate, and a reflecting face. The liquid crystal display is further characterized in that at least one electrode of the common electrode and the pixel electrode is constituted by an electrode portion and a wiring portion, the electrode portion is at least partially constituted by a transparent electric conductor, the electrode portion is formed in a layer separated by an insulating layer from a layer in which the scanning signal line is formed, and the wiring portion is formed in the layer in which the scanning signal line is formed.Type: GrantFiled: November 1, 2006Date of Patent: September 1, 2009Assignee: Panasonic CorporationInventors: Akinori Shiota, Hiroyuki Yamakita, Shinji Ogawa
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Publication number: 20090174828Abstract: An array substrate (10) is provided with a pixel electrode (3) disposed in a region defined by two adjacent gate wirings (1) and two adjacent source wirings (2), a switching element (5) for switching a voltage applied to the pixel electrode (3) from the source wiring (2) based on a signal voltage supplied from the gate wiring (1), a common wiring (8) arranged between the two adjacent gate wirings (1) and a common electrode (4) being electrically connected to the common wiring (8) and generating an electric field between the pixel electrode (3) whereto a voltage is applied, wherein the pixel electrode (1) comprises a first pixel electrode (1a) and a second pixel electrode (2a), and the opposing electrode (2) comprises a first opposing electrode (1b) and a second opposing electrode (2b), wherein a first region generates an electric field between the first pixel electrode (1a) and the first opposing electrode (2a) whose light transmittance is lower than that of the first pixel electrode (1a) and a second regionType: ApplicationFiled: February 2, 2009Publication date: July 9, 2009Applicant: PANASONIC CORPORATIONInventors: Katsuhiko KUMAGAWA, Hiroyuki Yamakita, Masanori Kimura, Akio Takimoto
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Patent number: 7501762Abstract: There are provided a PDP having a higher luminous efficiency and a process for producing the same. In a plasma display panel filled with a discharge gas between a front plate and a rear plate opposed to each other, the front plate 100 comprises a glass substrate 1, electrodes 2 (transparent electrodes 2a and bus electrodes 2b) on the glass substrate 1, the first dielectric layer 4 covering the electrodes 2 and the glass substrate 1 and containing a fluorine atom, the second dielectric layer 5 covering the first dielectric layer 4 and containing a fluorine atom at a less amount than that in the first dielectric layer 4, and a protective layer 6 covering the second dielectric layer 5.Type: GrantFiled: July 12, 2006Date of Patent: March 10, 2009Assignee: Panasonic CorporationInventors: Tomohiro Okumura, Hiroyuki Yamakita, Noriyasu Echigo, Mitsuo Saitoh, Junko Asayama, Keisuke Okada