Abstract: According to one embodiment, a semiconductor device includes a graphene interconnect, an insulation film formed on the graphene interconnect, and a via conducting portion formed in a via hole provided in the graphene interconnect and the insulation film.

Abstract: A wiring includes a graphene having a five-seven-membered ring-dense region. The graphene has a plurality of unit cells each including a five-seven-membered ring. The length of the unit cell is 1 nm or more. The shortest distance between most closely adjacent unit cells among the unit cells is 5 nm or less in the five-seven-membered ring-dense region.

Abstract: A nonvolatile memory of an embodiment includes first wiring layers of a first conductivity type extending in a first direction, second wiring layers of a second conductivity type extending in a second direction crossing the first direction, memory cells at intersection points of the first and second wiring layers, absorption parts each in contact with peripheral part of each of the memory cells, and an intercalant present in one or both of the memory cell and the absorption part.

Abstract: According to one embodiment, a semiconductor device using multi-layered graphene wires includes a substrate having semiconductor elements formed therein, a first graphene wire formed above the substrate and including a multi-layered graphene layer having a preset impurity doped therein, a second graphene wire formed on the same layer as the first multi-layered graphene wire above the substrate and including a multi-layered graphene layer into which the preset impurity is not doped, a lower-layer contact connected to the undersurface side of the first multi-layered graphene wire, and an upper-layer contact connected to the upper surface side of the second multi-layered graphene wire.

Abstract: A semiconductor device of an embodiment includes a layered substance formed by laminating two-dimensional substances in two or more layers. The layered substance includes at least either one of a p-type region having a first intercalation substance between layers of the layered substance and an n-type region having a second intercalation substance between layers of the layered substance. The layered substance includes a conductive region that is adjacent to at least either one of the p-type region and the n-type region. The conductive region includes neither the first intercalation substance nor the second intercalation substance. A sealing member is formed on the conductive region, or on the conductive region and an end of the layered substance.

Abstract: According to one embodiment, a semiconductor device in which CNTs are used for a contact via comprise a substrate including a contact via groove, a catalyst layer for CNT growth which is formed at the bottom of the groove, and a CNT via formed by filling the CNTs into the groove in which the catalyst layer is formed. Each of the CNTs is formed by stacking a plurality of graphene layers in a state in which they are inclined depthwise with respect to the groove, and formed such that ends of the graphene layers are exposed on a sidewall of the CNT. Further, the CNT is doped with at least one element from the sidewall of the CNT.

Abstract: According to one embodiment, a semiconductor device in which CNTs are used for a contact via comprises a substrate includes a contact via groove, a catalyst layer for CNT growth which is formed at the bottom of the groove, and a CNT via formed by filling the CNTs into the groove in which the catalyst layer is formed. Each of the CNTs is formed by stacking a plurality of graphene layers in a state in which they are inclined depthwise with respect to the groove, and formed such that ends of the graphene layers are exposed on a sidewall of the CNT. Further, the CNT is doped with at least one element from the sidewall of the CNT.

Abstract: A graphene wiring has a substrate a catalyst layer on the substrate a first graphene sheet layer on the catalyst layer and a second graphene sheet layer on the first graphene layer. The second graphene layer comprises multilayer graphene sheets. The multilayer graphene sheets are intercalated with an atomic or molecular species.

Abstract: A graphene wiring has a substrate, a catalyst layer on the substrate, a graphene layer on the catalyst layer, and a dopant layer on a side surface of the graphene layer. An atomic or molecular species is intercalated in the graphene layer or disposed on the graphene layer.

Abstract: A semiconductor device has a substrate a lower layer wiring on the substrate, an interlayer dielectric on the lower layer wiring having a contact hole, a catalyst metal layer at the bottom of the contact hole having catalyst metal particles, multi-walled carbon nanotubes on the catalyst metal layer passing through the contact hole, and an upper layer wiring on the multi-walled carbon nanotubes. The multi-walled carbon nanotubes are intercalated with an atomic or molecular species.

Abstract: According to one embodiment, a semiconductor device using multi-layered graphene wires includes a substrate having semiconductor elements formed therein, a first graphene wire formed above the substrate and including a multi-layered graphene layer having a preset impurity doped therein, a second graphene wire formed on the same layer as the first multi-layered graphene wire above the substrate and including a multi-layered graphene layer into which the preset impurity is not doped, a lower-layer contact connected to the undersurface side of the first multi-layered graphene wire, and an upper-layer contact connected to the upper surface side of the second multi-layered graphene wire.

Abstract: Provided is a versatile method of determining the number of layers of a two-dimensional atomic layer thin film as compared with conventional methods. An electron beam is radiated to a two-dimensional thin film atomic structure having an unknown number of layers to determine the number of layers based on an intensity of reflected electrons or secondary electrons generated thereby. In particular, this method is effective for determining the number of layers of graphene.

Abstract: Provided is a versatile method of determining the number of layers of a two-dimensional atomic layer thin film as compared with conventional methods. An electron beam is radiated to a two-dimensional thin film atomic structure having an unknown number of layers to determine the number of layers based on an intensity of reflected electrons or secondary electrons generated thereby. In particular, this method is effective for determining the number of layers of graphene.

Abstract: Provided is a novel electronic device that comprises graphite, graphene or the like. An electronic device having a substrate, a layer comprising a 6-member ring-structured carbon homologue as the main ingredient, a pair of electrodes, a layer comprising aluminium oxide as the main ingredient and disposed between the pair of electrodes, and a layer comprising aluminium as the main ingredient, wherein the layer comprising aluminium oxide as the main ingredient is disposed between the layer comprising a 6-member ring-structured carbon homologue as the main ingredient and the layer comprising aluminium as the main ingredient so as to be in contact with the two layers.

Abstract: Provided is a novel electronic device that comprises graphite, graphene or the like. An electronic device having a substrate, a layer comprising a 6-member ring-structured carbon homologue as the main ingredient, a pair of electrodes, a layer comprising aluminium oxide as the main ingredient and disposed between the pair of electrodes, and a layer comprising aluminium as the main ingredient, wherein the layer comprising aluminium oxide as the main ingredient is disposed between the layer comprising a 6-member ring-structured carbon homologue as the main ingredient and the layer comprising aluminium as the main ingredient so as to be in contact with the two layers.

Abstract: A dual heat source high-temperature regenerator to solve problems involved in two types of conventional high-temperature regenerators for carrying out heating by using a dedicated burner as the heat source and by using exhaust gas supplied from outside systems as the heat source; namely, the former type has a problem of higher running costs, and the latter a problem of narrower ranges for capacity control. The dual heat source high-temperature regenerator arranges two inner shells and inside an outer shell to form combustion and exhaust gas flues, respectively. The combustion gas flue has a sideways U shape as a whole. The lower end is equipped with a burner, and the upper end connected to an exhaust duct. The exhaust gas flue 62 has a horizontal, straight shape as a whole. One end is provided with an exhaust gas inlet, and the other end connected to an exhaust duct.

Abstract: A mount base for use with an absorption refrigerator according to the present invention comprises a plurality of pairs of legs spaced by a distance from each other and mounted to a lower side of the cabinet such as the low-temperature and/or high-temperature cabinet, and a plurality of link plates securely joined to the legs thus forming an inner space defined by four sides beneath the cabinet, and will thus be increased in the physical strength for supporting the low-temperature and/or high-temperature cabinet. When the low-temperature and/or high-temperature cabinet is shaken by e.g. earthquake, it remains supported securely by the combination of the legs and the link plates, more specifically, the legs reinforced with the link plates and thus is prevented from fracture or injury.