Patents by Inventor Hisao Sato

Hisao Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240150366
    Abstract: [Problem] A compound useful as an active ingredient of a pharmaceutical composition for treating pancreatic cancer is provided. [Solution] The present inventors have studied about a compound that is useful as an active ingredient of a pharmaceutical composition for treating pancreatic cancer and have found that a 4-aminoquinazoline compound has an excellent G12D mutant KRAS inhibition activity and can be used as a therapeutic agent for pancreatic cancer, thus completing the present invention. The 4-aminoquinazoline compound of the present invention or a salt thereof can be used as a therapeutic agent for pancreatic cancer.
    Type: Application
    Filed: February 14, 2022
    Publication date: May 9, 2024
    Inventors: Kenichi KAWAGUCHI, Kazuyuki KURAMOTO, Tomoyoshi IMAIZUMI, Takahiro MORIKAWA, Mitsuaki OKUMURA, Sunao IMADA, Eiji KAWAMINAMI, Ryo SATO, Yohei SEKI, Hisao HAMAGUCHI, Hiroki ISHIOKA, Hiroki FUKUDOME, Ikumi KURIWAKI, Takeyuki NAGASHIMA
  • Publication number: 20240048136
    Abstract: A semiconductor device includes a first transistor including a normally-on transistor with a first source, a first drain, and a first gate and a second transistor including a normally-off transistor with a second source, a second drain electrically connected to the first source, and a second gate. A first gate signal, which turns on later than a second gate signal at the time of turn-on of the device and turns off earlier than the second gate signal at the time of turn-off of the device, is input to the first gate. The second gate signal, which turns on earlier than the first gate signal at the time of the turn-on and turns off later than the first gate signal at the time of the turn-off, is input to the second gate. An amount of delay of each of the first gate signal and the second gate signal is set independently.
    Type: Application
    Filed: June 9, 2023
    Publication date: February 8, 2024
    Inventors: Toshihiro IWAKI, Daisuke Arai, Masayoshi Yamamoto, Toshiya Uemura, Hisao Sato, Masao Kamiya
  • Publication number: 20230352573
    Abstract: A semiconductor element includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a fourth semiconductor layer, a first intermediate layer, a second intermediate layer, a source electrode, a drain electrode, and a gate electrode. The band gap of the second semiconductor layer is larger than the band gaps of the first semiconductor layer and the third semiconductor layer. The band gaps of the first intermediate layer and the second intermediate layer that sandwich the second semiconductor layer are larger than the band gap of the second semiconductor layer.
    Type: Application
    Filed: July 6, 2023
    Publication date: November 2, 2023
    Inventors: Hisao SATO, Koji OKUNO, Daisuke SHINODA, Toshiya UEMURA, Hironobu NARUI, Hiroji KAWAI, Shuichi YAGI
  • Patent number: 9496459
    Abstract: A semiconductor light emitting element includes: an n-type cladding layer containing n-type impurities (Si); a light emitting layer laminated on the n-type cladding layer; and a semiconductor layer containing a p-type cladding layer containing p-type impurities (Mg) and laminated on the light emitting layer. The light emitting layer has a multiple quantum well structure including first to fifth barrier layers and first to fourth well layers, and one well layer is sandwiched by two barrier layers. The thickness of the p-type cladding layer 161 is set at less than 3-times the thickness of each of the first to fourth well layer.
    Type: Grant
    Filed: October 10, 2013
    Date of Patent: November 15, 2016
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Katsuki Kusunoki, Hisao Sato
  • Patent number: 9190561
    Abstract: A semiconductor light emitting element includes an n-type semiconductor layer containing n-type impurities, a light emitting layer stacked on the n-type semiconductor layer, and a p-type semiconductor layer stacked on the light emitting layer and containing p-type impurities. The light emitting layer includes three or more well layers, and four or more barrier layers composed of a group-III nitride semiconductor having a larger band gap than that of the well layers, and each of the three or more well layers is sandwiched from both sides by neighboring two of the barrier layers. The three or more well layers include plural n-side well layers each having a first thickness to emit light of a common wavelength, and one or plural p-side well layers each having a second thickness larger than the first thickness and having a different composition from the n-side well layers to emit light of the common wavelength.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: November 17, 2015
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Shunsuke Teranishi, Hisao Sato
  • Patent number: 9099572
    Abstract: A semiconductor light emitting element includes: an n-type semiconductor layer; a light emitting layer alternately laminating plural barrier layers and plural well layers; and a p-type semiconductor layer, wherein the light emitting layer includes three or more well layers and four or more barrier layers, each well layer being sandwiched by the barrier layers, one barrier layer contacting the n-type semiconductor layer, and another barrier layer contacting the p-type semiconductor layer, the well layers include plural n-side well layers from the n-type semiconductor layer side and one p-side well layer on the p-type semiconductor layer side, and a V-shaped concave portion including inclined surfaces is generated in the light emitting layer, and in at least one of the n-side well layers, a concentration of atoms of In on the inclined surface is not more than 50% of a concentration of atoms of In in the n-side well layer.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: August 4, 2015
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Katsuki Kusunoki, Hisao Sato
  • Patent number: 9048386
    Abstract: While maintaining unity of wavelength of light emitted from a semiconductor light emitting element, decrease of light emission efficiency with an increase in environmental temperature is suppressed. A semiconductor light-emitting element includes: an n-cladding layer; a light emitting layer laminated on the n-cladding layer; and a p-type semiconductor layer laminated on the light emitting layer. The light emitting layer includes a first barrier layer to an eighth barrier layer and a first well layer to a seventh well layer, and a single well layer is sandwiched by two barrier layers. The first well layer to the fifth well layer have a common standard well thickness and a common composition, and the sixth well layer and the seventh well layer are set at a maximum well thickness larger than the common standard well thickness and have a composition whose band gap energy is larger than that of the common composition.
    Type: Grant
    Filed: June 6, 2013
    Date of Patent: June 2, 2015
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Shunsuke Teranishi, Hisao Sato
  • Patent number: 8963122
    Abstract: In a semiconductor light emitting element outputting light indicating green color by using a group III nitride semiconductor, light emission output is improved. A semiconductor light emitting element includes: an n-type cladding layer containing n-type impurities (Si); a light emitting layer laminated on the n-type cladding layer; and a p-type cladding layer containing p-type impurities and laminated on the light emitting layer. The light emitting layer has a barrier layer including first to fifth barrier layers and a well layer including first to fourth well layers, and has a multiple quantum well structure to sandwich one well layer by two barrier layers. The light emitting layer is configured such that the first to fourth well layers are set to have a composition to emit green light, and the first barrier layer is doped with n-type impurities, whereas the other barrier layers are not doped with n-type impurities.
    Type: Grant
    Filed: August 12, 2013
    Date of Patent: February 24, 2015
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Katsuki Kusunoki, Hisao Sato
  • Patent number: 8866346
    Abstract: A circuit device includes a power supply circuit having a resonance circuit, and a logic circuit. The resonance circuit includes a first coil, and a second coil having a core section shared by the first coil. The logic circuit performs an adiabatic circuit operation with a power supply voltage generated by the resonance circuit.
    Type: Grant
    Filed: March 7, 2011
    Date of Patent: October 21, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Hisao Sato
  • Publication number: 20140209921
    Abstract: A semiconductor light emitting element includes: an n-type semiconductor layer; a light emitting layer alternately laminating plural barrier layers and plural well layers; and a p-type semiconductor layer, wherein the light emitting layer includes three or more well layers and four or more barrier layers, each well layer being sandwiched by the barrier layers, one barrier layer contacting the n-type semiconductor layer, and another barrier layer contacting the p-type semiconductor layer, the well layers include plural n-side well layers from the n-type semiconductor layer side and one p-side well layer on the p-type semiconductor layer side, and a V-shaped concave portion including inclined surfaces is generated in the light emitting layer, and in at least one of the n-side well layers, a concentration of atoms of In on the inclined surface is not more than 50% of a concentration of atoms of In in the n-side well layer.
    Type: Application
    Filed: December 18, 2013
    Publication date: July 31, 2014
    Applicant: TOYODA GOSEI CO., LTD.
    Inventors: Katsuki KUSUNOKI, Hisao Sato
  • Publication number: 20140103355
    Abstract: A semiconductor light emitting element includes: an n-type cladding layer containing n-type impurities (Si); a light emitting layer laminated on the n-type cladding layer; and a semiconductor layer containing a p-type cladding layer containing p-type impurities (Mg) and laminated on the light emitting layer. The light emitting layer has a multiple quantum well structure including first to fifth barrier layers and first to fourth well layers, and one well layer is sandwiched by two barrier layers. The thickness of the p-type cladding layer 161 is set at less than 3-times the thickness of each of the first to fourth well layer.
    Type: Application
    Filed: October 10, 2013
    Publication date: April 17, 2014
    Applicant: TOYODA GOSEI CO., LTD.
    Inventors: Katsuki KUSUNOKI, Hisao SATO
  • Publication number: 20140048767
    Abstract: In a semiconductor light emitting element outputting light indicating green color by using a group III nitride semiconductor, light emission output is improved. A semiconductor light emitting element includes: an n-type cladding layer containing n-type impurities (Si); a light emitting layer laminated on the n-type cladding layer; and a p-type cladding layer containing p-type impurities and laminated on the light emitting layer. The light emitting layer has a barrier layer including first to fifth barrier layers and a well layer including first to fourth well layers, and has a multiple quantum well structure to sandwich one well layer by two barrier layers. The light emitting layer is configured such that the first to fourth well layers are set to have a composition to emit green light, and the first barrier layer is doped with n-type impurities, whereas the other barrier layers are not doped with n-type impurities.
    Type: Application
    Filed: August 12, 2013
    Publication date: February 20, 2014
    Applicant: TOYODA GOSEI CO., LTD.
    Inventors: Katsuki KUSUNOKI, Hisao SATO
  • Publication number: 20130328011
    Abstract: While maintaining unity of wavelength of light emitted from a semiconductor light emitting element, decrease of light emission efficiency with an increase in environmental temperature is suppressed. A semiconductor light-emitting element includes: an n-cladding layer; a light emitting layer laminated on the n-cladding layer; and a p-type semiconductor layer laminated on the light emitting layer. The light emitting layer includes a first barrier layer to an eighth barrier layer and a first well layer to a seventh well layer, and a single well layer is sandwiched by two barrier layers. The first well layer to the fifth well layer have a common standard well thickness and a common composition, and the sixth well layer and the seventh well layer are set at a maximum well thickness larger than the common standard well thickness and have a composition whose band gap energy is larger than that of the common composition.
    Type: Application
    Filed: June 6, 2013
    Publication date: December 12, 2013
    Inventors: Shunsuke TERANISHI, Hisao SATO
  • Publication number: 20130168637
    Abstract: A semiconductor light emitting element includes an n-type semiconductor layer containing n-type impurities, a light emitting layer stacked on the n-type semiconductor layer, and a p-type semiconductor layer stacked on the light emitting layer and containing p-type impurities. The light emitting layer includes three or more well layers, and four or more barrier layers composed of a group-III nitride semiconductor having a larger band gap than that of the well layers, and each of the three or more well layers is sandwiched from both sides by neighboring two of the barrier layers. The three or more well layers include plural n-side well layers each having a first thickness to emit light of a common wavelength, and one or plural p-side well layers each having a second thickness larger than the first thickness and having a different composition from the n-side well layers to emit light of the common wavelength.
    Type: Application
    Filed: December 20, 2012
    Publication date: July 4, 2013
    Inventors: Shunsuke TERANISHI, Hisao SATO
  • Patent number: 8258771
    Abstract: A circuit device includes: a power supply circuit; and a logic circuit, the power supply circuit supplying a first power supply voltage and a second power supply voltage to the logic circuit, the first power supply voltage supplied by the power supply circuit periodically changing with a first reference voltage as a reference voltage, the second power supply voltage supplied by the power supply circuit periodically changing with a second reference voltage as a reference voltage, the power supply circuit supplying, due to resonance, the first power supply voltage and the second power supply voltage that repeat a first period during which a voltage difference between the first power supply voltage and the second power supply voltage is decreasing and a second period during which the voltage difference is increasing, and the logic circuit performing adiabatic circuit operation with the supply of the first and the second power supply voltage.
    Type: Grant
    Filed: October 28, 2010
    Date of Patent: September 4, 2012
    Assignee: Seiko Epson Corporation
    Inventors: Hisao Sato, Atsushi Yamada, Norikazu Tsukahara, Toshikazu Kuwano, Yasuhiro Takahashi
  • Patent number: 8213188
    Abstract: Provided is a bidirectional DC/DC converter which can control a boost voltage in a wide range. The DC/DC converter includes: three series circuits formed by a first to a sixth switch, each two of which are connected in series between a plus terminal and a minus terminal of a high voltage side; two transformers in which primary windings are connected in series and input terminals of the primary windings are connected to connection points of the switching elements; and a seventh to a tenth switch. The transformers have secondary windings, each of which is divided at the middle point. The middle points are connected to a minus terminal of a low voltage side. Respective terminals of the secondary windings are connected to a plus terminal of the low voltage side by the seventh to the tenth switches.
    Type: Grant
    Filed: June 25, 2008
    Date of Patent: July 3, 2012
    Assignee: Shindengen Electric Manufacturing Co., Ltd.
    Inventors: Nobuhiro Tada, Hisao Sato
  • Publication number: 20110227419
    Abstract: A circuit device includes a power supply circuit having a resonance circuit, and a logic circuit. The resonance circuit includes a first coil, and a second coil having a core section shared by the first coil. The logic circuit performs an adiabatic circuit operation with a power supply voltage generated by the resonance circuit.
    Type: Application
    Filed: March 7, 2011
    Publication date: September 22, 2011
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Hisao Sato
  • Publication number: 20110121813
    Abstract: A circuit device includes: a power supply circuit; and a logic circuit, the power supply circuit supplying a first power supply voltage and a second power supply voltage to the logic circuit, the first power supply voltage supplied by the power supply circuit periodically changing with a first reference voltage as a reference voltage, the second power supply voltage supplied by the power supply circuit periodically changing with a second reference voltage as a reference voltage, the power supply circuit supplying, due to resonance, the first power supply voltage and the second power supply voltage that repeat a first period during which a voltage difference between the first power supply voltage and the second power supply voltage is decreasing and a second period during which the voltage difference is increasing, and the logic circuit performing adiabatic circuit operation with the supply of the first and the second power supply voltage.
    Type: Application
    Filed: October 28, 2010
    Publication date: May 26, 2011
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Hisao SATO, Atsushi YAMADA, Norikazu TSUKAHARA, Toshikazu KUWANO, Yasuhiro TAKAHASHI
  • Publication number: 20100182814
    Abstract: Provided is a bidirectional DC/DC converter which can control a boost voltage in a wide range. The DC/DC converter includes: three series circuits formed by a first to a sixth switch, each two of which are connected in series between a plus terminal and a minus terminal of a high voltage side; two transformers in which primary windings are connected in series and input terminals of the primary windings are connected to connection points of the switching elements; and a seventh to a tenth switch. The transformers have secondary windings, each of which is divided at the middle point. The middle points are connected to a minus terminal of a low voltage side. Respective terminals of the secondary windings are connected to a plus terminal of the low voltage side by the seventh to the tenth switches.
    Type: Application
    Filed: June 25, 2008
    Publication date: July 22, 2010
    Inventors: Nobuhiro Tada, Hisao Sato
  • Patent number: 7727873
    Abstract: An object of the present invention is to provide a method for producing a gallium nitride-based compound semiconductor multilayer structure useful for the production of a gallium nitride-based compound semiconductor light-emitting device which can ensure that the operating voltage is reduced, the light emission output is good and the light emission output is less changed due to aging.
    Type: Grant
    Filed: July 27, 2006
    Date of Patent: June 1, 2010
    Assignee: Showa Denko K.K.
    Inventors: Hisao Sato, Hitoshi Takeda