Patents by Inventor Hisashi Abe
Hisashi Abe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8392643Abstract: A data processing device for detecting the abnormal operation of a CPU is provided. The data processing device comprises a CPU, an interrupt counter, and a counter-abnormal-value detection circuit. The interrupt counter increments a count value based on an interrupt start signal which is outputted in response to an interrupt signal indicative of an interrupt request to the CPU and which indicates that the interrupt request has been accepted, and decrements the count value based on an end-of-interrupt signal which indicates that processing corresponding to the interrupt has completed. The counter-abnormal-value detection circuit detects abnormalities by comparing the count value with a predetermined value.Type: GrantFiled: February 24, 2011Date of Patent: March 5, 2013Assignee: Renesas Electronics CorporationInventors: Ryoichi Yamaguchi, Hisashi Abe
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Patent number: 8304350Abstract: A substrate processing apparatus includes a plurality of evacuable treatment chambers connected to one another via an evacuable common chamber, and the common chamber is provided with means for transporting a substrate between each treatment chamber. More specifically, a substrate processing apparatus includes a plurality of evacuable treatment chambers, at least one of said treatment chambers having a film formation function through a vapor phase reaction therein, at least one of said treatment chambers having an annealing function with light irradiation and at least one of said treatment chambers having a heating function therein. The apparatus also has a common chamber through which said plurality of evacuable treatment chambers are connected to one another, and a transportation means provided in said common chamber for transporting a substrate between each treatment chamber.Type: GrantFiled: February 12, 2010Date of Patent: November 6, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hisashi Ohtani, Hiroyuki Shimada, Mitsunori Sakama, Hisashi Abe, Satoshi Teramoto
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Patent number: 8278195Abstract: In a plasma CVD apparatus, unnecessary discharge such as arc discharge is prevented, the amount of particles due to peeling of films attached to a reaction chamber is reduced, and the percentage of a time contributing to production in hours of operation of the apparatus is increased while enlargement of the apparatus and easy workability are maintained. The plasma CVD apparatus is configured such that in a conductive reaction chamber 104 with a power source 113, a vacuum exhausting means 118, and a reaction gas introduction pipe 114, plasma 115 is generated in a space surrounded by an electrode 111, a substrate holder 112, and an insulator 120.Type: GrantFiled: November 2, 2011Date of Patent: October 2, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama, Mitsunori Sakama, Hisashi Abe, Hiroshi Uehara, Mika Ishiwata
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Publication number: 20120045593Abstract: In a plasma CVD apparatus, unnecessary discharge such as arc discharge is prevented, the amount of particles due to peeling of films attached to a reaction chamber is reduced, and the percentage of a time contributing to production in hours of operation of the apparatus is increased while enlargement of the apparatus and easy workability are maintained. The plasma CVD apparatus is configured such that in a conductive reaction chamber 104 with a power source 113, a vacuum exhausting means 118, and a reaction gas introduction pipe 114, plasma 115 is generated in a space surrounded by an electrode 111, a substrate holder 112, and an insulator 120.Type: ApplicationFiled: November 2, 2011Publication date: February 23, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Toru TAKAYAMA, Mitsunori SAKAMA, Hisashi ABE, Hiroshi UEHARA, Mika ISHIWATA
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Patent number: 8053338Abstract: In a plasma CVD apparatus, unnecessary discharge such as arc discharge is prevented, the amount of particles due to peeling of films attached to a reaction chamber is reduced, and the percentage of a time contributing to production in hours of operation of the apparatus is increased while enlargement of the apparatus and easy workability are maintained. The plasma CVD apparatus is configured such that in a conductive reaction chamber 104 with a power source 113, a vacuum exhausting means 118, and a reaction gas introduction pipe 114, plasma 115 is generated in a space surrounded by an electrode 111, a substrate holder 112, and an insulator 120.Type: GrantFiled: April 2, 2009Date of Patent: November 8, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama, Mitsunori Sakama, Hisashi Abe, Hiroshi Uehara, Mika Ishiwata
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Publication number: 20110219157Abstract: A data processing device for detecting the abnormal operation of a CPU is provided. The data processing device comprises a CPU, an interrupt counter, and a counter-abnormal-value detection circuit. The interrupt counter increments a count value based on an interrupt start signal which is outputted in response to an interrupt signal indicative of an interrupt request to the CPU and which indicates that the interrupt request has been accepted, and decrements the count value based on an end-of-interrupt signal which indicates that processing corresponding to the interrupt has completed. The counter-abnormal-value detection circuit detects abnormalities by comparing the count value with a predetermined value.Type: ApplicationFiled: February 24, 2011Publication date: September 8, 2011Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Ryoichi YAMAGUCHI, Hisashi ABE
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Publication number: 20100144077Abstract: A substrate processing apparatus includes a plurality of evacuable treatment chambers connected to one another via an evacuable common chamber, and the common chamber is provided with means for transporting a substrate between each treatment chamber. More specifically, a substrate processing apparatus includes a plurality of evacuable treatment chambers, at least one of said treatment chambers having a film formation function through a vapor phase reaction therein, at least one of said treatment chambers having an annealing function with light irradiation and at least one of said treatment chambers having a heating function therein. The apparatus also has a common chamber through which said plurality of evacuable treatment chambers are connected to one another, and a transportation means provided in said common chamber for transporting a substrate between each treatment chamber.Type: ApplicationFiled: February 12, 2010Publication date: June 10, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Hisashi OHTANI, Hiroyuki SHIMADA, Mitsunori SAKAMA, Hisashi ABE, Satoshi TERAMOTO
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Patent number: 7723218Abstract: In a plasma CVD apparatus, unnecessary discharge such as arc discharge is prevented, the amount of particles due to peeling of films attached to a reaction chamber is reduced, and the percentage of a time contributing to production in hours of operation of the apparatus is increased while enlargement of the apparatus and easy workability are maintained. The plasma CVD apparatus is configured such that in a conductive reaction chamber 104 with a power source 113, a vacuum exhausting means 118, and a reaction gas introduction pipe 114, plasma 115 is generated in a space surrounded by an electrode 111, a substrate holder 112, and an insulator 120.Type: GrantFiled: April 11, 2005Date of Patent: May 25, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama, Mitsunori Sakama, Hisashi Abe, Hiroshi Uehara, Mika Ishiwata
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Patent number: 7691692Abstract: A substrate processing apparatus includes a plurality of evacuable treatment chambers connected to one another via an evacuable common chamber, and the common chamber is provided with means for transporting a substrate between each treatment chamber. More specifically, a substrate processing apparatus includes a plurality of evacuable treatment chambers, at least one of said treatment chambers having a film formation function through a vapor phase reaction therein, at least one of said treatment chambers having an annealing function with light irradiation and at least one of said treatment chambers having a heating function therein. The apparatus also has a common chamber through which said plurality of evacuable treatment chambers are connected to one another, and a transportation means provided in said common chamber for transporting a substrate between each treatment chamber.Type: GrantFiled: September 17, 2008Date of Patent: April 6, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hisashi Ohtani, Hiroyuki Shimada, Mitsunori Sakama, Hisashi Abe, Satoshi Teramoto
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Publication number: 20090197012Abstract: In a plasma CVD apparatus, unnecessary discharge such as arc discharge is prevented, the amount of particles due to peeling of films attached to a reaction chamber is reduced, and the percentage of a time contributing to production in hours of operation of the apparatus is increased while enlargement of the apparatus and easy workability are maintained. The plasma CVD apparatus is configured such that in a conductive reaction chamber 104 with a power source 113, a vacuum exhausting means 118, and a reaction gas introduction pipe 114, plasma 115 is generated in a space surrounded by an electrode 111, a substrate holder 112, and an insulator 120.Type: ApplicationFiled: April 2, 2009Publication date: August 6, 2009Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei YAMAZAKI, Toru TAKAYAMA, Mitsunori SAKAMA, Hisashi ABE, Hiroshi UEHARA, Mika ISHIWATA
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Patent number: 7497755Abstract: An apparatus for improving testability of electroluminescent displays (ELDs) comprises at least two sets of electrodes, one set for connecting rows of pixels, and a second set for connecting columns of pixels, wherein at least one electrode set is interleaved in two subsets. The first subset has electrode extensions of a first length, and the second subset has electrode extensions of a second, shorter, length. A first connector is disposed generally in a direction perpendicular to the electrode extensions of both subsets and in electrical contact with the electrode extensions of the second subset. A second connector is disposed generally in a direction perpendicular to the electrode extensions of the first subset, and in electrical contact with the electrode extensions of only the first subset. A set of insulating patches separate the electrode extensions of the first subset from the first connector.Type: GrantFiled: September 29, 2004Date of Patent: March 3, 2009Assignees: Ifire IP Corporation, Sanyo Electric Co., Ltd.Inventors: Hisashi Abe, Derek Luke
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Publication number: 20090029509Abstract: A substrate processing apparatus includes a plurality of evacuable treatment chambers connected to one another via an evacuable common chamber, and the common chamber is provided with means for transporting a substrate between each treatment chamber. More specifically, a substrate processing apparatus includes a plurality of evacuable treatment chambers, at least one of said treatment chambers having a film formation function through a vapor phase reaction therein, at least one of said treatment chambers having an annealing function with light irradiation and at least one of said treatment chambers having a heating function therein. The apparatus also has a common chamber through which said plurality of evacuable treatment chambers are connected to one another, and a transportation means provided in said common chamber for transporting a substrate between each treatment chamber.Type: ApplicationFiled: September 17, 2008Publication date: January 29, 2009Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hisashi Ohtani, Hiroyuki Shimada, Mitsunori Sakama, Hisashi Abe, Satoshi Teramoto
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Patent number: 7452794Abstract: A substrate processing apparatus includes a plurality of evacuable treatment chambers connected to one another via an evacuable common chamber, and the common chamber is provided with means for transporting a substrate between each treatment chamber. More specifically, a substrate processing apparatus includes a plurality of evacuable treatment chambers, at least one of said treatment chambers having a film formation function through a vapor phase reaction therein, at least one of said treatment chambers having an annealing function with light irradiation and at least one of said treatment chambers having a heating function therein. The apparatus also has a common chamber through which said plurality of evacuable treatment chambers are connected to one another, and a transportation means provided in said common chamber for transporting a substrate between each treatment chamber.Type: GrantFiled: March 26, 2007Date of Patent: November 18, 2008Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hisashi Ohtani, Hiroyuki Shimada, Mitsunori Sakama, Hisashi Abe, Satoshi Teramoto
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Publication number: 20080156399Abstract: A super carburized, low-distortion quenched member with higher performance and minimized heat-treatment distortion is provided. A process for the production thereof includes a primary treatment and a secondary treatment. The primary treatment includes heating a steel member for a machine structure to a temperature within an austenite region by vacuum carburizing (low-pressure carburizing) to have carbon dissolved at least at a eutectoid carbon concentration of a surface layer portion of the member and then quenching the member to have at least one of ultrafine carbide and nuclei of the carbide formed in the surface layer portion of the member. The secondary treatment includes subsequently heating and soaking the member to a temperature within the austenite region and then conducting rapid quenching to have ultrafine carbide precipitated in an outermost surface layer portion.Type: ApplicationFiled: February 8, 2006Publication date: July 3, 2008Inventors: Isao Machida, Hisashi Abe, Toshio Fukushima, Koji Horikiri
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Patent number: 7374938Abstract: A method for producing non-cellulosic callose fiber by using plant protoplast, which imposes less burden to the environment with reduced energy consumption compared to conventional natural fibers is provided; it comprises the addition of an inorganic ion to a plant protoplast cultivation system, which leads the plant protoplast to produce non-cellulosic callose fiber.Type: GrantFiled: March 30, 2001Date of Patent: May 20, 2008Assignees: Japan Science and Technology Corporation, National Institute of Agrobiological Sciences, Forestry and Forest Products Research InstituteInventors: Tetsuo Kondou, Jun Magoshi, Hisashi Abe, Hamako Sasamoto
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Patent number: 7271082Abstract: A substrate processing apparatus includes a plurality of evacuable treatment chambers connected to one another via an evacuable common chamber, and the common chamber is provided with means for transporting a substrate between each treatment chamber. More specifically, a substrate processing apparatus includes a plurality of evacuable treatment chambers, at least one of said treatment chambers having a film formation function through a vapor phase reaction therein, at least one of said treatment chambers having an annealing function with light irradiation and at least one of said treatment chambers having a heating function therein. The apparatus also has a common chamber through which said plurality of evacuable treatment chambers are connected to one another, and a transportation means provided in said common chamber for transporting a substrate between each treatment chamber.Type: GrantFiled: June 7, 2002Date of Patent: September 18, 2007Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hisashi Ohtani, Hiroyuki Shimada, Mitsunori Sakama, Hisashi Abe, Satoshi Teramoto
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Publication number: 20070173046Abstract: A substrate processing apparatus includes a plurality of evacuable treatment chambers connected to one another via an evacuable common chamber, and the common chamber is provided with means for transporting a substrate between each treatment chamber. More specifically, a substrate processing apparatus includes a plurality of evacuable treatment chambers, at least one of said treatment chambers having a film formation function through a vapor phase reaction therein, at least one of said treatment chambers having an annealing function with light irradiation and at least one of said treatment chambers having a heating function therein. The apparatus also has a common chamber through which said plurality of evacuable treatment chambers are connected to one another, and a transportation means provided in said common chamber for transporting a substrate between each treatment chamber.Type: ApplicationFiled: March 26, 2007Publication date: July 26, 2007Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hisashi Ohtani, Hiroyuki Shimada, Mitsunori Sakama, Hisashi Abe, Satoshi Teramoto
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Patent number: 7150669Abstract: A second planarization insulating layer disposed under an organic EL layer is heat-treated so as to bring the moisture content thereof to an extremely low level. By lowering this moisture content to 77 ng/cm3 or below, an organic EL panel can be realized where the degradation of luminescence characteristics is minimized. As an alternative method of reducing the adverse effect of moisture content on the organic EL layer, a reforming processing or coating processing may be performed on the second planarization insulating layer.Type: GrantFiled: March 5, 2003Date of Patent: December 19, 2006Assignee: Sanyo Electric Co., Ltd.Inventors: Hisashi Abe, Koji Suzukii, Isao Hasegawa
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Publication number: 20050176221Abstract: In a plasma CVD apparatus, unnecessary discharge such as arc discharge is prevented, the amount of particles due to peeling of films attached to a reaction chamber is reduced, and the percentage of a time contributing to production in hours of operation of the apparatus is increased while enlargement of the apparatus and easy workability are maintained. The plasma CVD apparatus is configured such that in a conductive reaction chamber 104 with a power source 113, a vacuum exhausting means 118, and a reaction gas introduction pipe 114, plasma 115 is generated in a space surrounded by an electrode 111, a substrate holder 112, and an insulator 120.Type: ApplicationFiled: April 11, 2005Publication date: August 11, 2005Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama, Mitsunori Sakama, Hisashi Abe, Hiroshi Uehara, Mika Ishiwata
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Publication number: 20050073250Abstract: An apparatus for improving testability of electroluminescent displays (ELDs) is provided, incorporating at least two sets of electrodes, one set for connecting rows of pixels, and a second set for connecting columns of pixels, wherein at least one electrode set is interleaved in two subsets. The first subset has electrode extensions of a first length, and the second subset has electrode extensions of a second, shorter, length. A first connector is disposed generally in a direction perpendicular to the electrode extensions of both subsets and in electrical contact with the electrode extensions of the second subset. A second connector is disposed generally in a direction perpendicular to the electrode extensions of the first subset, and in electrical contact with the electrode extensions of only the first subset. A set of insulating patches separate the electrode extensions of the first subset from the first connector.Type: ApplicationFiled: September 29, 2004Publication date: April 7, 2005Inventors: Hisashi Abe, Derek Luke