Patents by Inventor Hisashi Abe
Hisashi Abe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20030209976Abstract: A second planarization insulating layer disposed under an organic EL layer is heat-treated so as to bring the moisture content thereof to an extremely low level. By lowering this moisture content to 77 ng/cm3 or below, an organic EL panel can be realized where the degradation of luminescence characteristics is minimized. As an alternative method of reducing the adverse effect of moisture content on the organic EL layer, a reforming processing or coating processing may be performed on the second planarization insulating layer.Type: ApplicationFiled: March 5, 2003Publication date: November 13, 2003Inventors: Hisashi Abe, Koji Suzukii, Isao Hasegawa
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Publication number: 20030157663Abstract: A method for producing non-cellulosic callose fiber by using plant protoplast, which imposes less burden to the environment with reduced energy consumption compared to conventional natural fibers is provided; it comprises the addition of an inorganic ion to a plant protoplast cultivation system, which leads the plant protoplast to produce non-cellulosic callose fiber.Type: ApplicationFiled: March 13, 2003Publication date: August 21, 2003Inventors: Tetsuo Kondou, Jun Magoshi, Hisashi Abe, Hamako Sasamoto
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Publication number: 20030066485Abstract: In a plasma CVD apparatus, unnecessary discharge such as arc discharge is prevented, the amount of particles due to peeling of films attached to a reaction chamber is reduced, and the percentage of a time contributing to production in hours of operation of the apparatus is increased while enlargement of the apparatus and easy workability are maintained. The plasma CVD apparatus is configured such that in a conductive reaction chamber 104 with a power source 113, a vacuum exhausting means 118, and a reaction gas introduction pipe 114, plasma 115 is generated in a space surrounded by an electrode 111, a substrate holder 112, and an insulator 120.Type: ApplicationFiled: November 25, 2002Publication date: April 10, 2003Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama, Mitsunori Sakama, Hisashi Abe, Hiroshi Uehara, Mika Ishiwata
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Patent number: 6499427Abstract: In a plasma CVD apparatus, unnecessary discharge such as arc discharge is prevented, the amount of particles due to peeling of films attached to a reaction chamber is reduced, and the percentage of a time contributing to production in hours of operation of the apparatus is increased while enlargement of the apparatus and easy workability are maintained. The plasma CVD apparatus is configured such that in a conductive reaction chamber 104 with a power source 113, a vacuum exhausting means 118, and a reaction gas introduction pipe 114, plasma 115 is generated in a space surrounded by an electrode 111, a substrate holder 112, and an insulator 120.Type: GrantFiled: August 24, 2001Date of Patent: December 31, 2002Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama, Mitsunori Sakama, Hisashi Abe, Hiroshi Uehara, Mika Ishiwata
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Publication number: 20020197760Abstract: A substrate processing apparatus includes a plurality of evacuable treatment chambers connected to one another via an evacuable common chamber, and the common chamber is provided with means for transporting a substrate between each treatment chamber. More specifically, a substrate processing apparatus includes a plurality of evacuable treatment chambers, at least one of said treatment chambers having, a film formation function through a vapor phase reaction therein, at least one of said treatment chambers having an annealing function with light irradiation and at least one of said treatment chambers having a heating function therein. The apparatus also has a common chamber through which said plurality of evacuable treatment chambers are connected to one another, and a transportation means provided in said common chamber for transporting a substrate between each treatment chamber.Type: ApplicationFiled: June 7, 2002Publication date: December 26, 2002Applicant: Semiconductor Energy Laboratory co., Ltd.Inventors: Shunpei Yamazaki, Hisashi Ohtani, Hiroyuki Shimada, Mitsunori Sakama, Hisashi Abe, Satoshi Teramoto
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Patent number: 6482752Abstract: A substrate processing apparatus includes a plurality of evacuable treatment chambers connected to one another via an evacuable common chamber, and the common chamber is provided with means for transporting a substrate between each treatment chamber. More specifically, a substrate processing apparatus includes a plurality of evacuable treatment chambers, at least one of said treatment chambers having a film formation function through a vapor phase reaction therein, at least one of said treatment chambers having an annealing function with light irradiation and at least one of said treatment chambers having a heating function therein. The apparatus also has a common chamber through which said plurality of evacuable treatment chambers are connected to one another, and a transportation means provided in said common chamber for transporting a substrate between each treatment chamber.Type: GrantFiled: July 24, 1996Date of Patent: November 19, 2002Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hisashi Ohtani, Hiroyuki Shimada, Mitsunori Sakama, Hisashi Abe, Satoshi Teramoto
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Patent number: 6288412Abstract: A method of manufacturing a polycrystalline silicon film having a particular field effect mobility is disclosed. A first polycrystalline silicon film is formed on a transparent insulation substrate. The surface of the silicon film is oxidized, and an amorphous silicon film is formed on the first polycrystalline silicon film and oxide layer. The amorphous silicon film is subjected to a solid phase growth process to be converted to a second polycrystalline silicon film. The field effect mobility of the second polycrystalline silicon film can be adjusted to a desired value by controlling the relative thicknesses of the first and second polycrystalline silicon films.Type: GrantFiled: November 19, 1997Date of Patent: September 11, 2001Assignee: Sanyo Electric Co., Ltd.Inventors: Hiroki Hamada, Kiichi Hirano, Nobuhiro Gouda, Hisashi Abe, Eiji Taguchi, Nobuhiko Oda, Yoshihiro Morimoto
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Patent number: 6283060Abstract: In a plasma CVD apparatus, unnecessary discharge such as arc discharge is prevented, the amount of particles due to peeling of films attached to a reaction chamber is reduced, and the percentage of a time contributing to production in hours of operation of the apparatus is increased while enlargement of the apparatus and easy workability are maintained. The plasma CVD apparatus is configured such that in a conductive reaction chamber 104 with a power source 113, a vacuum exhausting means 118, and a reaction gas introduction pipe 114, plasma 115 is generated in a space surrounded by an electrode 111, a substrate holder 112, and an insulator 120.Type: GrantFiled: April 30, 1998Date of Patent: September 4, 2001Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama, Mitsunori Sakama, Hisashi Abe, Hiroshi Uehara, Mika Ishiwata
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Patent number: 6281057Abstract: A method is obtained of manufacturing a semiconductor device including a semiconductor layer with high field-effect mobility. According to the semiconductor device manufacturing method, a semiconductor layer is formed on a substrate and then the semiconductor layer is irradiated with high energy beam. Then, a heat treatment is provided under a temperature condition capable of reducing the surface roughness of the semiconductor layer. The radiation of high energy beam toward the semiconductor layer improves the crystalinity of the semiconductor layer and the subsequent heat treatment reduces the surface roughness of the semiconductor layer to enhance the field-effect mobility of the semiconductor layer.Type: GrantFiled: January 9, 1998Date of Patent: August 28, 2001Assignee: Sanyo Electric Co., Ltd.Inventors: Yoichiro Aya, Tomoyuki Nouda, Yasuo Nakahara, Naoya Sotani, Hisashi Abe, Hiroki Hamada
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Publication number: 20010003659Abstract: A method is obtained of manufacturing a semiconductor device including a semiconductor layer with high field-effect mobility. According to the semiconductor device manufacturing method, a semiconductor layer is formed on a substrate and then the semiconductor layer is irradiated with high energy beam. Then, a heat treatment is provided under a temperature condition capable of reducing the surface roughness of the semiconductor layer. The radiation of high energy beam toward the semiconductor layer improves the crystalinity of the semiconductor layer and the subsequent heat treatment reduces the surface roughness of the semiconductor layer to enhance the field-effect mobility of the semiconductor layer.Type: ApplicationFiled: January 9, 1998Publication date: June 14, 2001Inventors: YOICHIRO AYA, TOMOYUKI NOUDA, YOSUO NAKAHARA, NAOYA SOTANI, HISASHI ABE, HIROKI HAMADA
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Patent number: 5721601Abstract: A liquid crystal display unit is described, which includes a first substrate, a second substrate opposing to the first substrate, pixel driving elements, first and second insulation layers, a planarizing film and a liquid crystal layer. The pixel driving elements are disposed on the first substrate and between the first and second substrates. The first insulation layer is deposited over the first substrate and the pixel driving elements. The planarizing film is formed on the first insulation layer. This planarizing film provides a substantially flat surface over the first substrate to minimize a height of a step present between an area corresponding to each pixel driving element and an area locating adjacent to the pixel driving element on the first substrate. The second insulation layer is formed on the planarizing film. The display electrodes are formed on the second insulation layer and electrically connected to the pixel driving elements, respectively.Type: GrantFiled: September 22, 1995Date of Patent: February 24, 1998Assignee: Sanyo Electric Co., Ltd.Inventors: Toshifumi Yamaji, Kou Masahara, Nobuhiko Oda, Koji Suzuki, Shiro Nakanishi, Hisashi Abe, Kiyoshi Yoneda, Yoshihiro Morimoto
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Patent number: 5707882Abstract: A method of manufacturing a polycrystalline silicon film having a particular field effect mobility is disclosed. A first polycrystalline silicon film is formed on a transparent insulation substrate. The surface of the silicon film is oxidized, and an amorphous silicon film is formed on the first polycrystalline silicon film and oxide layer. The amorphous silicon film is subjected to a solid phase growth process to be converted to a second polycrystalline silicon film. The field effect mobility of the second polycrystalline silicon film can be adjusted to a desired value by controlling the relative thicknesses of the first and second polycrystalline silicon films.Type: GrantFiled: January 23, 1995Date of Patent: January 13, 1998Assignee: Sanyo Electric Co., Ltd.Inventors: Hiroki Hamada, Kiichi Hirano, Nobuhiro Gouda, Hisashi Abe, Eiji Taguchi, Nobuhiko Oda, Yoshihiro Morimoto
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Patent number: 5330578Abstract: A plasma gaseous reaction apparatus including a reaction chamber, a system for supplying reaction gas to the reaction chamber and an exhaust system for exhausting unnecessary reaction products. Specifically, the apparatus includes a pair of facing electrodes disposed in the reaction chamber which are covered by shields except the area in which the electrodes face each other. The shields may include a first and second shield wherein the inner first shield is electrically insulated from the electrodes and the outer second shield is kept at earth potential. The apparatus further includes a substrate container for supporting substrates which surrounds the substrates by a frame. The outside of the substrate container is kept in the earth potential and is covered by a conductor plate electrically insulated from the container. The shields and substrate container are configured such that plasma generated by electric power supplied by the electrodes is confined in a space surrounded by the shields and the container.Type: GrantFiled: March 11, 1992Date of Patent: July 19, 1994Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Mitsunori Sakama, Takeshi Fukada, Mitsuhiro Ichijo, Hisashi Abe