Abstract: Described are semiconductor devices, methods of manufacturing, and methods for device patterning. More particularly, a subtractive interconnect patterning method is described. A subtractive interconnect patterning is used in place of damascene interconnect patterning.

Abstract: Methods of forming and processing semiconductor devices which utilize the selective etching of aluminum oxide over silicon oxide, silicon nitride, aluminum oxide or zirconium oxide are described. Certain embodiments relate to the formation of self-aligned contacts for metal gate applications.

Abstract: Apparatuses and methods to provide a patterned substrate are described. A plurality of patterned and spaced first lines and carbon material lines and formed on the substrate surface by selectively depositing and etching films extending in a first direction and films extending in a second direction that crosses the first direction to pattern the underlying structures.

Abstract: A method of forming an interconnect structure for semiconductor devices is described. The method comprises etching a patterned interconnect stack for form first conductive lines and expose a top surface of a first etch stop layer; etching the first etch stop layer to form second conductive lines and expose a top surface of a barrier layer; and forming a self-aligned via.

Abstract: Extreme ultraviolet (EUV) hard masks and methods for their manufacture are disclosed. The EUV hardmasks comprise a substrate, a multilayer stack of alternating reflective layers on the substrate, and a photoresist layer on the multilayer stack. The alternating reflective layers comprise silicon and a nonmetal. Methods of transferring a pattern to a substrate are also disclosed.

Abstract: Apparatuses and methods to provide a fully self-aligned via are described. A first metallization layer comprises a set of first conductive lines extending along a first direction on a first insulating layer on a substrate, the set of first conductive lines recessed below a top portion of the first insulating layer. A capping layer is on the first insulating layer, and a second insulating layer is on the capping layer. A second metallization layer comprises a set of second conductive lines on the second insulating layer and on a third insulating layer above the first metallization layer. The set of second conductive lines extend along a second direction that crosses the first direction at an angle. At least one via is between the first metallization layer and the second metallization layer. The via is self-aligned along the second direction to one of the first conductive lines. The tapering angle of the via opening may be in a range of from about 60° to about 120°.

Abstract: Described are semiconductor devices, methods of manufacturing, and methods for device patterning. More particularly, a subtractive interconnect patterning method is described. A subtractive interconnect patterning is used in place of damascene interconnect patterning.

Abstract: Apparatuses and methods to provide a patterned substrate are described. A plurality of patterned and spaced first lines and carbon material lines and formed on the substrate surface by selectively depositing and etching films extending in a first direction and films extending in a second direction that crosses the first direction to pattern the underlying structures.

Abstract: Methods of forming and processing semiconductor devices are described. Certain embodiments relate to the formation of self-aligned DRAM capacitors. More particularly, certain embodiments relate to the formation of self-aligned DRAM capacitors utilizing the formation of self-aligned growth pillars. The pillars lead to greater capacitor heights, increase critical dimension uniformity, and self-aligned bottom and top contacts.

Abstract: Apparatuses and methods to provide a fully self-aligned via are described. Some embodiments of the disclosure provide an electronic device having a liner that is selectively removable when compared to conductive lines. The liner may be selectively removed by utilizing one or more of a base (e.g. sodium hydroxide) and hydrogen peroxide.

Abstract: A method of supplying a chemical solution to a photolithography system. The chemical solution is pumped from a variable-volume buffer tank. The pumped chemical solution is dispensed in a spin-coater. The variable-volume buffer tank is refilled by emptying a storage container filled with the chemical solution into the variable-volume buffer tank.

Abstract: A first metallization layer comprising a set of first conductive lines that extend along a first direction on a first insulating layer on a substrate. A second insulating layer is on the first insulating layer. A second metallization layer comprises a set of second conductive lines on a third insulating layer and on the second insulating layer above the first metallization layer. The set of second conductive lines extend along a second direction that crosses the first direction at an angle. A via between the first metallization layer and the second metallization layer. The via is self-aligned along the second direction to one of the first conductive lines.

Abstract: Methods and apparatus to form fully self-aligned vias are described. A seed gapfill layer is formed on a recessed first insulating layers positioned between first conductive lines. Pillars are formed from the seed gapfill layer and a second insulating layer is deposited in the gaps between pillars. The pillars are removed and a third insulating layer is deposited in the gaps in the second insulating layer to form an overburden of third insulating layer. A portion of the overburden of the third insulating layer is removed to expose the first conductive lines and form vias.

Abstract: Methods of forming a self-aligned via comprising recessing a first metallization layer comprising a set of first conductive lines that extend along a first direction on a first insulating layer on a substrate. A second insulating layer is formed on the first insulating layer. A via is formed through the second insulating layer to one of the first conductive lines. Semiconductor devices comprising the self-aligned via and apparatus for forming the self-aligned via are also disclosed.

Abstract: A photolithography system includes a variable-volume buffer tank, a dispensing system connected to the buffer tank, and a valve configured to release gas from a head space of the buffer tank while blocking the release of liquid from the head space. A storage container has an opening at the bottom and drains to the buffer tank through that opening. The buffer tank has a storage capacity sufficient to receive the full contents of the storage container. The system supplies chemical solutions to the dispensing system while keeping the chemical solutions from contact with air and other gases.

Abstract: Apparatuses and methods to provide a patterned substrate are described. A plurality of patterned and spaced first lines and carbon material lines and formed on the substrate surface by selectively depositing and etching films extending in a first direction and films extending in a second direction that crosses the first direction to pattern the underlying structures.

Abstract: Methods and film stacks for extreme ultraviolet (EUV) lithography are described. The film stack comprises a substrate with a hard mask, bottom layer, middle layer and photoresist. Etching of the photoresist is highly selective to the middle layer and a modification of the middle layer allows for a highly selective etch relative to the bottom layer.

Abstract: Methods of forming semiconductor devices comprising etching a hardmask and spin-on-carbon layer through an opening in a photoresist to expose a gapfill material. The photoresist, spin-on-carbon layer and gapfill material are removed. A new spin-on-carbon layer, hardmask and photoresist are formed with an opening over a spacer mandrel. The hardmask, spin-on-carbon layer are etched through the opening and the layers and spacer mandrel are removed. An etch stop layer and oxide layer are removed and a height of the spacer mandrel and gapfill material are reduced exposing portions of the substrate. The exposed portions of the substrate are fin etched and the layers removed.

Abstract: Methods and apparatus to form fully self-aligned vias are described. A first metal film is formed in the recessed first conductive lines and on the first insulating layer of a substrate comprising alternating conductive lines and a first insulating layer. Pillars and a sheet are formed from the first metal film. Some of the pillars and a portion of the sheet are selectively removed and a second insulating layer is deposited around the remaining pillars and sheet. The remaining pillars and sheet are removed to form vias and a trench in the second insulating layer. A third insulating layer is deposited in the vias and trench and an overburden is formed on the second insulating layer. Portions of the overburden are selectively etched from the second insulating layer to expose the second insulating layer and the filled vias and leaving portions of the third insulating layer on the second insulating layer.

Abstract: Apparatuses and methods to provide a fully self-aligned via are described. Some embodiments of the disclosure provide an electronic device having a liner that is selectively removable when compared to conductive lines. The liner may be selectively removed by utilizing one or more of a base (e.g. sodium hydroxide) and hydrogen peroxide.