Patents by Inventor Hooman Darabi

Hooman Darabi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10715202
    Abstract: The present disclosure is directed to an apparatus and method for cancelling self-interference caused by full-duplex communication. In a full-duplex communication device, the receiver will generally experience significant self-interference from the full-duplex communication device's own transmitter transmitting a strong outbound signal over the same channel that the receiver is to receive a weak inbound signal. The apparatus and method are configured to adjust a phase and gain of the outbound signal provided at the output of a power amplifier (PA) and inject the phase and gain adjusted outbound signal at the input of a low-noise amplifier (LNA) to cancel the interference from the outbound signal in the inbound signal.
    Type: Grant
    Filed: January 16, 2019
    Date of Patent: July 14, 2020
    Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: Alex Mirzaei, Hooman Darabi
  • Publication number: 20200162084
    Abstract: In some aspects, the disclosure is directed to methods and systems for utilizing a thin-film bulk acoustic resonator (FBAR) as a frequency reference for a phase-locked loop (PLL) circuit controlling frequency of a voltage controlled oscillator (VCO). In some implementations, the FBAR-based oscillator may be used as a reference to an analog or digital PLL circuit (either directly, or divided to a lower frequency). In other implementations, the FBAR-based oscillator may be used as a reference to a mixing-based PLL rather than a dividing-based PLL. Through these implementations, the noise contribution of many of the PLL circuit components or elements may be reduced (e.g. noise from a delta-sigma modulator (DSM), multiple modulus divider (MMD), phase frequency detector (PFD)/charge pump (CP), etc.).
    Type: Application
    Filed: November 12, 2019
    Publication date: May 21, 2020
    Inventors: Hooman DARABI, David MURPHY, Arya BEHZAD, Dihang YANG, Hung-Ming CHIEN, Choong Yul CHA
  • Patent number: 10644681
    Abstract: A circuit for providing a fractional divider/multiplier using harmonic recombination may include a power amplifier, an oscillator coupled to the power amplifier, and a divider coupled to the oscillator. In one or more implementations, the divider is configured to generate one or more phases of a harmonic from the oscillator to reduce signal interference from the power amplifier. In one or more implementations, the divider includes a divide-by-M divider, where M is a positive integer, and an array of transconductance cells coupled to the output of the divide-by-M divider. In one or more implementations, the divider includes an inductor or a filter coupled to the output of the array of transconductance cells. In one or more implementations, the oscillator includes a logical gate and a resistor-capacitor circuit coupled in series feedback with a multi-stage ring oscillator. The oscillator may include a divider coupled to the multi-stage ring oscillator.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: May 5, 2020
    Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: David Patrick Murphy, Xiongchuan Huang, Hooman Darabi
  • Patent number: 10531506
    Abstract: A device includes circuitry configured to implement one or more PHY communications protocols to simultaneously communicate with one or more stations via communication links on one or more wireless networks, communicate with additional devices via a backhaul network, and exchange collaboration data, including at least one of protocol data or collaborative beamforming data, with the additional devices via the backhaul network to maintain signal parameters of communications signals with the one or more stations.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: January 7, 2020
    Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: David C. Garrett, Franciscus Van Der Goes, Hooman Darabi, Ramon A. Gomez, Murat Mese
  • Patent number: 10396748
    Abstract: A linear, low noise, high quality factor (Q) and widely tunable notch filter circuit includes one or more first reactive elements coupled between a first filter node and a first node. The notch filter circuit further includes a multi-branch circuit having multiple parallel branches and coupled between the first node and a second node. Each branch of the multi-branch circuit includes at least a switch coupled to a variable capacitor. A notch frequency of the notch filter circuit is tunable by adjusting a capacitance of the variable capacitor.
    Type: Grant
    Filed: October 11, 2017
    Date of Patent: August 27, 2019
    Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: Milad Darvishi, Hooman Darabi, Arya Reza Behzad
  • Publication number: 20190222252
    Abstract: The present disclosure is directed to an apparatus and method for cancelling self-interference caused by full-duplex communication. In a full-duplex communication device, the receiver will generally experience significant self-interference from the full-duplex communication device's own transmitter transmitting a strong outbound signal over the same channel that the receiver is to receive a weak inbound signal. The apparatus and method are configured to adjust a phase and gain of the outbound signal provided at the output of a power amplifier (PA) and inject the phase and gain adjusted outbound signal at the input of a low-noise amplifier (LNA) to cancel the interference from the outbound signal in the inbound signal.
    Type: Application
    Filed: January 16, 2019
    Publication date: July 18, 2019
    Applicant: Avago Technologies International Sales Pte. Limited
    Inventors: Alex MIRZAEI, Hooman DARABI
  • Publication number: 20190109575
    Abstract: A linear, low noise, high quality factor (Q) and widely tunable notch filter circuit includes one or more first reactive elements coupled between a first filter node and a first node. The notch filter circuit further includes a multi-branch circuit having multiple parallel branches and coupled between the first node and a second node. Each branch of the multi-branch circuit includes at least a switch coupled to a variable capacitor. A notch frequency of the notch filter circuit is tunable by adjusting a capacitance of the variable capacitor.
    Type: Application
    Filed: October 11, 2017
    Publication date: April 11, 2019
    Inventors: Milad DARVISHI, Hooman DARABI, Arya Reza BEHZAD
  • Patent number: 10205438
    Abstract: According to one embodiment, a compact low-power receiver comprises first and second analog circuits connected by a digitally controlled interface circuit. The first analog circuit has a first direct-current (DC) offset and a first common mode voltage at an output, and the second analog circuit has a second DC offset and a second common mode voltage at an input. The digitally controlled interface circuit connects the output to the input, and is configured to match the first and second DC offsets and to match the first and second common mode voltages. In one embodiment, the first analog circuit is a variable gain control transimpedance amplifier (TIA) implemented using a current mode buffer, the second analog circuit is a second-order adjustable low-pass filter, whereby a three-pole adjustable low-pass filter in the compact low-power receiver is effectively produced.
    Type: Grant
    Filed: February 8, 2017
    Date of Patent: February 12, 2019
    Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: Mohyee Mikhemar, Amir Hadji-Abdolhamid, Hooman Darabi
  • Patent number: 10200080
    Abstract: The present disclosure is directed to an apparatus and method for cancelling self-interference caused by full-duplex communication. In a full-duplex communication device, the receiver will generally experience significant self-interference from the full-duplex communication device's own transmitter transmitting a strong outbound signal over the same channel that the receiver is to receive a weak inbound signal. The apparatus and method are configured to adjust a phase and gain of the outbound signal provided at the output of a power amplifier (PA) and inject the phase and gain adjusted outbound signal at the input of a low-noise amplifier (LNA) to cancel the interference from the outbound signal in the inbound signal.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: February 5, 2019
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Alex Mirzaei, Hooman Darabi
  • Patent number: 10135482
    Abstract: A wireless communication device includes a first circuit including a baseband circuit and a radio circuit, and at least one frontend module (FEM) remote from the first circuit and placed in close proximity to and coupled to at least one radio-frequency (RF) antenna. The FEM is coupled to the first circuit via interface circuitry. An FEM comprises a frontend (FE) circuit including one or more low-noise amplifiers (LNAs), one or more power amplifiers (PAs), and at least one of a multi-pole switch and a multiplexer. The multi-pole switch and the multiplexer being implemented on a first side of the FEM coupled to the interface circuitry. The interface circuitry includes at least some of filters, splitters, multi-pole switches, and multiplexers to reduce a count of interconnect routes to the at least one FEM.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: November 20, 2018
    Assignee: Avago Technologies General IP (Singapore) PTE. LTD.
    Inventors: Andrew Robert Adams, Ali Afsahi, Arya Reza Behzad, Keith Andrews Carter, Hooman Darabi, Rohit V. Gaikwad, Dandan Li, Jianping Peng, Jacob Jude Rael, Tirdad Sowlati
  • Publication number: 20180241379
    Abstract: A circuit for providing a fractional divider/multiplier using harmonic recombination may include a power amplifier, an oscillator coupled to the power amplifier, and a divider coupled to the oscillator. In one or more implementations, the divider is configured to generate one or more phases of a harmonic from the oscillator to reduce signal interference from the power amplifier. In one or more implementations, the divider includes a divide-by-M divider, where M is a positive integer, and an array of transconductance cells coupled to the output of the divide-by-M divider. In one or more implementations, the divider includes an inductor or a filter coupled to the output of the array of transconductance cells. In one or more implementations, the oscillator includes a logical gate and a resistor-capacitor circuit coupled in series feedback with a multi-stage ring oscillator. The oscillator may include a divider coupled to the multi-stage ring oscillator.
    Type: Application
    Filed: October 31, 2017
    Publication date: August 23, 2018
    Inventors: David Patrick MURPHY, Coby HUANG, Hooman DARABI
  • Patent number: 10027358
    Abstract: A receiver includes circuitry configured to determine one or more first local oscillator (LO) harmonics that correspond to one or more first spectrum segments of a down-converted received signal based on characteristics of the received signal. The one or more first LO harmonics of the received signal are amplified by applying one or more first transconductance coefficients to one or more first harmonic selective transinductance amplifiers (TIAs) corresponding to the one or more first spectrum segments. Digitized outputs of the plurality of harmonic selective TIAs are calibrated based on an amount of signal leakage between the plurality of spectrum segments of the down-converted received signal.
    Type: Grant
    Filed: August 18, 2016
    Date of Patent: July 17, 2018
    Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
    Inventors: Hao Wu, David Patrick Murphy, Hooman Darabi
  • Patent number: 9985671
    Abstract: A device includes circuitry configured to detect one or more properties of an image signal based on outputs from one or more (analog-to-digital converter) ADC configurations of a transceiver, determine a VCO frequency corresponding to an ADC sampling frequency independently from a carrier frequency, and control the VCO frequency of at least one of a transmitter or receiver based on the one or more properties of the image signal.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: May 29, 2018
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: David C. Garrett, Franciscus Van Der Goes, Hooman Darabi, Ramon A. Gomez
  • Publication number: 20180145719
    Abstract: The present disclosure is directed to an apparatus and method for cancelling self-interference caused by full-duplex communication. In a full-duplex communication device, the receiver will generally experience significant self-interference from the full-duplex communication device's own transmitter transmitting a strong outbound signal over the same channel that the receiver is to receive a weak inbound signal. The apparatus and method are configured to adjust a phase and gain of the outbound signal provided at the output of a power amplifier (PA) and inject the phase and gain adjusted outbound signal at the input of a low-noise amplifier (LNA) to cancel the interference from the outbound signal in the inbound signal.
    Type: Application
    Filed: October 24, 2017
    Publication date: May 24, 2018
    Applicant: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Alex MIRZAEI, Hooman Darabi
  • Publication number: 20180048339
    Abstract: A receiver includes circuitry configured to determine one or more first local oscillator (LO) harmonics that correspond to one or more first spectrum segments of a down-converted received signal based on characteristics of the received signal. The one or more first LO harmonics of the received signal are amplified by applying one or more first transconductance coefficients to one or more first harmonic selective transinductance amplifiers (TIAs) corresponding to the one or more first spectrum segments. Digitized outputs of the plurality of harmonic selective TIAs are calibrated based on an amount of signal leakage between the plurality of spectrum segments of the down-converted received signal.
    Type: Application
    Filed: August 18, 2016
    Publication date: February 15, 2018
    Applicant: BROADCOM CORPORATION
    Inventors: Hao WU, David Patrick MURPHY, Hooman DARABI
  • Patent number: 9825665
    Abstract: The present disclosure is directed to an apparatus and method for cancelling self-interference caused by full-duplex communication. In a full-duplex communication device, the receiver will generally experience significant self-interference from the full-duplex communication device's own transmitter transmitting a strong outbound signal over the same channel that the receiver is to receive a weak inbound signal. The apparatus and method are configured to adjust a phase and gain of the outbound signal provided at the output of a power amplifier (PA) and inject the phase and gain adjusted outbound signal at the input of a low-noise amplifier (LNA) to cancel the interference from the outbound signal in the inbound signal.
    Type: Grant
    Filed: May 27, 2015
    Date of Patent: November 21, 2017
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Alex Mirzaei, Hooman Darabi
  • Publication number: 20170279479
    Abstract: A wireless communication device includes a first circuit including a baseband circuit and a radio circuit, and at least one frontend module (FEM) remote from the first circuit and placed in close proximity to and coupled to at least one radio-frequency (RF) antenna. The FEM is coupled to the first circuit via interface circuitry. An FEM comprises a frontend (FE) circuit including one or more low-noise amplifiers (LNAs), one or more power amplifiers (PAs), and at least one of a multi-pole switch and a multiplexer. The multi-pole switch and the multiplexer being implemented on a first side of the FEM coupled to the interface circuitry. The interface circuitry includes at least some of filters, splitters, multi-pole switches, and multiplexers to reduce a count of interconnect routes to the at least one FEM.
    Type: Application
    Filed: March 20, 2017
    Publication date: September 28, 2017
    Inventors: Andrew Robert ADAMS, Ali AFSAHI, Arya Reza BEHZAD, Keith Andrews CARTER, Hooman DARABI, Rohit V. GAIKWAD, Dandan LI, Jianping PENG, Jacob Jude RAEL, Tirdad SOWLATI
  • Patent number: 9749119
    Abstract: Embodiments of a four-port isolation module are presented herein. In an embodiment, the isolation module includes a step-up autotransformer comprising a first and second winding that are electrically coupled in series at a center node. The first port of the isolation module is configured to couple an antenna to a first end node of the series coupled windings. The second port of the isolation module is configured to couple a balancing network to a second end node of the series coupled windings. The third port is configured to couple a transmit path to the center node. The fourth port is configured to couple a differential receive path across the first end node and the second end node. The isolation module effectively isolates the third port from the fourth port to prevent strong outbound signals received at the third port from saturating an LNA coupled to the fourth port.
    Type: Grant
    Filed: November 18, 2014
    Date of Patent: August 29, 2017
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Mohyee Mikhemar, Hooman Darabi
  • Patent number: 9742353
    Abstract: A circuit for an oscillator with common-mode resonance includes a first oscillator circuit and a second oscillator circuit coupled to the first oscillator circuit. Each of the first oscillator circuit or the second oscillator circuit includes a tank circuit, a cross-coupled transistor pair, and one or more capacitors. The tank circuit is formed by coupling a first inductor with a pair of first capacitors. The cross-coupled transistor pair is coupled to the tank circuit, and one or more second capacitors are coupled to the tank circuit and the cross-coupled transistor pair. Each of the first oscillator circuit or the second oscillator circuit allows tuning of a respective common mode (CM) resonance frequency (FCM) to be at twice a respective differential resonance frequency (FD).
    Type: Grant
    Filed: August 10, 2015
    Date of Patent: August 22, 2017
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: David Patrick Murphy, Hooman Darabi
  • Patent number: 9742367
    Abstract: The present disclosure is directed to a system and method for performing the outphasing technique without using a combiner at the output of two power amplifiers to reduce loss and distortions.
    Type: Grant
    Filed: July 29, 2015
    Date of Patent: August 22, 2017
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Alex Ahmad Mirzaei, Hooman Darabi