Abstract: A core module for a portable computing device includes wireless power receiver circuitry, battery power circuitry, power supply circuitry, a processor, and an RF link interface. The wireless power receiver module, when operable, receives a wireless power transmit signal and converts it into a supply voltage. The battery power circuitry, when operable, outputs a battery voltage. The power supply circuitry, when operable, converts the supply voltage or the battery voltage into one or more power supply voltages. The processor is operable to select one of the battery voltage, the supply voltage, and one of the one or more power supply voltages to produce a selected voltage. The RF link interface outputs the selected voltage on to an RF link of the portable computing device for providing power to one or more multi mode RF units within the portable computing device.

Abstract: Because of associated disadvantages of narrow-band off-chip radio-frequency (RF) filtering, a mixer-first receiver front-end designed to tolerate blockers with minimal gain compression and noise factor degradation is disclosed. The mixer-first receiver front-end includes two separate down-conversion paths that help to minimize added noise and voltage gain prior to baseband filtering, which are critical factors in eliminating narrow-band off-chip RF filtering.

Abstract: A circuit for a receiver with reconfigurable low-power or wideband operation may comprise one or more main signal paths each coupled to a first port and including a low-noise amplifier (LNA) configured to provide a radio frequency (RF) signal to a main mixer circuit. An auxiliary signal path may be coupled to a second port. The auxiliary signal path may include an auxiliary mixer configured to provide an on-chip matching input impedance that may match an impedance of the antenna. The first port may be coupled to an RF antenna through an off-chip matching circuit, when a low-power operation is desired. The first port may be coupled to the second port and to the RF antenna, when a wideband operation is desired.

Abstract: Because of associated disadvantages of narrow-band off-chip radio-frequency (RF) filtering, a mixer-first receiver front-end designed to tolerate blockers with minimal gain compression and noise factor degradation is disclosed. The mixer-first receiver front-end includes two separate down-conversion paths that help to minimize added noise and voltage gain prior to baseband filtering, which are critical factors in eliminating narrow-band off-chip RF filtering.

Abstract: A radio front end includes a duplexer, a tunable balancing network, a detector module, and a processing module. The duplexer is operably coupled to an antenna and is operable to provide electrical isolation between an outbound wireless signal and an inbound wireless signal. The tunable balancing network is operably coupled to the duplexer and operable to establish an impedance that substantially matches an impedance of the antenna based on a tuning signal. The detector module is operable to generate an error signal based on an electrical performance characteristic of the duplexer. The processing module is operable to generate the tuning signal based on the error signal.

Abstract: A power distributing duplexer system is provided. In some aspects, the system includes a duplexer configured to couple an antenna to a transmitter and a receiver. The system also includes a balancing network coupled to the duplexer. The balancing network includes a network impedance. The balancing network is configured to adjust the network impedance to match an antenna impedance of the antenna. The balancing network includes a plurality of balancing network modules coupled to the duplexer. Each of the plurality of balancing network modules is configured to receive a portion of an output voltage from the duplexer.

Abstract: A portable computing device includes a radio frequency (RF) wired link, a data wired link, a core module, a plurality of multi-mode RF units, and a plurality of data modules. The core module is operable to communicate control information with one or more of the plurality of multi-mode RF units in a first frequency band via the RF wired link. The core module is further operable to communicate data of a wireless communication with one or more of the plurality of multi-mode RF units in a second frequency band via the RF wired link. The core module is further operable to communicate clock information to the plurality of multi-mode RF units in a third frequency band via the RF wired link.

Abstract: A circuit for a receiver with reconfigurable low-power or wideband operation may comprise one or more main signal paths each coupled to a first port and including a low-noise amplifier (LNA) configured to provide a radio frequency (RF) signal to a main mixer circuit. An auxiliary signal path may be coupled to a second port. The auxiliary signal path may include an auxiliary mixer configured to provide an on-chip matching input impedance that may match an impedance of the antenna. The first port may be coupled to an RF antenna through an off-chip matching circuit, when a low-power operation is desired. The first port may be coupled to the second port and to the RF antenna, when a wideband operation is desired.

Abstract: A core module for a portable computing device includes wireless power receiver circuitry, battery power circuitry, power supply circuitry, a processor, and an RF link interface. The wireless power receiver module, when operable, receives a wireless power transmit signal and converts it into a supply voltage. The battery power circuitry, when operable, outputs a battery voltage. The power supply circuitry, when operable, converts the supply voltage or the battery voltage into one or more power supply voltages. The processor is operable to select one of the battery voltage, the supply voltage, and one of the one or more power supply voltages to produce a selected voltage. The RF link interface outputs the selected voltage on to an RF link of the portable computing device for providing power to one or more multi mode RF units within the portable computing device.

Abstract: An adaptive cancellation circuit and method are provided. The circuit includes a main path and an auxiliary path. The main path includes a first amplifier configured to output a first amplified signal to a first mixer. The main path is configured to output a first signal comprising a wanted signal component and a distortion component. The auxiliary path includes a second amplifier configured to output a second amplified signal to a second mixer. The second mixer is connected to a filter configured to remove the wanted signal component. The auxiliary path is configured to output a second signal including the distortion component.

Abstract: According to one embodiment, a compact low-power receiver comprises first and second analog circuits connected by a digitally controlled interface circuit. The first analog circuit has a first direct-current (DC) offset and a first common mode voltage at an output, and the second analog circuit has a second DC offset and a second common mode voltage at an input. The digitally controlled interface circuit connects the output to the input, and is configured to match the first and second DC offsets and to match the first and second common mode voltages. In one embodiment, the first analog circuit is a variable gain control transimpedance amplifier (TIA) implemented using a current mode buffer, the second analog circuit is a second-order adjustable low-pass filter, whereby a three-pole adjustable low-pass filter in the compact low-power receiver is effectively produced.

Abstract: A circuit for a low-power and blocker-tolerant mixer-amplifier stage may include a complementary mixer formed by transmission gates having complementary structures. The complementary mixer may be configured to receive one or more radio-frequency (RF) signals and to convert the one or more RF signals to intermediate frequency (IF) current signals. A complementary TIA may be coupled to the complementary mixer and may be configured to receive the IF current signals and provide IF voltage signals. The complementary TIA may be formed by coupling an NMOS-TIA and a PMOS-TIA to a common load. A first portion of the complementary mixer may be coupled to the NMOS-TIA and a second portion of the complementary mixer may be coupled to the PMOS-TIA.

Abstract: A radio receiver supporting cancellation of thermal and phase noise in a down-converted RF signal. An inbound RF signal and blocking signal are provided directly to a passive mixer for down-conversion into a first baseband signal having data, thermal noise, and reciprocal mixing (RM) noise components. The inbound signals are also provided to a transconductance circuit, the output of which is provided to a second passive mixer for conversion into a current signal having data and blocking signal components, and a RM image. The blocking signal component and the RM image are mixed with a second LO signal, derived from the blocking signal, to produce a RM noise cancellation signal. The data component of the current signal is converted into a second baseband signal having data and thermal noise components. The first baseband signal, second baseband signal and RM noise cancellation signal are then combined through harmonic recombination.

Abstract: A circuit for a common electrical balance duplexer (EBD) of a multi-path transceiver may include an EBD circuit. The EBD circuit may be coupled to output nodes of two or more transmit (TX) paths, one or more antennas, and input nodes of two or more receive (RX) paths. The EBD circuit may be configured to isolate the TX paths from the RX paths, and to provide low-loss signal paths between the output nodes of the transmit (TX) paths and one or more antennas. One or more balancing networks may be coupled to the EBD circuit to provide one or more impedances, each matching a corresponding impedance associated with one of the antennas. The output nodes of the transmit (TX) paths may include output nodes of a first and a second power amplifier (PA). The first and the second PA may share a matching transformer that is merged with the EBD circuit.

Abstract: A circuit for a low-noise interface between an amplifier and an analog-to-digital converter (ADC) may comprise a capacitor element having a capacitance of C coupled between a first and second output node of the amplifier. A resistor circuit coupled between the capacitor element and input nodes of the ADC. A desired value RL for a load resistance of the amplifier is provided by selecting suitable initial values for resistances of the resistor circuit. A desired bandwidth for the at least one amplifier is achieved by selecting a value of the capacitance C based on the desired value RL for the load resistance.

Abstract: A wireless communication device includes a front-end module (FEM) network coupled to a system on a chip (SOC) via an RF connection. The FEM network includes a plurality of FEMs, wherein, when activated, one or more of the plurality of FEMs is operable to: output an outbound RF signal to one or more antennas; receive an inbound RF signal from the one or more antennas; and isolate the inbound RF signal from the outbound RF signal. The SOC is operable to activate the one or more of the plurality of FEMs; convert outbound data into the outbound RF signal; and convert the inbound RF signal into inbound data.

Abstract: A radio receiver supporting cancellation of thermal and phase noise in a down-converted RF signal. An inbound RF signal and blocking signal are provided directly to a passive mixer for down-conversion into a first baseband signal having data, thermal noise, and reciprocal mixing (RM) noise components. The inbound signals are also provided to a transconductance circuit, the output of which is provided to a second passive mixer for conversion into a current signal having data and blocking signal components, and a RM image. The blocking signal component and the RM image are mixed with a second LO signal, derived from the blocking signal, to produce a RM noise cancellation signal. The data component of the current signal is converted into a second baseband signal having data and thermal noise components. The first baseband signal, second baseband signal and RM noise cancellation signal are then combined through harmonic recombination.

Abstract: A circuit for a large-signal electrical balance duplexer (EBD) may include a circulator that can be configured to couple an output node of a transmit (TX) path to an antenna. An EBD circuit may be coupled to the circulator, at a first port of the EBD circuit. The EBD circuit may be configured to isolate the circulator from one or more input nodes of a receive (RX) path. An attenuator may be coupled between the output node of the TX path and a second port of the EBD circuit. The attenuator may be configured to provide an attenuated signal to the EBD circuit.

Abstract: A circuit for a receiver with reconfigurable low-power or wideband operation may comprise one or more main signal paths each coupled to a first port and including a low-noise amplifier (LNA) configured to provide a radio frequency (RF) signal to a main mixer circuit. An auxiliary signal path may be coupled to a second port. The auxiliary signal path may include an auxiliary mixer configured to provide an on-chip matching input impedance that may match an impedance of the antenna. The first port may be coupled to an RF antenna through an off-chip matching circuit, when a low-power operation is desired. The first port may be coupled to the second port and to the RF antenna, when a wideband operation is desired.

Abstract: A radio frequency (RF) noise-cancelling receiver includes first transconductance cells configured to produce respective weighted current signals proportional to an input voltage signal. The RF receiver includes frequency conversion cells coupled to the first transconductance cells and configured to mix the weighted current signals with a plurality of non-overlapping local oscillator (LO) signals to produce downconverted current signals. The RF receiver includes transimpedance amplifiers coupled to the frequency conversion cells and configured to produce output voltage signals proportional to the downconverted current signals. The transimpedance amplifiers include second transconductance cells.