Patents by Inventor Hsiang Chen

Hsiang Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145250
    Abstract: A method may include forming a dummy dielectric layer over a substrate, and forming a dummy gate over the dummy dielectric layer. The method may also include forming a first spacer adjacent the dummy gate, and removing the dummy gate to form a cavity, where the cavity is defined at least in part by the first spacer. The method may also include performing a plasma treatment on portions of the first spacer, where the plasma treatment causes a material composition of the portions of the first spacer to change from a first material composition to a second material composition. The method may also include etching the portions of the first spacer having the second material composition to remove the portions of the first spacer having the second material composition, and filling the cavity with conductive materials to form a gate structure.
    Type: Application
    Filed: January 12, 2024
    Publication date: May 2, 2024
    Inventors: Shu-Han Chen, Tsung-Ju Chen, Ta-Hsiang Kung, Xiong-Fei Yu, Chi On Chui
  • Patent number: 11973148
    Abstract: A semiconductor device and a method of forming the same is disclosed. The semiconductor device includes a substrate, a first well region disposed within the substrate, a second well region disposed adjacent to the first well region and within the substrate, and an array of well regions disposed within the first well region. The first well region includes a first type of dopants, the second well region includes a second type of dopants that is different from the first type of dopants, and the array of well regions include the second type of dopants. The semiconductor device further includes a metal silicide layer disposed on the array of well regions and within the substrate, a metal silicide nitride layer disposed on the metal silicide layer and within the substrate, and a contact structure disposed on the metal silicide nitride layer.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ting-Ying Wu, Yung-Hsiang Chen, Yu-Lung Yeh, Yen-Hsiu Chen, Wei-Liang Chen, Ying-Tsang Ho
  • Patent number: 11972537
    Abstract: A method for flattening a three-dimensional shoe upper template is provided. The method includes providing a three-dimensional last model, obtaining a three-dimensional grid model, obtaining a three-dimensional thickened grid model, obtaining a two-dimensional initial-value grid model, and obtaining a two-dimensional grid model with the smallest energy value. A system and a non-transitory computer-readable medium for performing the method are also provided. The method makes it possible to precisely flatten a three-dimensional last model with a non-developable surface and thereby convert the three-dimensional last model into a two-dimensional grid model.
    Type: Grant
    Filed: August 19, 2022
    Date of Patent: April 30, 2024
    Assignee: YU JUNG CHANG TECHNOLOGY CO., LTD.
    Inventors: Chih-Chuan Chen, Wei-Hsiang Tsai, Chin-Yu Chen, Ching-Cherng Sun, Jann-Long Chern, Yu-Kai Lin
  • Patent number: 11971824
    Abstract: Disclosed is a method for enhancing memory utilization and throughput of a computing platform in training a deep neural network (DNN). The critical features of the method includes: calculating a memory size for every operation in a computational graph, storing the operations in the computational graph in multiple groups with the operations in each group being executable in parallel and a total memory size less than a memory threshold of a computational device, sequentially selecting a group and updating a prefetched group buffer, and simultaneously executing the group and prefetching data for a group in the prefetched group buffer to the corresponding computational device when the prefetched group buffer is update. Because of group execution and data prefetch, the memory utilization is optimized and the throughput is significantly increased to eliminate issues of out-of-memory and thrashing.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: April 30, 2024
    Assignee: AETHERAI IP HOLDING LLC
    Inventors: Chi-Chung Chen, Wei-Hsiang Yu, Chao-Yuan Yeh
  • Publication number: 20240137067
    Abstract: A signal transmitter may include a waveform synthesis circuit and a signal transmission circuit. The waveform synthesis circuit may store values of a reference waveform for a selected channel of the signal transmitter, and use the stored values to generate values of reference waveforms for one or more other channels of the signal transmitter. The waveform synthesis circuit may further include a sampling boost circuit to generate one or more additional values for the reference waveforms. The waveform transmission circuit may generate signals for the channels of the signal transmitter based at least in part on the values of the reference waveforms, and transmit the signals via one or more antennas.
    Type: Application
    Filed: November 1, 2023
    Publication date: April 25, 2024
    Applicant: Apple Inc.
    Inventors: Long Kong, Chia-Hsiang Chen, Utku Seckin
  • Publication number: 20240137709
    Abstract: An electro-acoustical transducer device is disclosed, which includes: a hollow disk body that generally defines an axis of propagation, the hollow disk body comprising: a pair of plate members extending substantially perpendicular to the axis of propagation, each provided with a central transmitting port arranged about the axis of propagation, and a peripheral enclosure jointing the pair of plate members at the respective outer edge portions thereof, thereby defining a chamber of resonance between the pair of plate members; wherein a ring-opening about the axis of propagation that enables access to the chamber of resonance is formed between the central transmitting ports of the plate members.
    Type: Application
    Filed: April 27, 2023
    Publication date: April 25, 2024
    Inventors: YU-CHEN CHEN, CHUN-KAI CHAN, HSU-HSIANG CHENG, MING-CHING CHENG
  • Publication number: 20240132496
    Abstract: An ionic compound, an absorbent and an absorption device are provided. The ionic compound has a structure represented by Formula (I): ABn, ??Formula (I) wherein A is B is R1, R2, R3, R4, R5, and R6 are independently H, C1-6 alkyl group; and n is 1 or 2.
    Type: Application
    Filed: June 9, 2023
    Publication date: April 25, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Wei-Chih LEE, Yi-Hsiang CHEN, Chih-Hao CHEN, Ai-Yu LIOU, Jyi-Ching PERNG, Jiun-Jen CHEN
  • Publication number: 20240131655
    Abstract: The present disclosure provides a chemical mechanical polishing device including a retaining ring and a wafer carrier and a polishing method. The retaining ring is configured on a polishing pad and includes an inner sidewall defining an opening and an outer sidewall opposite to the inner sidewall. The wafer carrier is configured on the polishing pad and is capable of placing a wafer disposed thereon into the opening and facing the polishing pad. The retaining ring has a notch at the corner adjacent to the wafer and the polishing pad.
    Type: Application
    Filed: November 28, 2022
    Publication date: April 25, 2024
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Ming-Hsiang Chen, Shih-Ci Yen, Kai-Yao Shih
  • Publication number: 20240131010
    Abstract: In some embodiments of the present disclosure, a sustained release osmotic-controlled pharmaceutical composition is provided, including: a core and a semi-permeable membrane coated on the core. The core includes a drug compartment, in which the drug compartment includes a first active ingredient, a first polymer and a first osmogen, and the first active ingredient includes lurasidone, a pharmaceutical acceptable salt of the lurasidone or a combination thereof. The semi-permeable membrane includes a membrane body and at least one pore distributed in the membrane body.
    Type: Application
    Filed: October 15, 2023
    Publication date: April 25, 2024
    Inventors: Chun-You LIOU, Tzu-Hsien CHAN, Hua-Jing JHAN, I-Hsiang LIU, Tse-Hsien CHEN, Chi-Heng JIAN
  • Patent number: 11965563
    Abstract: An elastic short-pin type universal joint includes a first base, a second base, a jointer, a first elastic member, two second elastic members, and four short pins. The first base engages the second base to form a space therebetween. The jointer is received in the space between the first and the second bases. The jointer has a first bore passing through the jointer, a second bore, and a third bore. The first elastic member is received in the first bore of the jointer, and the second elastic members are received in the second bore and the third bore. The short pins are urged by ends of the first elastic member and the second elastic members to press the first base and the second base respectively. As a result, the first base is able to rotate related to the second base in all directions.
    Type: Grant
    Filed: February 3, 2021
    Date of Patent: April 23, 2024
    Assignee: RE-DAI PRECISION TOOLS CO., LTD.
    Inventor: Hsiang Chen Yu
  • Patent number: 11964409
    Abstract: A multi-shot moulding part structure includes a first structural part, an ink decoration layer, and a second structural part. The first structural part has a first area surface, a second area surface, and a joining surface located on the second area surface. The joining surface is non-parallel to the second area surface. The ink decoration layer is spread on the first area surface and the second area surface, but not on the joining surface. The second structural part is combined with the first structural part and covers the second area surface. The second structural part touches the joining surface. By the second structural part touching the joining surface of the first structural part that is not coated with the ink decoration layer, the structural bonding strength between the first structural part and the second structural part is enhanced.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: April 23, 2024
    Assignees: Inventec (Pudong) Technology Corp., Inventec Corporation
    Inventors: Wen-Ching Lin, Ting-Yu Wang, Fa-Chih Ke, Yu-Ling Lin, Wen-Hsiang Chen
  • Patent number: 11965898
    Abstract: An automatic nucleic acid detection system and a method thereof are disclosed. The automatic nucleic acid detection method includes: performing, by an automatic control subsystem, on a nucleic acid extraction machine platform, a nucleic acid extraction on one or more specimens in a sample tray to generate one or more corresponding nucleic acids in the sample tray; distributing, by the automatic control subsystem, on a nucleic acid distribution machine platform, the nucleic acid in each hole of the sample tray and a first reagent into a plurality of holes of a detection tray, wherein the number of holes of the detection tray is greater than that of the sample tray; and performing, by the automatic control subsystem, on a nucleic acid detection machine platform, a nucleic acid detection on the detection tray.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: April 23, 2024
    Assignees: TCI GENE INC, TCI CO., LTD
    Inventors: Yung-Hsiang Lin, Cheng-Hong Hsieh, Ciao-Ting Chen, Tsung-Cheng Chen
  • Patent number: 11966121
    Abstract: An electronic window is provided for adjusting light and includes a first panel, a second panel, and an intermediate layer. The first panel includes a first alignment layer. The second panel includes a second alignment layer. The intermediate layer is disposed between the first panel and the second panel. The angle of orientation of the first alignment layer is between 25 degrees and 65 degrees, and the angle of orientation of the second alignment layer is between 115 degrees and 155 degrees.
    Type: Grant
    Filed: March 17, 2023
    Date of Patent: April 23, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: En-Hsiang Chen, Chih-Chin Kuo, Mao-Shiang Lin, Hsu-Kuan Hsu
  • Patent number: 11967591
    Abstract: A method of forming a semiconductor device includes forming a first interconnect structure over a carrier; forming a thermal dissipation block over the carrier; forming metal posts over the first interconnect structure; attaching a first integrated circuit die over the first interconnect structure and the thermal dissipation block; removing the carrier; attaching a semiconductor package to the first interconnect structure and the thermal dissipation block using first electrical connectors and thermal dissipation connectors; and forming external electrical connectors, the external electrical connectors being configured to transmit each external electrical connection into the semiconductor device, the thermal dissipation block being electrically isolated from each external electrical connection.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Hao Chen, Fong-Yuan Chang, Po-Hsiang Huang, Ching-Yi Lin, Jyh Chwen Frank Lee
  • Patent number: 11964358
    Abstract: A method includes placing a polisher head on platen, the polisher head including a set of first magnets, and controlling a set of second magnets to rotate the polisher head on the platen, wherein controlling the set of second magnets includes reversing the polarity of at least one second magnet of the set of second magnets to produce a magnetic force on at least one first magnet of the set of first magnets, wherein the set of second magnets are external to the polisher head.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shang-Yu Wang, Chun-Hao Kung, Ching-Hsiang Tsai, Kei-Wei Chen, Hui-Chi Huang
  • Publication number: 20240124706
    Abstract: A liquid crystal polymer, composition, liquid crystal polymer film, laminated material and method of forming liquid crystal polymer film are provided. The liquid crystal polymer includes a first repeating unit, a second repeating unit, a third repeating unit, and a fourth repeating unit. The first repeating unit has a structure of Formula (I), the second repeating unit has a structure of Formula (II), the third repeating unit has a structure of Formula (III), and the fourth repeating unit has a structure of Formula (IV), a structure of Formula (V) or a structure of Formula (VI) wherein A1, A2, A3, Z1, R1, R2, R3 and Q are as defined in the specification.
    Type: Application
    Filed: September 22, 2023
    Publication date: April 18, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-Lin CHU, Jen-Chun CHIU, Po- Hsien HO, Yu-Min HAN, Meng-Hsin CHEN, Chih-Hsiang LIN
  • Publication number: 20240126006
    Abstract: A backlight module comprises an outer frame unit, a light guide plate arranged in the outer frame unit, a light-emitting unit, a plurality of adhesives for fixing the light-emitting unit on the light guide plate, and a plurality of abutting structures. The light-emitting unit includes a flexible circuit board and a plurality of light-emitting elements arranged on the flexible circuit board at intervals. Part of the flexible circuit board is deformed at a specific position by the abutting structures, and the position of the light-emitting elements relative to the light guide plate can be adjusted. Thereby, the light-emitting elements can be aligned with the light incident surface of the light guide plate, prevent light from leaking from the light emitting surface of the light guide plate close to the light-emitting elements, and reduce the generation of bright lines and improving the overall uniformity. The present invention also provides a display device including the backlight module.
    Type: Application
    Filed: September 14, 2023
    Publication date: April 18, 2024
    Applicant: Radiant Opto-Electronics Corporation
    Inventors: Chih-Hsiang CHEN, Cheng-Te CHANG
  • Publication number: 20240128127
    Abstract: A semiconductor device includes a single diffusion break (SDB) structure dividing a fin-shaped structure into a first portion and a second portion, an isolation structure on the SDB structure, a first spacer adjacent to the isolation structure, a metal gate adjacent to the isolation structure, a shallow trench isolation (STI around the fin-shaped structure, and a second isolation structure on the STI. Preferably, a top surface of the first spacer is lower than a top surface of the isolation structure and a bottom surface of the first spacer is lower than a bottom surface of the metal gate.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 18, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Kai Hsu, Ssu-l Fu, Chun-ya Chiu, Chi-Ting Wu, Chin-HUNG Chen, Yu-Hsiang Lin
  • Publication number: 20240126694
    Abstract: An out-of-order buffer includes an out-of-order queue and a controlling circuit. The out-of-order queue includes a request sequence table and a request storage device. The controlling circuit receives and temporarily stores the plural requests into the out-of-order queue. After the plural requests are transmitted to plural corresponding target devices, the controlling circuit retires the plural requests. The request sequence table contains m×n indicating units. The request sequence table contains m entry indicating rows. Each of the m entry indicating rows contains n indicating units. The request storage device includes m storage units corresponding to the m entry indicating rows in the request sequence table. The state of indicating whether one request is stored in the corresponding storage unit of the m storage units is recoded in the request sequence table. The storage sequence of the plural requests is recoded in the request sequence table.
    Type: Application
    Filed: November 18, 2022
    Publication date: April 18, 2024
    Inventors: Jyun-Yan LI, Po-Hsiang HUANG, Ya-Ting CHEN, Yao-An TSAI, Shu-Wei YI
  • Patent number: D1024932
    Type: Grant
    Filed: March 10, 2022
    Date of Patent: April 30, 2024
    Assignee: WALSIN LIHWA CORPORATION
    Inventors: Ko-Ming Chen, Shih-Hsiang Wang, An-Hung Lin, Min-Chuan Wu, Shao-Pei Lin, Chien-Chung Ni, Chun-Ying Lin