Patents by Inventor Hsiang-Chi Hsieh

Hsiang-Chi Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080263245
    Abstract: The present invention provides an OTG device for multi-directionally transmitting GPS data and a controlling method of the same. The OTG device is capable of automatically being switched as a master or slave devices based on a type of an external device connected thereto, thereby preventing a conflict between the OTG device and other external devices. Therefore, the GPS data received by a GPS module of the OTG device can easily be transmitted to the external device. Furthermore, the OTG device and the associated controlling method can be utilized in a multimedia device, such that the multimedia device is capable of GPS positioning, and multi-directionally transmitting GPS data and image data to be stored.
    Type: Application
    Filed: July 11, 2007
    Publication date: October 23, 2008
    Applicant: Genesys Logic, Inc.
    Inventor: Hsiang-chi Hsieh
  • Publication number: 20080244166
    Abstract: A system and a method for configuration and management of flash memory is provided, including a flash memory, a virtual memory region, and a memory logical block region. The flash memory includes a plurality of physical erase units. Each physical erase unit is configured to include at least a consecutive segment, and each segment is configured to include at least a consecutive frame. Each frame is configured to include at least a consecutive page. Each virtual memory region is configured to include a plurality of areas, and each area is configured to include at least a virtual erase unit. The memory logical block region is configured to include a plurality of clusters, and each cluster includes at least a consecutive memory logical block.
    Type: Application
    Filed: June 6, 2008
    Publication date: October 2, 2008
    Inventors: Yi-Lin Tsai, Tei-Wei Kuo, Jen-Wei Hsieh, Yuan-Hao Chang, Hsiang-Chi Hsieh
  • Publication number: 20080222323
    Abstract: The present invention discloses a multimedia adapting apparatus. The multimedia adapting apparatus includes a communicating module, a buffer, a primary controller, a command register, a status register, a secondary controller, a media hardware engine, and a memory unit. The buffer stores the audiovisual content from the multimedia player. The primary controller handles the operation of audiovisual content between the multimedia player and the portable multimedia devices. The status register stores a plurality of statuses associated with the portable multimedia devices. The command register stores a command set associated the operation of audiovisual content between the multimedia player and the portable multimedia devices according to the statuses of the status register. The communicating module couples the buffer and the primary controller, respectively, to the multimedia player, for communicating with the multimedia player based on a plurality of control signals associated with the command set.
    Type: Application
    Filed: April 18, 2008
    Publication date: September 11, 2008
    Applicant: Genesys Logic, Inc.
    Inventor: Hsiang-Chi Hsieh
  • Publication number: 20080162792
    Abstract: A caching device is positioned between a memory read/write controller and a flash memory, which contains an instruction register, a logical address register, a data register, a pair of auxiliary controllers, a microprocessor, an address translation unit, a flash memory address register, a caching control unit, and a caching instruction and data buffer area. Among them, the microprocessor is the core of the caching device responsible not only for the reading and writing the flash memory but also for the caching operation for logical and physical address translation. The caching control unit is a programmable device containing the instruction and data for caching the logical and physical address mapping. The caching instruction and data buffer area temporarily stores the caching instruction and data used by the caching control unit.
    Type: Application
    Filed: August 20, 2007
    Publication date: July 3, 2008
    Applicant: Genesys Logic, Inc.
    Inventors: Chin-hsien Wu, Tei-wei Kuo, Hsiang-chi Hsieh
  • Publication number: 20080163031
    Abstract: A method of facilitating reliably accessing flash memory is provided. During the write-in process, the present invention utilizes the steps of coding write-in data to generate extra data, and then generating the first error correction code by performing an error-correcting operation on the write-in data and the extra data. Finally, store the N write-in data and the generated K extra data into the data area and the first ECC into the spare area. During read process, the present invention utilizes the steps of reading data from the data area of the target flash-memory page to generate the second ECC, counting with the counter a number of bit differences between the first ECC and the second ECC, and selecting M data from the N write-in data and the K extra data as decoding factors to retrieve the N write-in data. The higher the counter values, the lower the likelihood the corresponding bit is selected to be retrieved.
    Type: Application
    Filed: December 27, 2007
    Publication date: July 3, 2008
    Applicant: GENESYS LOGIC, INC.
    Inventors: Jen-wei Hsieh, Tei-wei Kuo, Hsiang-chi Hsieh
  • Publication number: 20080126684
    Abstract: A caching method provides a cashing mechanism between a logical addresses and a flash memory physical addresses. The cashing mechanism involves a search tree which contains a number of internal and external translation nodes. Each external translation node points to a link list of translation units, and each translation unit records a range of logical addresses and the corresponding range of physical addresses, in addition to a version value. By traversing the search tree to reach a translation unit, the physical address of a target logical address can be determined in an efficient manner. The version value of the translation unit can be used to determine the space taken up for storing the mapping of the logical and physical addresses should be released for reuse.
    Type: Application
    Filed: August 23, 2007
    Publication date: May 29, 2008
    Applicant: Genesys Logic, Inc.
    Inventors: Chin-hsien Wu, Tei-wei Kuo, Hsiang-chi Hsieh
  • Publication number: 20070266298
    Abstract: An apparatus for improving the data access reliability of flash memory is provided, including an instruction register, an address register, a flash memory control circuit, a data register, an encoder, an error correction code (ECC) generator, a signal converter, a comparator, an arbitrator, and a decoder. The instruction register and the address register are connected to a flash memory respectively for storing the access instructions and the addresses. The flash memory control circuit is connected to both instruction register and address register for controlling the access to the flash memory. The data register is connected to flash memory control circuit for loading data to be written to the flash memory. The encoder encodes the written data, and the ECC generator generates an ECC, which is written to the flash memory through the signal converter. The comparator and the arbitrator provide the comparison with ECC and informing decoder f suspicious bit values when data is read from the flash memory.
    Type: Application
    Filed: May 11, 2007
    Publication date: November 15, 2007
    Inventors: Jen-Wei Hsieh, Tei-Wei Kuo, Hsiang-Chi Hsieh
  • Publication number: 20070106985
    Abstract: An apparatus for loading firmware into IC is provided, including a USB connector, at least a USB controller, a conversion interface, a plurality of connection interfaces, a plurality of non-volatile memories, and a plurality of IC slots. The USB connector provides the connection to any electronic USB device. The USB controller is connected to the USB connector for loading the original firmware data for the IC from the USB device. The conversion interface is connected to the USB controller for data format conversion of original firmware data between USB interface and conversion interface. The connection interfaces are connected to the conversion interface and the non-volatile memories are connected to the respective connection interfaces for storing the converted firmware data. The IC slots are connected to respective non-volatile memories so that the firmware stored in the non-volatile memories can be loaded into the ICs plugged in the IC slots.
    Type: Application
    Filed: June 14, 2006
    Publication date: May 10, 2007
    Inventors: Chih Pan, Wu Hung, Hsiang-Chi Hsieh
  • Publication number: 20070038802
    Abstract: A system and a method for configuration and management of flash memory is provided, including a flash memory, a virtual memory region, and a memory logical block region. The flash memory includes a plurality of physical erase units. Each physical erase unit is configured to include at least a consecutive segment, and each segment is configured to include at least a consecutive frame. Each frame is configured to include at least a consecutive page. Each virtual memory region is configured to include a plurality of areas, and each area is configured to include at least a virtual erase unit. The memory logical block region is configured to include a plurality of clusters, and each cluster includes at least a consecutive memory logical block.
    Type: Application
    Filed: July 21, 2006
    Publication date: February 15, 2007
    Inventors: Yi-Lin Tsai, Tei-Wei Kuo, Jen-Wei Hsieh, Yuan-Hao Chang, Hsiang-Chi Hsieh
  • Publication number: 20070028121
    Abstract: A method of protecting confidential data using a non-sequential hidden block mechanism is provided, including the following steps of: (a) configuring the size of the confidential file; (b) the electronic host reading the capacity of the physical memory; (c) configuring the capacity of usable physical memory space; (d) the electronic host writing confidential data; (e) generating a random access lookup table (LUT) of address space; (f) using a random function to generate random address within a certain range and storing into the random LUT sequentially; and (g) sequentially mapping the logic addresses of the confidential data to the random LUT, and writing the mapped physical addresses to the physical memory blocks. Through the above steps, the mass storage device, such as no-volatile memory and hard disk, can store the data non-sequentially to achieve the object of confidential data protection.
    Type: Application
    Filed: July 21, 2006
    Publication date: February 1, 2007
    Inventor: Hsiang-Chi Hsieh
  • Publication number: 20070028033
    Abstract: A highly efficient data characteristic identification method for flash memory is provided, including the steps of: (a) based on the LBA corresponding to the write request to the flash memory, finding K corresponding counters in the hash table through K hash functions; (b) determining whether to perform decay period computation on hash table; if so, proceeding to step (c); otherwise, proceeding to step (d); (c) performing decay period computation on the hash table; (d) performing state update computation on the hash table; and (e) checking the hash table state and determining whether the data in the logic block corresponding to the flash memory is frequently updated. The method contains the decay period computation, state update computation, and checking on the data in the corresponding counters in the hash table to determine whether the data is frequently updated. Therefore, the object of a highly efficient data access characteristic identification method for flash memory is provided.
    Type: Application
    Filed: June 14, 2006
    Publication date: February 1, 2007
    Inventors: Jen-Wei Hsieh, Li-Pin Chang, Tei-Wei Kuo, Hsiang-Chi Hsieh
  • Publication number: 20070016756
    Abstract: A highly efficient data characteristic identification device for flash memory is provided, including an instruction register, a plurality of auxiliary controllers, a data register, an address register, a microprocessor, a plurality of hash function units, a hash table unit, a comparator, a shifter, and an adder. By connecting the instruction register, data register and address register to a flash memory access control circuit and flash memory for storing the control instruction of the access control circuit and the data and physical and logical address of the flash memory, the control instruction is decoded and transmitted by the microprocessor and the auxiliary controllers to each circuit. A plurality of hash function units, a hash table unit, a comparator, a shifter, and an adder form an index computation circuit for flash memory LBA. By using the index and computation on the contents of the hash function units, the data characteristics of the LBA can be stored with less memory and higher efficiency.
    Type: Application
    Filed: June 14, 2006
    Publication date: January 18, 2007
    Inventors: Jen-Wei Hsieh, Li-Pin Chang, Tei-Wei Kuo, Hsiang-Chi Hsieh
  • Publication number: 20060288377
    Abstract: A multimedia I/O interface device for cars is provided, including a player data bus, a player I/O interface, a microprocessor, a memory unit, a USB OTG controller, a buffer, and an MHE. The player data bus and player I/O interface are connected to a multimedia player for airplane seats. The multimedia player for airplane seats is an audiovisual player. The microprocessor controls the data input/output and the storage of the multimedia player. The USB OTG controller, the buffer, and the MHE form a USB connection and transmission interface. The multimedia I/O interface device of the present invention is a connected to a USB connector and a card reader interface through the USB OTG controller and the MHE, respectively. Therefore, the multimedia device can be connected to a multimedia storage device with a USB interface or a flash memory for bi-direction data transmission.
    Type: Application
    Filed: June 14, 2006
    Publication date: December 21, 2006
    Inventor: Hsiang-Chi Hsieh
  • Publication number: 20060288147
    Abstract: An integrated portable medical measurement apparatus is provided, including a digital medical measurement instrument and a USB media interface device. The digital medical measurement instrument includes a measuring module and an interface unit. The measuring module is for measuring the blood pressure, heartbeat rate, body temperature, blood sugar, and so on, and outputs the measured data through the interface unit. The USB media interface device includes an interface unit and a USB media module. The interface unit is connected to the interface unit of the measurement instrument to form a bi-directional data transmission channel between the digital medical measurement instrument and the USB media interface device. The USB media module is externally connected to a USB multimedia device so that the measured data from the digital medical measurement instrument can be stored in the USB multimedia device.
    Type: Application
    Filed: June 14, 2006
    Publication date: December 21, 2006
    Inventor: Hsiang-Chi Hsieh
  • Publication number: 20060287789
    Abstract: A multimedia device for cars is provided, including a player data bus, a player I/O interface, a microprocessor, a memory unit, a USB controller, a buffer, and an MHE. The player data bus and player I/O interface are connected to a multimedia player for cars. The multimedia player for cars is an audiovisual player. The microprocessor controls the data input/output and the storage of the player. The USB controller, the buffer, and the MHE form a USB connection and transmission interface. The multimedia device of the present invention is a connected to a USB connector and a card reader interface through the USB controller and the MHE, respectively. Therefore, the multimedia device can be connected to a multimedia storage device with a USB interface or a flash memory for access.
    Type: Application
    Filed: June 14, 2006
    Publication date: December 21, 2006
    Inventor: Hsiang-Chi Hsieh