Abstract: A method for a user equipment (UE) monitoring a physical downlink control channel (PDCCH) for power saving signaling is disclosed. The method comprises receiving a discontinuous reception (DRX) configuration from a base station (BS) to configure the UE to monitor a scheduling signal on the PDCCH within a DRX active time, and receiving a configuration from the BS to configure the UE to monitor the power saving signaling on the PDCCH and instructing the UE to wake up for monitoring the scheduling signal in the DRX active time, wherein the configuration includes a time in milliseconds prior to a start of a DRX on-duration time, and instructs the UE to start monitoring the PDCCH for the power saving signaling.

Abstract: A stator structure of a vehicle motor includes a stator core assembly and a plurality of coil assemblies composed of flat wires. The stator core assembly includes an annular portion and a plurality of tooth portions. The tooth portions extend from the annular portion in a radial direction toward a center of the stator core assembly. Each coil assembly is configured around a corresponding tooth portion. Each coil assembly includes a first flat wire and a plurality of second flat wires that are electrically connected in parallel. The first flat wire is radially stacked and wound around the corresponding tooth portion. The second flat wires are arranged radially adjacent to the first flat wire and are electrically connected in series to the first flat wire. The second flat wires are alternately stacked and radially wound around the corresponding tooth portion.

Abstract: A method of forming semiconductor devices having improved work function layers and semiconductor devices formed by the same are disclosed. In an embodiment, a method includes depositing a gate dielectric layer on a channel region over a semiconductor substrate; depositing a first p-type work function metal on the gate dielectric layer; performing an oxygen treatment on the first p-type work function metal; and after performing the oxygen treatment, depositing a second p-type work function metal on the first p-type work function metal.

Abstract: A method includes forming a multi-layered reflective layer over a substrate; depositing a metal capping layer over the multi-layered reflective layer; depositing a first metal oxide layer over the metal capping layer; depositing a metal nitride layer over the first metal oxide layer; depositing a second metal oxide layer over the metal nitride layer; forming a plurality of features on the second metal oxide layer and the metal nitride layer.

Abstract: The present disclosure is relates to a conductive film and a manufacturing method thereof. The conductive film includes a base layer, a TPU complex layer, a conductive layer and a TPU surface layer. The TPU complex layer includes a TPU heat-resistant layer and a TPU melting layer. The TPU heat-resistant layer is disposed on the TPU melting layer, and the TPU melting layer is disposed on the base layer. The conductive layer includes a conductive circuit disposed on the TPU heat-resistant layer. The TPU surface layer is disposed on the conductive layer. Utilizing the TPU complex layer, the conductive layer does not contact directly with the base layer to avoid breaking the conductive line of the conductive layer when the base layer is pulled. Therefore, the lifetime of the conductive film can be increased.

Abstract: A non-volatile memory device includes a memory cell including a substrate, a select gate, a control gate, a planar floating gate, a coupling dielectric layer, an erase gate dielectric layer, and an erase gate. The select gate and the control gate are disposed on the substrate and laterally spaced apart from each other, and the control gate includes a non-vertical surface. The planar floating gate includes a lateral tip laterally spaced apart from the control gate. The coupling dielectric layer includes a first thickness (T1). The erase gate dielectric layer covers the non-vertical surface of the control gate and the lateral tip of the planar floating gate, and includes a second thickness (T2). The erase gate covers the erase gate dielectric layer and the lateral tip of the planar floating gate. The first thickness and the second thickness satisfy the following relation: (T2)<(T1)<2(T2).

Abstract: The invention provides a material surface treatment equipment, which is applied to a material substrate. The material surface treatment equipment includes a surface treatment device and at least one waveguide device. The surface treatment device is used to carry the material substrate to perform a surface treatment process. Each waveguide device is used for introducing electromagnetic waves to the material substrate to assist in performing the surface treatment process. Through the introduction of electromagnetic waves, the surface treatment process of the material substrate is easy to perform and can achieve the strengthening effect.

Abstract: A non-volatile memory device includes at least one memory cell, and the memory cell includes a substrate, an assist gate structure, a tunneling dielectric layer, a floating gate, and an upper gate structure. The assist gate structure is disposed on the substrate. The floating gate includes two opposite first top edges arranged along a first direction, two opposite first sidewalls arranged along the first direction, and two opposite second sidewalls arranged along a second direction different from the first direction. The upper gate structure covers the assist gate structure and the floating gate, where at least one of the first top edges of the floating gate is embedded in the upper gate structure. Portions of the upper gate structure extend beyond the second sidewalls of the floating gate in the second direction, and the portions of the upper gate structure are disposed above the substrate.

Abstract: A non-volatile memory device includes at least one memory cell and the memory cell includes a substrate, a select gate, a control gate, a floating gate, and an erase gate. The select gate is disposed on the substrate, and the control gate is disposed on the substrate and laterally spaced apart from the select gate. The control gate comprises a non-vertical surface. The floating gate includes a vertical portion and a horizontal portion. The vertical portion disposed between the select gate and the control gate and includes a first top tip laterally spaced apart from the control gate. The horizontal portion is disposed between the substrate and the control gate, where the horizontal portion includes a lateral tip laterally and vertically spaced apart from the control gate. The erase gate covers the non-vertical surface of the control gate and the lateral tip of the horizontal portion of the floating gate.

Abstract: A device operates to perform acoustic echo cancellation. The device includes a speaker to output a far-end signal at the device, a microphone to receive at least a near-end signal and the far-end signal from the speaker to produce a microphone output, and an AI accelerator operative to perform neural network operations according to a first neural network model and a second neural network model to output an echo-suppressed signal. The device further includes a digital signal processing (DSP) unit. The DSP unit is operative to perform adaptive filtering to remove at least a portion of the far-end signal from the microphone output to generate a filtered near-end signal, and perform Fast Fourier Transform (FFT) and inverse FFT (IFFT) to generate input to the first neural network model and the second neural network model, respectively.

Abstract: A method of fabricating a photomask includes selectively exposing portions of a photomask blank to radiation to change an optical property of the portions of the photomask blank exposed to the radiation, thereby forming a pattern of exposed portions of the photomask blank and unexposed portions of the photomask blank. The pattern corresponds to a pattern of semiconductor device features.

Abstract: A device includes a first nanostructure; a second nanostructure over the first nanostructure; a first high-k gate dielectric disposed around the first nanostructure; a second high-k gate dielectric being disposed around the second nanostructure; and a gate electrode over the first high-k gate dielectric and the second high-k gate dielectric. A portion of the gate electrode between the first nanostructure and the second nanostructure comprises a first portion of a p-type work function metal filling an area between the first high-k gate dielectric and the second high-k gate dielectric.

Abstract: The present disclosure is relates to a TPU ball structure and a manufacturing method thereof. The TPU ball structure includes a ball bladder layer, a yarn layer and a surface layer. The ball bladder layer is made of TPU material. The yarn layer is made of TPU material, and the yarn layer is disposed to cover the ball bladder layer. The surface layer is made of TPU material, and the surface layer is disposed to cover the yarn layer. The above layers of the TPU ball structure are made of TPU material to satisfy a requirement for environmental protection, and are recyclable. There is no need to use adhesive to adhere the above layers of the TPU ball structure. Therefore, the peeling strength between the layers of the TPU ball structure can be increased so that the whole peeling strength of the TPU ball structure can be increased.

Abstract: A lighting keyboard includes a backlight module and at least one keyswitch. The backlight module includes a lighting substrate and a protruding structure. The lighting substrate includes two non-intersecting traces and a light emitting unit. The light emitting unit is connected between the two non-intersecting traces. A position of the protruding structure corresponds to a position of the light emitting unit and the protruding structure is located between the two non-intersecting traces. The at least one keyswitch is disposed on the backlight module.

Abstract: A layer stack including a first bonding dielectric material layer, a dielectric metal oxide layer, and a second bonding dielectric material layer is formed over a top surface of a substrate including a substrate semiconductor layer. A conductive material layer is formed by depositing a conductive material over the second bonding dielectric material layer. The substrate semiconductor layer is thinned by removing portions of the substrate semiconductor layer that are distal from the layer stack, whereby a remaining portion of the substrate semiconductor layer includes a top semiconductor layer. A semiconductor device may be formed on the top semiconductor layer.

Abstract: A biological particle analysis method is provided and includes the following steps: fluorescence staining a liquid specimen through a fluorescence staining process so as to enable a target biological particle in the liquid specimen to becomes a fluorescence; accommodating the liquid specimen into a pico-droplet generator and using a camera device to take a real-time image of the liquid specimen; using the pico-droplet generator to output a target pico-droplet having the target biological particle onto a biochip according to the real-time image; removing the fluorescent color of the target biological particle in the target pico-droplet through a washing process; and fluorescence staining the target biological particle captured by the biochip at multiple times through the fluorescence staining process and the washing process, so as to obtain a plurality of fluorescence images respectively corresponding to multiple kinds of biological characterization expressions.

Abstract: A biological particle enrichment apparatus and a pico-droplet generator thereof are provided. The pico-droplet generator includes a container, a hollow needle connected to the container, a first piezoelectric member disposed on the container, and a second piezoelectric member disposed on the hollow needle. The container can receive a liquid specimen having biological particles. The hollow needle and the container are fluid communicated with each other, and an inner diameter of the container is within a range from 5 times to 30 times of an inner diameter of the hollow needle. The first piezoelectric member is annularly disposed on a surrounding lateral side of the container, and enables the biological particles in the container to move along a direction away from the surrounding lateral side by vibrating the container. The second piezoelectric member can squeeze the hollow needle, so that the liquid specimen flows outwardly to form a pico-droplet.

Abstract: A hard disk bracket configured to be installed on a case includes a tray, a base, a handle, a pin, and a latch. The tray has an accommodating space. The base is connected to the tray. The handle is disposed in the base and has a first slide part detachably fastened with the base. The pin is disposed through the handle and the base. The latch is disposed in the base and is detachably fastened with the case. The latch is fastened with the handle and has a second slide part penetrating the handle for extending outside the base.

Abstract: A method and a User Equipment (UE) for beam operations are provided. The method includes monitoring at least one of a plurality of Control Resource Sets (CORESETs) configured for the UE within an active Bandwidth Part (BWP) of a serving cell in a time slot; and applying a first Quasi Co-Location (QCL) assumption of a first CORESET of a set of one or more of the monitored at least one of the plurality of CORESETs to receive a Downlink (DL) Reference Signal (RS), wherein the first CORESET is associated with a monitored search space configured with a lowest CORESET Identity (ID) among the set of one or more of the monitored at least one of the plurality of CORESETs.

Abstract: A method for wireless communication performed by a user equipment (UE) is provided. The method includes receiving, from a base station (BS), a Radio Resource Control (RRC) configuration to configure a first semi-persistent scheduling (SPS) physical downlink shared channel (PDSCH) and generating first uplink control information (UCI) in response to the first SPS PDSCH, where the RRC configuration includes a first parameter that indicates a priority of the first UCI.