Patents by Inventor Hsin Cheng

Hsin Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11916107
    Abstract: A semiconductor device including a FET includes an isolation insulating layer disposed in a trench of the substrate, a gate dielectric layer disposed over a channel region of the substrate, a gate electrode disposed over the gate dielectric layer, a source and a drain disposed adjacent to the channel region, and an embedded insulating layer disposed below the source, the drain and the gate electrode and both ends of the embedded insulating layer are connected to the isolation insulating layer.
    Type: Grant
    Filed: January 13, 2023
    Date of Patent: February 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun Hsiung Tsai, Chih-Hsin Ko, Clement Hsing Jen Wann, Ya-Yun Cheng
  • Patent number: 11916124
    Abstract: A device includes a first nanostructure; a second nanostructure over the first nanostructure; a first high-k gate dielectric disposed around the first nanostructure; a second high-k gate dielectric being disposed around the second nanostructure; and a gate electrode over the first high-k gate dielectric and the second high-k gate dielectric. A portion of the gate electrode between the first nanostructure and the second nanostructure comprises a first portion of a p-type work function metal filling an area between the first high-k gate dielectric and the second high-k gate dielectric.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsin-Yi Lee, Ji-Cheng Chen, Cheng-Lung Hung, Chi On Chui
  • Patent number: 11912837
    Abstract: The present disclosure provides a thin film including a first thermoplastic polyolefin (TPO) elastomer which is anhydride-grafted. The present disclosure further provides a method for manufacturing the thin film, a laminated material and a method for adhesion.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: February 27, 2024
    Assignee: SAN FANG CHEMICAL INDUSTRY CO., LTD.
    Inventors: Chih-Yi Lin, Kuo-Kuang Cheng, Chi-Chin Chiang, Wen-Hsin Tai, Ming-Chen Chang
  • Publication number: 20240062731
    Abstract: An electronic device includes a display panel, a backlight source, an ambient light sensor, and a controller. The backlight source is disposed below the display panel and includes light-emitting units. The ambient light sensor detects the brightness of the ambient light. The controller judges the modes of the electronic device according to the detecting results of the ambient light sensor. When the electronic device is in a low-brightness mode, the brightness of a white frame of the display panel is greater than 0 nit and less than or equal to 50 nits, and in a general mode, the brightness of the white frame of the display panel is greater than 50 nits. The backlight source includes a local dimming function. When in the low-brightness mode, the local dimming function is in a first mode. When in the general mode, the local dimming function is in a second mode.
    Type: Application
    Filed: July 18, 2023
    Publication date: February 22, 2024
    Inventors: Chao-Chin SUNG, Hsin-Cheng HUNG, Chien-Tzu CHU, Li-Wei SUNG
  • Publication number: 20240050948
    Abstract: A contactless selection device, a light sensing structure thereof, and a biological particle selection apparatus are provided. The light sensing structure includes a substrate, an insulating layer, an electrode layer, and a photoelectric layer, the latter two of which are respectively formed on two opposite sides of the substrate. The photoelectric layer includes a plurality of collector regions, a plurality of base regions respectively formed in the collector regions, and a plurality of emitter regions that are respectively formed in the base regions. Each of the emitter regions includes a plurality of emitter pads formed in the corresponding base region. Each of the base regions, the corresponding collector region, and the corresponding emitter region are jointly formed as a vertical transistor. The insulating layer covers and separates the vertical transistors and an end of each of the emitter pads is exposed from the insulating layer.
    Type: Application
    Filed: November 16, 2022
    Publication date: February 15, 2024
    Inventors: Chung-Er Huang, Sheng-Wen Chen, Hsin-Cheng Ho
  • Patent number: 11901892
    Abstract: A level shifter and a chip with the level shifter are shown. Between the input pair and the cross-coupled output pair, there are a first protection circuit and a second protection circuit. An overdrive voltage, which is double the nominal voltage of the level shifter plus a delta voltage, is applied to the level shifter. The first protection circuit has a first voltage-drop circuit that compensates for the delta voltage. The second protection circuit has a second voltage-drop circuit that compensates for the delta voltage.
    Type: Grant
    Filed: August 16, 2022
    Date of Patent: February 13, 2024
    Assignee: MEDIATEK INC.
    Inventors: Federico Agustin Altolaguirre, Hsin-Cheng Hsu
  • Patent number: 11894101
    Abstract: Sense amplifier, memory and control method are provided. The sense amplifier includes: amplify module configured to amplify voltage difference between bit line and reference bit line when the sense amplifier is in amplifying stage; write module connected to the bit line and the reference bit line, and configured to pull the voltage difference between the bit line and the reference bit line according to data to be written when the sense amplifier is in write stage; controllable power module connected to the amplify module, configured to provide first voltage to the amplify module when the sense amplifier is in non-write stage, and to provide second voltage to the amplify module when the sense amplifier in write stage. Herein, the second voltage is less than the first voltage, and the second voltage is in positive correlation with the drive capability of the write module.
    Type: Grant
    Filed: January 10, 2022
    Date of Patent: February 6, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Hsin-Cheng Su
  • Patent number: 11881363
    Abstract: A backlight module is configured to illuminate at least one key cap. The backlight module includes a light emitting unit, a light guide plate and a lighting board. The light guide plate has a light guide hole for accommodating the light emitting unit. The lighting board has a pair of pads connected to the light emitting unit respectively. The lighting board includes a first reflective layer surrounding the light emitting unit and at least partially covering the pair of pads. Each of the pair of pads has a plurality of branches and at least one hollow area. The at least one hollow area overlaps with at least one part of the light emitting unit.
    Type: Grant
    Filed: April 7, 2023
    Date of Patent: January 23, 2024
    Assignee: DARFON ELECTRONICS CORP.
    Inventors: Ying-Lan Liu, Hsin-Cheng Ho, Heng-Yi Huang
  • Patent number: 11880747
    Abstract: An image recognition method, a training system for an object recognition model and a training method for an object recognition model are provided. The image recognition method includes the following steps. At least one original sample image of an object in a field and an object range information and an object type information in the original sample image are obtained. At least one physical parameter is adjusted to generate plural simulated sample images of the object. The object range information and the object type information of the object in each of the simulated sample images are automatically marked. A machine learning procedure is performed to train an object recognition model. An image recognition procedure is performed on an input image.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: January 23, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Hsin-Cheng Lin, Sen-Yih Chou
  • Patent number: 11881847
    Abstract: A post driver and a chip with overdrive capability are shown. A first bias circuit is configured to provide a first voltage shift between the output terminal of the post driver and the gate terminal of the first p-channel metal-oxide-semiconductor (PMOS) transistor of a pull-up circuit when the pull-down circuit is enabled. A second bias circuit is configured to provide a second voltage shift between the output terminal of the post driver and the gate terminal of the first n-channel metal-oxide-semiconductor (NMOS) transistor of the pull-down circuit when the pull-up circuit is enabled. Accordingly, the PMOS transistors in the pull-up circuit and the NMOS transistors in the pull-down circuit are all well protected although they are powered by an overdrive voltage.
    Type: Grant
    Filed: July 12, 2022
    Date of Patent: January 23, 2024
    Assignee: MEDIATEK INC.
    Inventors: Federico Agustin Altolaguirre, Hsin-Cheng Hsu
  • Publication number: 20240021479
    Abstract: A device includes a bottom transistor, a top transistor, and an epitaxial isolation structure. The bottom transistor includes a first channel layer, first source/drain epitaxial structures, and a first gate structure. The first source/drain epitaxial structures are on opposite sides of the first channel layer. The first gate structure is around the first channel layer. The top transistor is over the bottom transistor and includes a second channel layer, second source/drain epitaxial structures, and a second gate structure. The second source/drain epitaxial structures are on opposite sides of the second channel layer. The second gate structure is around the second channel layer. The epitaxial isolation structure is between and in contact with one of the first source/drain epitaxial structures and one of the second source/drain epitaxial structures, such that the one of the first source/drain epitaxial structures is electrically isolated from the one of the second source/drain epitaxial structures.
    Type: Application
    Filed: September 26, 2023
    Publication date: January 18, 2024
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Chien-Te TU, Hsin-Cheng LIN, Chee-Wee LIU
  • Publication number: 20240023023
    Abstract: A method for a User Equipment (UE) for performing a dormant operation is provided. The method receives, from a Base Station (BS), a Radio Resource Control (RRC) configuration indicating a set of one or more dormancy cell groups, where a group of serving cells belongs to a specific dormancy cell group in the set of one or more dormancy cell groups. The method receives, from the BS, a signal including a bitmap when the UE is not in a Discontinuous Reception (DRX) active time, and switches, based on a bit in the bitmap that is associated with the specific dormancy cell group, active Bandwidth Parts (BWPs) of all activated serving cells included in the group of serving cells to a dormant BWP or to a non-dormant BWP.
    Type: Application
    Filed: September 28, 2023
    Publication date: January 18, 2024
    Inventors: HSIN-HSI TSAI, CHIA-HUNG WEI, YU-HSIN CHENG, WAN-CHEN LIN, CHIE-MING CHOU
  • Publication number: 20240005967
    Abstract: The present application provides a sense amplifier, a memory, and a control method. The sense amplifier includes: an amplification module, configured to amplify a voltage difference between a bit line and a reference bit line when the sense amplifier is at an amplification stage; and a controlled power module, connected to the amplification module, and configured to: determine a drive parameter according to a rated compensation voltage range between the bit line and the reference bit line, and supply power to the amplification module according to the drive parameter, so as to control the amplification module to pull a compensation voltage between the bit line and the reference bit line to be a rated compensation voltage at an offset cancellation stage, where the rated compensation voltage is within the rated compensation voltage range.
    Type: Application
    Filed: July 21, 2021
    Publication date: January 4, 2024
    Inventor: HSIN-CHENG SU
  • Publication number: 20230420199
    Abstract: A backlight module is configured to illuminate at least one key cap. The backlight module includes a light emitting unit, a light guide plate and a lighting board. The light guide plate has a light guide hole for accommodating the light emitting unit. The lighting board has a pair of pads connected to the light emitting unit respectively. The lighting board includes a first reflective layer surrounding the light emitting unit and at least partially overlapping with the pair of pads. One of the pair of pads has a first branch and a first hollow area behind the first branch, the other one of the pair of pads has a second branch and a second hollow area behind the second branch, and the light emitting unit is disposed between the first hollow area and the second hollow area.
    Type: Application
    Filed: September 12, 2023
    Publication date: December 28, 2023
    Applicant: DARFON ELECTRONICS CORP.
    Inventors: Ying-Lan Liu, Hsin-Cheng Ho, Heng-Yi Huang
  • Publication number: 20230406969
    Abstract: The present invention provides a foam diffuser plate, including a foam core layer, the upper surface and the lower surface of the foam core layer are covered with a protective layer, and the thickness ratio of the foam core layer to the upper and lower surfaces of the protective layer is 1:7-9:1. The mass percentage of each raw material of the protective layer is PS raw material 90-99%, stabilizer 0.01-1%, organosilicon 0.1-3%, inorganic diffusing agent 0.1-3%, diffusing oil 0.1-3%, styrene-butadiene copolymer 0.1-2%, and magnesium silicate mineral 0.1-6%. The mass percentage of each raw material of the foam core layer is GPPS raw material 95-99%, antioxidant 0.3-0.6%, silicone diffusing agent 0.6-1%, foaming agent 0.5-2%, anti-UV agent 0.3-0.6%, toughening agent 0.5-2%, stabilizer 0.3-0.6%, and nucleating agent 1-5%. A manufacturing method of the foam diffuser plate is provided in the present invention as well.
    Type: Application
    Filed: June 20, 2022
    Publication date: December 21, 2023
    Inventors: JIH HSIN CHENG, XING LI WANG, MAN YI LIANG, XIAO LEI HE
  • Publication number: 20230413174
    Abstract: A method for a user equipment (UE) monitoring a physical downlink control channel (PDCCH) for power saving signaling is disclosed. The method comprises receiving a discontinuous reception (DRX) configuration from a base station (BS) to configure the UE to monitor a scheduling signal on the PDCCH within a DRX active time, and receiving a configuration from the BS to configure the UE to monitor the power saving signaling on the PDCCH and instructing the UE to wake up for monitoring the scheduling signal in the DRX active time, wherein the configuration includes a time in milliseconds prior to a start of a DRX on-duration time, and instructs the UE to start monitoring the PDCCH for the power saving signaling.
    Type: Application
    Filed: April 19, 2023
    Publication date: December 21, 2023
    Inventors: Yu-Hsin Cheng, Hsin-Hsi Tsai, Chia-Hao Yu, Chie-Ming Chou
  • Publication number: 20230407167
    Abstract: The present disclosure provides a quantum dot diffuser plate and manufacturing method thereof, including a quantum dot layer, and the upper surface and the lower surface of the quantum dot layer are covered with protective layers. The mass percentage of each raw material of the quantum dot layer is plastic raw material 90-99%, stabilizer 0.01-1%, organosilicon 0.1-3%, inorganic diffusing agent 0.1-3%, diffusing oil 0.1-3%, styrene-butadiene copolymer 0.1-2%, magnesium silicate minerals 0.1-6%, quantum dots 0.01-1%, and titanium dioxide 0.2-5%. The mass percentage of each raw material of the protective layer is plastic raw material 90-99%, stabilizer 0.01-1%, organosilicon 0.1-3%, inorganic diffusing agent 0.1-3%, diffusing oil 0.1-3%, styrene-butadiene copolymer 0.1-2%, and magnesium silicate minerals 0.1-6%. The quantum dot diffuser plate of above provides high brightness effect, thereby reducing the overall cost of the backlight module.
    Type: Application
    Filed: June 20, 2022
    Publication date: December 21, 2023
    Inventors: JIH HSIN CHENG, XING LI WANG, MAN YI LIANG, XIAO LEI HE
  • Publication number: 20230403816
    Abstract: A fan control method for controlling a set of fans of a system includes collecting M first sets of characteristic variables of a first period; inputting the M first sets of characteristic variables to a neural network to generate N third sets of characteristic variables of a second period corresponding to a second set of characteristic variables; adjusting the second set of characteristic variables to generate P adjusted second sets of characteristic variables to accordingly generate Q adjusted third sets of characteristic variables; generating an optimized second set of characteristic variables according to the N third sets of characteristic variables and the Q adjusted third sets of characteristic variables; generating a set of weights according to the optimized second set of characteristic variables; and controlling the set of fans according to the set of weights. The first period precedes the second period. M, N, P, Q are positive integers.
    Type: Application
    Filed: December 9, 2022
    Publication date: December 14, 2023
    Applicants: Inventec (Pudong) Technology Corp., Inventec Corporation
    Inventors: Chien-Ming Lee, Kai-Yang Tung, Hsin-Cheng Chu
  • Publication number: 20230399872
    Abstract: A lock device adapted for a first object and a second object movable relative to the first object includes a slider, a driving module, a latch and a power module. The driving module can drive the slider to move between a locking position and an unlocking position. The latch is movable relative to the slider. The power module can provide electricity to the driving module. When the second object is located at a retracted position relative to the first object, the driving module can drive the slider to move to the locking position, so that the latch blocks the second object. When the driving module is not driven by the power module, the latch is driven by the second object moving in an opening direction to move from an original state to a non-original state for driving the slider to move from the locking position to the unlocking position.
    Type: Application
    Filed: October 4, 2022
    Publication date: December 14, 2023
    Applicant: KING SLIDE TECHNOLOGY CO.,LTD.
    Inventors: Ken-Ching Chen, Chun-Ta Liu, Hsin-Cheng Su, Shu-Chen Lin
  • Publication number: 20230395648
    Abstract: The method includes forming a sacrificial multi-layer stack including alternating first sacrificial layers and second sacrificial layers stacked in a vertical direction on a substrate; removing the first sacrificial layers to form first spaces each interposing two of the second sacrificial layers; depositing a first dielectric layer and a first electrode material in the first spaces; removing the second sacrificial layers to form second spaces each interposing two portions of the first electrode material; depositing a second dielectric layer and a second electrode material in the second spaces.
    Type: Application
    Filed: June 1, 2022
    Publication date: December 7, 2023
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL YANG MING CHIAO TUNG UNIVERSITY
    Inventors: Hsin-Cheng LIN, Chia-Che CHUNG, Chee-Wee LIU