Patents by Inventor Hsin-Hung Chou
Hsin-Hung Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240147717Abstract: A pick-up structure of a memory device and a method of manufacturing the memory device are provided. The pick-up structure includes pick-up electrode stripes. Each pickup electrode stripe includes a main body portion in the peripheral pick-up region and an extending portion extending from the main body portion to the memory cell region. The extending portion is narrower than the main body portion. The sidewall surface of the extending portion is aligned with the sidewall surface of the main body portion.Type: ApplicationFiled: October 20, 2023Publication date: May 2, 2024Inventors: Hsin-Hung CHOU, Cheng-Shuai LI, Kao-Tsair TSAI
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Patent number: 11646768Abstract: A method for downlink transmission in a cloud radio access network for a number of users is applied in a central unit. The central unit determines a specific number of remote radio heads (RRHs) as non-serving RRHs based on a predetermined data compression ratio. For each of many pieces of user equipment (UEs), the central unit determines a combination of RRHs which are non-serving in coordinated multi-point transmission (CoMP) from a plurality of RRHs based on the determined specific number, and then performs CoMP downlink transmission based on the combination of RRHs which are non-serving in the CoMP.Type: GrantFiled: April 1, 2022Date of Patent: May 9, 2023Assignee: HON LIN TECHNOLOGY CO., LTD.Inventors: Tzu-Yu Lin, Shang-Ho Tsai, Yu-Heng You, Hsin-Hung Chou, Wei-Han Hsiao
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Publication number: 20220415783Abstract: A method includes: forming a patterned dielectric layer, including a predetermined word line region and a predetermined pick-up neck region being separated by a first distance, and the patterned dielectric layer within the predetermined pick-up neck region has a second distance, wherein the first distance is smaller than or equal to the second distance; forming a spacer on sidewalls of the patterned dielectric layer; cutting off the spacer of a connecting portion of the predetermined word line region from the spacer of a remaining portion of the predetermined word line region; forming a mask pattern, including a first portion across the connecting portion and the predetermined pick-up neck region, wherein the spacer at the remaining portion is spaced apart from the first portion; and forming a dummy structure, word lines, and pick-up necks, wherein the dummy structure is located between the word lines and the pick-up necks.Type: ApplicationFiled: April 8, 2022Publication date: December 29, 2022Inventors: Hsin-Hung CHOU, Kao-Tsair TSAI
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Patent number: 11522585Abstract: A method and a system for processing uplink signals in cloud radio access networks are disclosed The system comprising a baseband unit and a number of remote radio heads. The baseband unit and the remote radio heads are connected through fronthaul links. When one remote radio head receives a signal transmitted from a user equipment, the remote radio head first encodes the received signal according to a post-coding matrix, then quantizes the encoded signal according to a number of quantization bits allocated to the user equipment, and finally transmits the quantized signal to the baseband unit.Type: GrantFiled: November 4, 2021Date of Patent: December 6, 2022Assignee: HON LIN TECHNOLOGY CO., LTD.Inventors: Xiang-Quan Ser, Chi-Chen Wang, Shang-Ho Tsai, Hsin-Hung Chou, Wei-Han Hsiao
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Publication number: 20220224378Abstract: A method for downlink transmission in a cloud radio access network for a number of users is applied in a central unit. The central unit determines a specific number of remote radio heads (RRHs) as non-serving RRHs based on a predetermined data compression ratio. For each of many pieces of user equipment (UEs), the central unit determines a combination of RRHs which are non-serving in coordinated multi-point transmission (CoMP) from a plurality of RRHs based on the determined specific number, and then performs CoMP downlink transmission based on the combination of RRHs which are non-serving in the CoMP.Type: ApplicationFiled: April 1, 2022Publication date: July 14, 2022Inventors: TZU-YU LIN, SHANG-HO TSAI, YU-HENG YOU, HSIN-HUNG CHOU, WEI-HAN HSIAO
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Patent number: 11335568Abstract: A method for forming a semiconductor structure is provided. The method includes: forming first and second hard mask layers and a target layer on a substrate; patterning the second hard mask layer to form patterned second hard masks including a second wide mask and second narrow masks; and forming spacers on sidewalls of the second wide mask and the second narrow masks. Then, a photoresist layer is formed to cover the second wide mask and the spacers on the sidewalls of the second wide mask. The second narrow masks and the photoresist layer are removed. And, the first hard mask layer is etched with the spacers and the second wide mask together as a mask to form patterned first hard masks on the target layer, wherein the spacers define a first line width, and the second wide mask and the pair of spacers define a second line width.Type: GrantFiled: May 12, 2020Date of Patent: May 17, 2022Assignee: WINBOND ELECTRONICS CORP.Inventors: Ting-Wei Wu, Cheng-Ta Yang, Hsin-Hung Chou
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Publication number: 20220149905Abstract: A method and a system for processing uplink signals in cloud radio access networks are disclosed The system comprising a baseband unit and a number of remote radio heads. The baseband unit and the remote radio heads are connected through fronthaul links. When one remote radio head receives a signal transmitted from a user equipment, the remote radio head first encodes the received signal according to a post-coding matrix, then quantizes the encoded signal according to a number of quantization bits allocated to the user equipment, and finally transmits the quantized signal to the baseband unit.Type: ApplicationFiled: November 4, 2021Publication date: May 12, 2022Inventors: XIANG-QUAN SER, CHI-CHEN WANG, SHANG-HO TSAI, HSIN-HUNG CHOU, WEI-HAN HSIAO
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Patent number: 11329700Abstract: A method for downlink transmission in a cloud radio access network for a number of users is applied in a central unit. The central unit determines a specific number of remote radio heads (RRHs) as non-serving RRHs based on a predetermined data compression ratio. For each of many pieces of user equipment (UEs), the central unit determines a combination of RRHs which are non-serving in coordinated multi-point transmission (CoMP) from a plurality of RRHs based on the determined specific number, and then performs CoMP downlink transmission based on the combination of RRHs which are non-serving in the CoMP.Type: GrantFiled: September 25, 2020Date of Patent: May 10, 2022Assignee: HON LIN TECHNOLOGY CO., LTD.Inventors: Tzu-Yu Lin, Shang-Ho Tsai, Yu-Heng You, Hsin-Hung Chou, Wei-Han Hsiao
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Patent number: 11322438Abstract: A package structure including a lead frame structure, a die, an adhesive layer, and at least one three-dimensional (3D) printing conductive wire is provided. The lead frame structure includes a carrier and a lead frame. The carrier has a recess. The lead frame is disposed on the carrier. The die is disposed in the recess. The die includes at least one pad. The adhesive layer is disposed between a bottom surface of the die and the carrier and between a sidewall of the die and the carrier. The 3D printing conductive wire is disposed on the lead frame, the adhesive layer, and the pad, and is electrically connected between the lead frame and the pad.Type: GrantFiled: September 8, 2020Date of Patent: May 3, 2022Assignee: Winbond Electronics Corp.Inventors: Yen-Jui Chu, Hsin-Hung Chou, Chun-Hung Lin
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Publication number: 20220108894Abstract: A method for forming a semiconductor memory structure includes sequentially forming an active layer, a hard mask layer and a core layer over a substrate, and etching the core layer to form a core pattern. The core pattern includes a first strip, a second strip, and a plurality of supporting features abutting the first and second strips. The method also includes forming a spacer layer alongside the core pattern, removing the core pattern, forming a photoresist pattern above the spacer layer, etching the hard mask layer using the photoresist pattern and the spacer layer to form a hard mask pattern, and transferring the hard mask pattern into the active layer to form a gate stack.Type: ApplicationFiled: September 21, 2021Publication date: April 7, 2022Inventors: Hsin-Hung CHOU, Tsung-Wei LIN, Kao-Tsair TSAI
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Publication number: 20220077051Abstract: A package structure including a lead frame structure, a die, an adhesive layer, and at least one three-dimensional (3D) printing conductive wire is provided. The lead frame structure includes a carrier and a lead frame. The carrier has a recess. The lead frame is disposed on the carrier. The die is disposed in the recess. The die includes at least one pad. The adhesive layer is disposed between a bottom surface of the die and the carrier and between a sidewall of the die and the carrier. The 3D printing conductive wire is disposed on the lead frame, the adhesive layer, and the pad, and is electrically connected between the lead frame and the pad.Type: ApplicationFiled: September 8, 2020Publication date: March 10, 2022Applicant: Winbond Electronics Corp.Inventors: Yen-Jui Chu, Hsin-Hung Chou, Chun-Hung Lin
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Publication number: 20210358764Abstract: A method for forming a semiconductor structure is provided. The method includes: forming first and second hard mask layers and a target layer on a substrate; patterning the second hard mask layer to form patterned second hard masks including a second wide mask and second narrow masks; and forming spacers on sidewalls of the second wide mask and the second narrow masks. Then, a photoresist layer is formed to cover the second wide mask and the spacers on the sidewalls of the second wide mask. The second narrow masks and the photoresist layer are removed. And, the first hard mask layer is etched with the spacers and the second wide mask together as a mask to form patterned first hard masks on the target layer, wherein the spacers define a first line width, and the second wide mask and the pair of spacers define a second line width.Type: ApplicationFiled: May 12, 2020Publication date: November 18, 2021Inventors: Ting-Wei WU, Cheng-Ta YANG, Hsin-Hung CHOU
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Patent number: 11063010Abstract: Provided is a redistribution layer (RDL) structure including a substrate, a pad, a dielectric layer, a self-aligned structure, a conductive layer, and a conductive connector. The pad is disposed on the substrate. The dielectric layer is disposed on the substrate and exposes a portion of the pad. The self-aligned structure is disposed on the dielectric layer. The conductive layer extends from the pad to conformally cover a surface of the self-aligned structure. The conductive connector is disposed on the self-aligned structure. A method of manufacturing the RDL structure is also provided.Type: GrantFiled: February 1, 2019Date of Patent: July 13, 2021Assignee: Winbond Electronics Corp.Inventors: Yen-Jui Chu, Jin-Neng Wu, Hsin-Hung Chou, Chun-Hung Lin
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Publication number: 20210126675Abstract: A method for downlink transmission in a cloud radio access network for a number of users is applied in a central unit. The central unit determines a specific number of remote radio heads (RRHs) as non-serving RRHs based on a predetermined data compression ratio. For each of many pieces of user equipment (UEs), the central unit determines a combination of RRHs which are non-serving in coordinated multi-point transmission (CoMP) from a plurality of RRHs based on the determined specific number, and then performs CoMP downlink transmission based on the combination of RRHs which are non-serving in the CoMP.Type: ApplicationFiled: September 25, 2020Publication date: April 29, 2021Inventors: TZU-YU LIN, SHANG-HO TSAI, YU-HENG YOU, HSIN-HUNG CHOU, WEI-HAN HSIAO
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Publication number: 20200350268Abstract: A wire bonding structure and a method of manufacturing the same are provided. The wire bonding structure includes a bonding pad structure, a protection layer and a bonding wire. The bonding pad structure includes a bonding pad and a conductive layer. The bonding pad has an opening. The conductive layer is electrically connected to the bonding pad. At least a portion of the conductive layer is located in the opening of the bonding pad and laterally surrounded by the bonding pad. The protection layer at least covers a portion of a surface of the bonding pad structure. The bonding wire is bonded to the conductive layer of the bonding pad structure.Type: ApplicationFiled: April 30, 2019Publication date: November 5, 2020Applicant: Winbond Electronics Corp.Inventors: Yen-Jui Chu, Jin-Neng Wu, Chun-Hung Lin, Hsin-Hung Chou
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Patent number: 10818497Abstract: The present invention provides a patterned structure for an electronic device and a manufacturing method thereof. The patterned structure includes a patterned layer, a blocking structure, a cantilever structure, and a connection structure. The patterned layer is disposed on a substrate. The blocking structure is disposed on the substrate at one side of the patterned layer, wherein a thickness of the blocking structure is smaller than a thickness of the patterned layer. The cantilever structure is disposed on the substrate and located between the patterned layer and the blocking structure. The cantilever structure is connected with the patterned layer and the blocking structure. The connection structure is connected between the patterned layer and the substrate at one side of the patterned layer, and located on the cantilever structure and the blocking structure.Type: GrantFiled: August 21, 2017Date of Patent: October 27, 2020Assignee: Winbond Electronics Corp.Inventors: Yen-Jui Chu, Hsin-Hung Chou, Ming-Chih Tsai
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Publication number: 20200251434Abstract: Provided is a redistribution layer (RDL) structure including a substrate, a pad, a dielectric layer, a self-aligned structure, a conductive layer, and a conductive connector. The pad is disposed on the substrate. The dielectric layer is disposed on the substrate and exposes a portion of the pad. The self-aligned structure is disposed on the dielectric layer. The conductive layer extends from the pad to conformally cover a surface of the self-aligned structure. The conductive connector is disposed on the self-aligned structure. A method of manufacturing the RDL structure is also provided.Type: ApplicationFiled: February 1, 2019Publication date: August 6, 2020Applicant: Winbond Electronics Corp.Inventors: Yen-Jui Chu, Jin-Neng Wu, Hsin-Hung Chou, Chun-Hung Lin
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Patent number: 10581359Abstract: An output torque calculation device and a method thereof is provided, and the output torque calculation device includes a first sensor, a second sensor, a rotor, a reducer, a processor, and an elastic device. An input portion of the reducer and an output portion of the reducer are respectively connected to the rotor and an input portion of the elastic device, and an output portion of the elastic device is configured to connect to a load. The output torque calculation method comprises: detecting a first angle of the rotor by the first sensor; detecting a second angle of the output portion of the elastic device by the second sensor; and calculating a torque carried by a final output end of the output torque calculation device by the processor according to the first angle and the second angle.Type: GrantFiled: December 27, 2018Date of Patent: March 3, 2020Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chun-An Lin, Hsi-Chih Chang, Hsin-Hung Chou, Wen-Che Shen, Kuan-Jung Lin
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Patent number: 10515853Abstract: A method of wafer dicing is provided. The method of wafer dicing includes: providing a wafer, wherein the wafer includes a substrate, dies formed in and over the substrate and a scribe line structure located in a scribe line region between adjacent dies; removing a portion of the scribe line structure around a test device in the scribe line structure; attaching a front side of the wafer with a first tape; removing a portion of the substrate overlapping with the scribe line region from a back side of the wafer; attaching the back side of the wafer with a second tape; and removing the first tape along with the remaining portion of the scribe line structure attached thereon, leaving the dies separately attached on the second tape.Type: GrantFiled: December 10, 2018Date of Patent: December 24, 2019Assignee: Winbond Electronics Corp.Inventors: Ching-Wei Chen, Cheng-Hong Wei, Shuo-Che Chang, Hung-Sheng Chen, Hsin-Hung Chou
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Patent number: 10483235Abstract: A method for fabricating a stacked electronic device is provided. A first three-dimensional (3D) printing is performed to form a first insulating layer and a plurality of first redistribution layers (RDLs) on a first substrate. A second 3D printing is performed to form a second substrate and a plurality of through-substrate vias (TSVs) on the first insulating layer, in which the plurality of TSVs is electrically connected to the plurality of first RDLs. A third 3D printing is performed to form a second insulating layer and a plurality of second RDLs on the second substrate, in which the plurality of second RDLs is electrically connected to the plurality of TSVs. A plurality of contacts of a third substrate is bonded to the plurality of second RDLs, so that the substrate is mounted onto the second insulating layer. The disclosure also provides a stacked electronic device formed by such a method.Type: GrantFiled: March 1, 2016Date of Patent: November 19, 2019Assignee: WINBOND ELECTRONICS CORP.Inventors: Yu-Cheng Chiao, Tung-Yi Chan, Chen-Hsi Lin, Chia Hua Ho, Meng-Chang Chan, Hsin-Hung Chou