Patents by Inventor Hsu Li

Hsu Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040107050
    Abstract: A control facility for vehicle includes a global system for mobile communication (GSM) device having a processor device, a control panel, and a displayer. A satellite positioning or locating device and a radar detector are coupled to the GSM device, to show position of the vehicle in the displayer. A camera device may further be coupled to the GSM device, to shoot environment of the vehicle to the displayer. The image taken by the camera device may be alternatively shown in the displayer, for allowing the driver to clear know the environment behind the vehicle.
    Type: Application
    Filed: November 29, 2002
    Publication date: June 3, 2004
    Inventor: Hsiu-Chu Hsu Li
  • Patent number: 6687513
    Abstract: A device includes a pair of arms attached to a housing for securing a portable phone to vehicles, a circuit board received in the housing and having two or more couplers for coupling to a microphone, a speaker, and for allowing the users to speak and to receive the phones without carrying the portable phone. The portable phone may be easily and readily attached to the vehicle and electrically coupled to the electric power of vehicle with a plug which may be secured to the housing with a universal joint. Various adapters may be used to selectively couple to different phones.
    Type: Grant
    Filed: October 30, 2002
    Date of Patent: February 3, 2004
    Inventor: Hsiu-Chu Hsu Li
  • Patent number: 6159821
    Abstract: A method for forming self-rounded shallow trench isolation is described. A pad oxide layer is provided over the surface of a semiconductor substrate. A nitride layer is then deposited overlying the pad oxide layer. Isolation trenches are then etched through the nitride and pad oxide layers into the semiconductor substrate. A layer of oxide is then deposited over the said nitride layer and within the isolation trenches. The oxide layer is then polished away through chemical and mechanical polishing wherein the substrate is planarized. The nitride layer is then etched away using a special dry-etch recipe that has a higher etching rate for silicon nitride than oxide. The dry-etch recipe also has a very low etching rate for the silicon substrate. This results in the removal of the nitride layer, rounding the shoulders of the trench and leaving the substrate unaffected. The fabrication of the integrated circuit device is completed.
    Type: Grant
    Filed: February 12, 1999
    Date of Patent: December 12, 2000
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Hsu-Li Cheng, Wei-Ray Lin, Fu-Liang Yang
  • Patent number: 6001704
    Abstract: A stacked layer including a first oxide, a nitride layer, a second oxide layer and an oxynitride layer is formed on the top of the first oxide layer. An etching is performed through a photoresist to etch the oxynitride, the second oxide and nitride. Oxide spacers are formed on the side walls of the pattern structure, the oxynitride layer is also removed during the formation of the oxide spacers. Trenches are generated by a dry etching technique. The second oxide and the oxide spacers are removed. Next, a thermal oxidation is performed to rounding the corners of the trench openings. A gap filling material is refilled into the trenches and formed on the nitride. Next, a chemical mechanical polishing (CMP) is used to remove the top of the CVD-oxide and the nitride layer. The residual nitride layer, the CVD-oxide and pad oxide are removed to create trench isolation structures with rounding corners.
    Type: Grant
    Filed: June 4, 1998
    Date of Patent: December 14, 1999
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Hsu-Li Cheng, Erik S. Jeng, Wei-Ray Lin
  • Patent number: 5932115
    Abstract: The present invention is a method of manufacturing crown shape capacitors for use in DRAM semiconductor memory. The method includes the steps of forming a first polysilicon layer, patterning a photoresist on the first polysilicon layer, etching the first polysilicon layer, using oxygen plasma to strip the photoresist, forming a side wall polymer onto the side walls of the first polysilicon layer, using the side wall polymer as a mask to etch back the first polysilicon layer to form a crown shape structure, removing the side wall polymer, depositing a dielectric layer onto the first polysilicon layer, and depositing a second polysilicon layer onto the dielectric layer.
    Type: Grant
    Filed: May 3, 1996
    Date of Patent: August 3, 1999
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Yu-Chun Ho, Meng-Chao Cheng, Pei-Wen Li, Hsu-Li Cheng, Yu-Hua Huang, Shing-Huang Wu
  • Patent number: 5773199
    Abstract: A method for forming a patterned layer within an integrated circuit. There is first provided a substrate having formed thereover a blanket target layer. There is then formed upon the blanket target layer a blanket focusing layer formed from an organic anti-reflective coating (ARC) material, where the blanket focusing layer is susceptible to a reproducible negative etch bias within a first etch method employed in forming from the blanket focusing layer a patterned focusing layer. The first etch method is a first plasma etch method employing a reactant gas composition comprising trifluoromethane, carbon tetrafluoride, oxygen and argon. There is then formed upon the blanket focusing layer a blanket photoresist layer which is photoexposed and developed to form a patterned photoresist layer.
    Type: Grant
    Filed: September 9, 1996
    Date of Patent: June 30, 1998
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Kung Linliu, Hsu-Li Cheng, Eric S. Jeng
  • Patent number: 5643824
    Abstract: The invention provides a method of forming field oxide regions between active regions in a semiconductor substrate. The invention forms nitride feet on the sidewalls of a nitride oxidation mask to prevent formation of the bird's beak on the field oxide and reduce stress in the active areas. The invention begins by forming a first oxide layer and a masking block, over the active regions. A second nitride layer is deposited over the masking block and the substrate surface. The second nitride layer is anisotropically etched with a customized etch forming nitride spacers on the sidewalls of the masking block, and nitride spacer feet on the surface of the first oxide layer. The customized etch of the invention optimizes the microloading effects to properly form the nitride feet. The substrate is oxidized, using the masking block nitride spacers and the nitride spacer feet as an oxidation mask to form field oxide regions. The nitride feet eliminate bird's beak problem.
    Type: Grant
    Filed: July 29, 1996
    Date of Patent: July 1, 1997
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Rong-Wu Chien, Ming-Hong Kuo, Hsu-Li Cheng
  • Patent number: D478420
    Type: Grant
    Filed: September 7, 2002
    Date of Patent: August 19, 2003
    Inventor: Hsiu-Chu Hsu Li
  • Patent number: D487024
    Type: Grant
    Filed: October 23, 2002
    Date of Patent: February 24, 2004
    Inventor: Hsiu-Chu Hsu Li
  • Patent number: D487072
    Type: Grant
    Filed: May 13, 2003
    Date of Patent: February 24, 2004
    Inventor: Hsiu-Chu Hsu Li
  • Patent number: D491180
    Type: Grant
    Filed: May 9, 2003
    Date of Patent: June 8, 2004
    Inventor: Hsiu-Chu Hsu Li