Patents by Inventor Hsu-Sheng Yu

Hsu-Sheng Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9756415
    Abstract: A mono-body set of headphones made from a foam material and having a fixed length of headband between ear pads is provided. The mono-body headphones are, preferably, flexible and durable, permitting the headphones to be straightened, twisted or bent without breaking.
    Type: Grant
    Filed: November 3, 2015
    Date of Patent: September 5, 2017
    Inventor: Hsu-Sheng Yu
  • Patent number: 9449915
    Abstract: Provided is a semiconductor device and a method of manufacturing the same. The semiconductor device includes a substrate and a dielectric layer. The dielectric layer is located on the substrate. The dielectric layer has a plurality of openings, and side walls of the openings have concave-and-convex profile.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: September 20, 2016
    Assignee: MACRONIX International Co., Ltd.
    Inventors: Hong-Ji Lee, Hsu-Sheng Yu
  • Patent number: 9425086
    Abstract: A method of eliminating overhang in a contact hole formed in a contact film stack is described. A liner layer is overlaid on the contact film stack, the liner also coating the contact hole. A portion of the liner is removed to expose the overhang, and the exposed overhang is removed. The liner is also used to fill-in a bowing profile of the contact hole, thereby rendering sidewalls of the contact hole smooth and straight suitable for metal fill-in while suppressing piping defects.
    Type: Grant
    Filed: December 21, 2013
    Date of Patent: August 23, 2016
    Assignee: Macronix International Co., Ltd.
    Inventors: Fang-Hao Hsu, Hsu-Sheng Yu, Kuo-Feng Lo, Hong-Ji Lee
  • Publication number: 20160190061
    Abstract: Provided is a semiconductor device and a method of manufacturing the same. The semiconductor device includes a substrate and a dielectric layer. The dielectric layer is located on the substrate. The dielectric layer has a plurality of openings, and side walls of the openings have concave-and-convex profile.
    Type: Application
    Filed: December 24, 2014
    Publication date: June 30, 2016
    Inventors: Hong-Ji Lee, Hsu-Sheng Yu
  • Patent number: 9305840
    Abstract: A cluster tool is disclosed that can increase throughput of a wafer fabrication process by facilitating removal of barrier overhang in contact holes of contact film stacks. Individual chambers of the cluster tool provide for deposition of barrier material onto a semiconductor structure, depositing over with an amorphous carbon film (ACF), etching back the ACF, and etching a corner region of the contact hole. Removal of the barrier overhang improves the quality of metal fill-in of the contact hole. An expectedly ensuing feature entails a technique in which filling-in of the contact hole with a metal such as tungsten can be achieved with attenuated or eliminated adverse consequence.
    Type: Grant
    Filed: December 21, 2013
    Date of Patent: April 5, 2016
    Assignee: MACRONIX INTERNATIONAL Co., LTD.
    Inventors: Hsu-Sheng Yu, Hong-Ji Lee, N. T. Lian, T. H. Yang
  • Publication number: 20160066667
    Abstract: A protective apparatus for a mobile device includes a protective layer unit, an inner support unit and a magnet unit. The protective layer unit includes an outer layer, an inner layer and a clamping strip. A mobile device is sandwiched between the clamping strip and the inner layer. The inner support unit includes a plurality of inner plates. The magnet unit includes a plurality of magnets. The protective layer unit further includes a plurality of recessed portions disposed between the inner plates. Thus, the protective layer unit is bendable at the recessed portions so that the protective layer unit is deformable freely.
    Type: Application
    Filed: September 9, 2014
    Publication date: March 10, 2016
    Inventors: Hsu-Sheng Yu, Tung-Pao Chang
  • Publication number: 20150179569
    Abstract: A method of eliminating overhang in a contact hole formed in a contact film stack is described. A liner layer is overlaid on the contact film stack, the liner also coating the contact hole. A portion of the liner is removed to expose the overhang, and the exposed overhang is removed. The liner is also used to fill-in a bowing profile of the contact hole, thereby rendering sidewalls of the contact hole smooth and straight suitable for metal fill-in while suppressing piping defects.
    Type: Application
    Filed: December 21, 2013
    Publication date: June 25, 2015
    Applicant: Macronix International Co., Ltd.
    Inventors: Fang-Hao Hsu, Hsu-Sheng Yu, Kuo-Feng Lo, Hong-Ji Lee
  • Publication number: 20150179514
    Abstract: A cluster tool is disclosed that can increase throughput of a wafer fabrication process by facilitating removal of barrier overhang in contact holes of contact film stacks. Individual chambers of the cluster tool provide for deposition of barrier material onto a semiconductor structure, depositing over with an amorphous carbon film (ACF), etching back the ACF, and etching a corner region of the contact hole. Removal of the barrier overhang improves the quality of metal fill-in of the contact hole. An expectedly ensuing feature entails a technique in which filling-in of the contact hole with a metal such as tungsten can be achieved with attenuated or eliminated adverse consequence.
    Type: Application
    Filed: December 21, 2013
    Publication date: June 25, 2015
    Applicant: Macronix International Co., Ltd.
    Inventors: Hsu-Sheng Yu, Hong-Ji Lee, N.T. Lian, T.H. Yang
  • Patent number: 8076778
    Abstract: A semiconductor device and related method for fabricating the same include providing a stacked structure including an insulating base layer and lower and upper barrier layers with a conductive layer in between, etching the stacked structure to provide a plurality of conductive columns that each extend from the lower barrier layer, each of the conductive columns having an overlying upper barrier layer cap formed from the etched upper barrier layer, wherein the lower barrier layer is partially etched to provide a land region between each of the conductive lines, forming a liner layer over the etched stacked structure exposing the land region, and etching the liner layer and removing the exposed land region to form a plurality of conductive lines.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: December 13, 2011
    Assignee: Macronix International Co., Ltd.
    Inventors: Kuo Liang Wei, Hsu Sheng Yu, Hong-Ji Lee
  • Publication number: 20110074030
    Abstract: A semiconductor device and related method for fabricating the same include providing a stacked structure including an insulating base layer and lower and upper barrier layers with a conductive layer in between, etching the stacked structure to provide a plurality of conductive columns that each extend from the lower barrier layer, each of the conductive columns having an overlying upper barrier layer cap formed from the etched upper barrier layer, wherein the lower barrier layer is partially etched to provide a land region between each of the conductive lines, forming a liner layer over the etched stacked structure exposing the land region, and etching the liner layer and removing the exposed land region to form a plurality of conductive lines
    Type: Application
    Filed: September 30, 2009
    Publication date: March 31, 2011
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Kuo Liang Wei, Hsu Sheng Yu, Hong-Ji Lee
  • Patent number: 7772670
    Abstract: A method facilitates generally simultaneously fabricating a number of shallow trench isolation structures such that some selected ones of the shallow trench isolation structures have rounded corners and other selected ones of the shallow trench isolation structures do not have rounded corners. The method includes forming patterned photoresist over a hard mask so that portions of the hard mask are exposed over a portion of a cell region and over a portion of a periphery region, and then removing the exposed hard mask layer in the periphery region while removing a portion of the exposed hard mask layer in the cell region. A trench having rounded corners is then partially formed in the periphery region and more of the hard mask layer is removed in the cell region, before the trench in the periphery region is deepened while a trench in the cell region is formed.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: August 10, 2010
    Assignee: Macronix International Co., Ltd.
    Inventor: Hsu-Sheng Yu
  • Patent number: 7648921
    Abstract: A method of forming a dielectric layer is provided. A first dielectric layer is formed on a substrate having metal layers formed thereon. The first dielectric layer includes overhangs in the spaces between two neighboring metal layers and voids under the overhangs. The first dielectric layer is partially removed to cut off the overhangs and expose the voids and therefore openings are formed. A second dielectric layer is formed on the dielectric layer to fill up the opening.
    Type: Grant
    Filed: September 22, 2006
    Date of Patent: January 19, 2010
    Assignee: MACRONIX International Co., Ltd.
    Inventors: Hsu-Sheng Yu, Shing-Ann Lo, Ta-Hung Yang
  • Publication number: 20080124940
    Abstract: A method of forming a dielectric layer is provided. A first dielectric layer is formed on a substrate having metal layers formed thereon. The first dielectric layer includes overhangs in the spaces between two neighboring metal layers and voids under the overhangs. The first dielectric layer is partially removed to cut off the overhangs and expose the voids and therefore openings are formed. A second dielectric layer is formed on the dielectric layer to fill up the opening.
    Type: Application
    Filed: September 22, 2006
    Publication date: May 29, 2008
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Hsu-Sheng Yu, Shing-Ann Lo, Ta-Hung Yang
  • Patent number: 7244680
    Abstract: A method facilitates generally simultaneously fabricating a number of shallow trench isolation structures such that some selected ones of the shallow trench isolation structures have rounded corners and other selected ones of the shallow trench isolation structures do not have rounded corners. The method includes forming patterned photoresist over a hard mask so that portions of the hard mask are exposed over a portion of a cell region and over a portion of a periphery region, and then removing the exposed hard mask layer in the periphery region while removing a portion of the exposed hard mask layer in the cell region. A trench having rounded corners is then partially formed in the periphery region and more of the hard mask layer is removed in the cell region, before the trench in the periphery region is deepened while a trench in the cell region is formed.
    Type: Grant
    Filed: November 14, 2003
    Date of Patent: July 17, 2007
    Assignee: Macronix International Co., Ltd.
    Inventor: Hsu-Sheng Yu
  • Publication number: 20070122993
    Abstract: A method facilitates generally simultaneously fabricating a number of shallow trench isolation structures such that some selected ones of the shallow trench isolation structures have rounded corners and other selected ones of the shallow trench isolation structures do not have rounded corners. The method includes forming patterned photoresist over a hard mask so that portions of the hard mask are exposed over a portion of a cell region and over a portion of a periphery region, and then removing the exposed hard mask layer in the periphery region while removing a portion of the exposed hard mask layer in the cell region. A trench having rounded corners is then partially formed in the periphery region and more of the hard mask layer is removed in the cell region, before the trench in the periphery region is deepened while a trench in the cell region is formed.
    Type: Application
    Filed: December 20, 2006
    Publication date: May 31, 2007
    Inventor: Hsu-Sheng Yu
  • Publication number: 20070111449
    Abstract: The invention is directed to a method for manufacturing a non-volatile memory. The method comprises steps of forming a stacked gate structure over a substrate, wherein the stacked gate structure is composed of, from the bottom to the top of the stacked gate structure, a first dielectric layer, a charge storage layer, a second dielectric layer, a conductive layer and a cap layer. A source/drain region is formed in the substrate. A protective layer is formed on the sidewall of the stacked gate structure. An etching process is performed to remove the cap layer, wherein, in the etching process, the cap layer and the protective layer have different etching rate.
    Type: Application
    Filed: November 16, 2005
    Publication date: May 17, 2007
    Inventors: Hsu-Sheng Yu, Chun-Hung Lee
  • Patent number: 6995095
    Abstract: Shallow trench isolation structures are simultaneously fabricated such that ones in a cell region have first-type features and others in a periphery region have second-type features. The first-type features can be rounded edges or can be first depths and widths, and the second-type features can be unrounded edges or can be second depths and widths which are different from the first depths and widths. The method includes forming patterned photoresist over a hard mask over portions of a cell and a periphery region, and removing the exposed hard mask layer in the periphery region while removing a portion of the exposed hard mask layer in the cell region. A trench is then partially formed in the periphery region and more of the hard mask layer is removed in the cell region, followed by the trench in the periphery region being deepened while a trench in the cell region is formed.
    Type: Grant
    Filed: October 10, 2003
    Date of Patent: February 7, 2006
    Assignee: Macronix International Co., Ltd.
    Inventor: Hsu-Sheng Yu
  • Publication number: 20050106871
    Abstract: A method facilitates generally simultaneously fabricating a number of shallow trench isolation structures such that some selected ones of the shallow trench isolation structures have rounded corners and other selected ones of the shallow trench isolation structures do not have rounded corners. The method includes forming patterned photoresist over a hard mask so that portions of the hard mask are exposed over a portion of a cell region and over a portion of a periphery region, and then removing the exposed hard mask layer in the periphery region while removing a portion of the exposed hard mask layer in the cell region. A trench having rounded corners is then partially formed in the periphery region and more of the hard mask layer is removed in the cell region, before the trench in the periphery region is deepened while a trench in the cell region is formed.
    Type: Application
    Filed: November 14, 2003
    Publication date: May 19, 2005
    Inventor: Hsu-Sheng Yu
  • Publication number: 20050079722
    Abstract: Shallow trench isolation structures are simultaneously fabricated such that ones in a cell region have first-type features and others in a periphery region have second-type features. The first-type features can be rounded edges or can be first depths and widths, and the second-type features can be unrounded edges or can be second depths and widths which are different from the first depths and widths. The method includes forming patterned photoresist over a hard mask over portions of a cell and a periphery region, and removing the exposed hard mask layer in the periphery region while removing a portion of the exposed hard mask layer in the cell region. A trench is then partially formed in the periphery region and more of the hard mask layer is removed in the cell region, followed by the trench in the periphery region being deepened while a trench in the cell region is formed.
    Type: Application
    Filed: October 10, 2003
    Publication date: April 14, 2005
    Inventor: Hsu-Sheng Yu
  • Patent number: D763854
    Type: Grant
    Filed: October 6, 2014
    Date of Patent: August 16, 2016
    Inventor: Hsu-Sheng Yu