Patents by Inventor Hua Yao

Hua Yao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240134180
    Abstract: An optical device and the prism module thereof are provided. The prism module includes a first prism, a second prism, and a third prism. The second prism is disposed beside the first prism. The third prism is adhered to the second prism. First light enters the first prism, is reflected plural times in the first prism, enters the second prism, and is emitted from the second prism. Second light enters the second prism, is reflected plural times in the second prism, and is emitted from the second prism. Third light sequentially passes through the third prism and the second prism, enters the first prism, is reflected plural times in the first prism, and is emitted from the first prism.
    Type: Application
    Filed: October 19, 2023
    Publication date: April 25, 2024
    Inventors: Fei Han, Xiao-Yao Zhang, Yue-Ye Chen, Ling-Wei Zhao, Jun-Wei Che, Hua-Tang Liu
  • Publication number: 20240110410
    Abstract: A lock mechanism with an ice breaking mechanism. The lock mechanism is composed of a lock ring, an engagement plate, a pawl, a shaft, an engagement plate driving rod, a pawl release lever, a release lever, a support, a swinging claw, a tensioning wheel, a cable, a pulley, a limiting member, a supporting arm, a fixed shaft, a pull rod, a spring, a swinging ice breaking arm, an ice breaking pull rod, and the like. The lock mechanism is provided with the ice breaking mechanism. The ice breaking mechanism may be started to push a vehicle door away by a specific distance, so as to assist in manually or automatically opening the door, which improves the degree of satisfaction of customers.
    Type: Application
    Filed: November 14, 2022
    Publication date: April 4, 2024
    Inventors: Hua YONG, Xiao YAO, Huang XINRAN, Wang YANGFEI
  • Patent number: 11926742
    Abstract: A method for preparing carbon black from pyrolysis char of waste tires by a molten salt thermal treatment and a product thereof are provided. The method includes heating one or two groups of a metal chloride salt group and a metal sulfate group to obtain a molten salt; adding pyrolysis char of waste tires into the molten salt and subjecting same to a molten salt thermal treatment under a preset reaction atmosphere; after the reaction is complete, separating the reaction product to obtain a secondary molten salt and treated pyrolysis char, washing the treated pyrolysis char with hot water and then drying same so as to obtain carbon black, and at the same time, recycling the secondary molten salt.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: March 12, 2024
    Assignee: HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Hongyun Hu, Hua Tang, Aijun Li, Kang Xie, Yuhan Yang, Fu Yang, Hong Yao
  • Patent number: 11892521
    Abstract: A semiconductor device with contact check circuitry is provided. The semiconductor device includes a plurality of pads, an internal circuit, and a contact check circuit. The plurality of pads includes a first pad and a second pad. The internal circuit is coupled to the plurality of pads. The contact check circuit, at least coupled to the first pad and the second pad, is used for checking, when the semiconductor device is under test, contact connections to the first pad and the second pad to generate a check result signal according to comparison of a first test signal and a second test signal received from the first pad and the second pad with at least one reference signal.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: February 6, 2024
    Assignee: ELITE SEMICONDUCTOR MICROELECTRONICS TECHNOLOGY INC.
    Inventor: Tse-Hua Yao
  • Publication number: 20230057897
    Abstract: A semiconductor device with contact check circuitry is provided. The semiconductor device includes a plurality of pads, an internal circuit, and a contact check circuit. The plurality of pads includes a first pad and a second pad. The internal circuit is coupled to the plurality of pads. The contact check circuit, at least coupled to the first pad and the second pad, is used for checking, when the semiconductor device is under test, contact connections to the first pad and the second pad to generate a check result signal according to comparison of a first test signal and a second test signal received from the first pad and the second pad with at least one reference signal.
    Type: Application
    Filed: August 19, 2021
    Publication date: February 23, 2023
    Inventor: TSE-HUA YAO
  • Publication number: 20220249370
    Abstract: A nano-micelle preparation of icaritin. The preparation comprises icaritin and polymer auxiliary materials. Further provided is a preparation method for the nano-micelle preparation, and the prepared nano-micelle preparation of icaritin has the advantage of high bioavailability.
    Type: Application
    Filed: July 26, 2020
    Publication date: August 11, 2022
    Applicant: BEIJING SHENOGEN PHARMA GROUP LTD.
    Inventors: Cheng TANG, Xiaoming CHEN, Hua YAO, Ranran ZHANG, Kun MENG
  • Patent number: 11335427
    Abstract: A memory test circuit comprising: a first latch circuit for receiving a first input address and an error indication signal to generate a first address; a first E-fuse group for receiving the first address to generate an output address; a second latch circuit for receiving the error indication signal; a second E-fuse group for generating an error indication signal according to an output of the second latch circuit which is generated according to the fault indication signal; and a comparison circuit for activating the second latch circuit according to a relation between the first address and a second input address and a state of the first latch circuit or the first E-fuse group.
    Type: Grant
    Filed: November 4, 2020
    Date of Patent: May 17, 2022
    Assignee: Elite Semiconductor Microelectronics Technology Inc.
    Inventors: Yu-Tao Lin, Tse-Hua Yao, Yi-Fan Chen
  • Publication number: 20220139479
    Abstract: A memory test circuit comprising: a first latch circuit for receiving a first input address and an error indication signal to generate a first address; a first E-fuse group for receiving the first address to generate an output address; a second latch circuit for receiving the error indication signal; a second E-fuse group for generating an error indication signal according to an output of the second latch circuit which is generated according to the fault indication signal; and a comparison circuit for activating the second latch circuit according to a relation between the first address and a second input address and a state of the first latch circuit or the first E-fuse group.
    Type: Application
    Filed: November 4, 2020
    Publication date: May 5, 2022
    Inventors: Yu-Tao Lin, Tse-Hua Yao, Yi-Fan Chen
  • Patent number: 11127477
    Abstract: An E-fuse circuit comprising: an E-fuse group, comprising a plurality of E-fuse sections, wherein each one of the E-fuse sections comprises a plurality of E-fuses; a multi-mode latch circuit, configured to receive an input signal to generate a first output signal in a burn in mode, and configured to receive an address to be compared to generate a second output signal in a normal mode; a first logic circuit group, configured to receive a first part of bits of the first output signal to generate a control signal in the burn in mode; and a second logic circuit group, configured to receive the control signal and a second part of bits of the first output signal to generate a selection signal in the burn in mode, to select which one of the E-fuse sections is activated.
    Type: Grant
    Filed: October 22, 2020
    Date of Patent: September 21, 2021
    Assignee: Elite Semiconductor Microelectronics Technology Inc.
    Inventors: Tse-Hua Yao, Yi-Fan Chen
  • Patent number: 11080183
    Abstract: The present application proposes a memory chip includes a plurality of memory banks, a plurality of address pins, and a pseudo-address determining circuit. The plurality of address pins is arranged for receiving a plurality of address signals corresponding to the plurality of memory banks, respectively. The pseudo-address determining circuit has a plurality of input terminals coupled to the plurality of address pins, respectively, and a plurality of output terminals coupled to the plurality of memory banks. The pseudo-address determining circuit generates a pseudo-address table for the plurality of memory banks when the memory chip is powered-up. The pseudo-address table has a plurality of pseudo-addresses corresponding to the plurality of memory banks, respectively. The present application also provides a memory module that incorporates the memory chip and a method for pseudo-accessing memory banks of the memory chip.
    Type: Grant
    Filed: August 13, 2019
    Date of Patent: August 3, 2021
    Assignee: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
    Inventors: Pei-Jey Huang, Tse-Hua Yao
  • Publication number: 20210049095
    Abstract: The present application proposes a memory chip includes a plurality of memory banks, a plurality of address pins, and a pseudo-address determining circuit. The plurality of address pins is arranged for receiving a plurality of address signals corresponding to the plurality of memory banks, respectively. The pseudo-address determining circuit has a plurality of input terminals coupled to the plurality of address pins, respectively, and a plurality of output terminals coupled to the plurality of memory banks. The pseudo-address determining circuit generates a pseudo-address table for the plurality of memory banks when the memory chip is powered-up. The pseudo-address table has a plurality of pseudo-addresses corresponding to the plurality of memory banks, respectively. The present application also provides a memory module that incorporates the memory chip and a method for pseudo-accessing memory banks of the memory chip.
    Type: Application
    Filed: August 13, 2019
    Publication date: February 18, 2021
    Inventors: PEI-JEY HUANG, TSE-HUA YAO
  • Patent number: 10672495
    Abstract: An E-fuse burning circuit comprising: a burning directing circuit, configured to receive first input data comprising first input address and burning directing data, to generate a burning directing signal according to the burning directing data; a ring address latch, configured to latch the first input address responding to a first clock signal, and configured to output second input address responding to the first clock signal; and a control signal generating circuit, configured to generate at least one stop signal to determine whether the data in the ring address latch is shifted or not. The ring address latch applies a first number of the stages when the burning directing signal indicates a row of the E-fuse circuit is to be burned and applies a second number of the stages when the burning directing signal indicates a column of the E-fuse circuit is to be burned.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: June 2, 2020
    Assignee: Elite Semiconductor Memory Technology Inc.
    Inventors: Tse-Hua Yao, Yi-Fan Chen
  • Patent number: 10629282
    Abstract: An E-fuse circuit comprising: a ring address latch, configured to receive a first input address arranged in serial i bits responding to a first clock signal, and to output a second input address arranged in serial j bits responding to a second clock signal; a control signal generating circuit, configured to receive the second input address, and to decode the second input address to generate first control signals with m bits and second control signals with n bits, wherein the first control signals and the second control signals are transmitted in parallel, and m, n are factors of j; and an E-fuse group, comprising j fuses. If any one of the first control signals has a first logic value and any one of the second control signals has the logic value, a corresponding fuse the E-fuse group is burned.
    Type: Grant
    Filed: June 16, 2019
    Date of Patent: April 21, 2020
    Assignee: Elite Semiconductor Memory Technology Inc.
    Inventors: Tse-Hua Yao, Yi-Fan Chen
  • Patent number: 10324315
    Abstract: The present disclosure discloses an electronic device, to solve the technical problem that it is relatively complex to implement a change in color of an appearance of the electronic device in the related art. The electronic device comprises a main body having a basic form and a deformed form; and a color changing film attached to the main body to form a part of a surface of an appearance of the main body, the color changing film being deformed as the main body is changed from the basic form to the deformed form, wherein if the main body is in the basic form, the color changing film as the part of the appearance of the main body presents a first visual effect, and if the main body is in the deformed form, the color changing film as the part of the appearance of the main body presents a second visual effect different from the first visual effect. Based on the same concept, the present disclosure further discloses another electronic device.
    Type: Grant
    Filed: September 17, 2015
    Date of Patent: June 18, 2019
    Assignees: Beijing Lenovo Software, Ltd., Lenovo (Beijing) Limited
    Inventor: Hua Yao
  • Patent number: 10008292
    Abstract: A memory auto repairing circuit including: a decoding circuit, a latch enable circuit and a first latch circuit, wherein the decoding circuit is arranged to compare a first input address with a plurality of fail addresses to generate a control signal; the latch enable circuit is arranged to selectively generate a first enable signal at least according to the control signal; and the first latch circuit is arranged to receive the first input address, and store the first input address when the first enable signal is received by the first latch circuit; wherein when the control signal indicates that the first input address is identical to one of the plurality of fail addresses, the enable signal is prevented from being transmitted from the latch enable circuit to the first latch circuit.
    Type: Grant
    Filed: December 14, 2016
    Date of Patent: June 26, 2018
    Assignee: Elite Semiconductor Memory Technology Inc.
    Inventors: Tse-Hua Yao, Yi-Fan Chen
  • Publication number: 20180166153
    Abstract: a memory auto repairing circuit including: a decoding circuit, a latch enable circuit and a first latch circuit, wherein the decoding circuit is arranged to compare a first input address with a plurality of fail addresses to generate a control signal; the latch enable circuit is arranged to selectively generate a first enable signal at least according to the control signal; and the first latch circuit is arranged to receive the first input address, and store the first input address when the first enable signal is received by the first latch circuit; wherein when the control signal indicates that the first input address is identical to one of the plurality of fail addresses, the enable signal is prevented from being transmitted from the latch enable circuit to the first latch circuit.
    Type: Application
    Filed: December 14, 2016
    Publication date: June 14, 2018
    Inventors: Tse-Hua Yao, Yi-Fan Chen
  • Publication number: 20160377893
    Abstract: The present disclosure discloses an electronic device, to solve the technical problem that it is relatively complex to implement a change in color of an appearance of the electronic device in the related art. The electronic device comprises a main body having a basic form and a deformed form; and a color changing film attached to the main body to form a part of a surface of an appearance of the main body, the color changing film being deformed as the main body is changed from the basic form to the deformed form, wherein if the main body is in the basic form, the color changing film as the part of the appearance of the main body presents a first visual effect, and if the main body is in the deformed form, the color changing film as the part of the appearance of the main body presents a second visual effect different from the first visual effect. Based on the same concept, the present disclosure further discloses another electronic device.
    Type: Application
    Filed: September 17, 2015
    Publication date: December 29, 2016
    Inventor: Hua Yao
  • Patent number: 9089859
    Abstract: Disclosed is a shower head with a single-point touch switch. The shower head comprises a ball head component, a water-distributing unit. a switching unit and a wedge block. The ball head component has a protruding seat, and the protruding seat has a connection slot on its lower part. The water distributing unit is mounted on the swing component. The switching unit comprises a sliding bar and a switching disc. The wedge block is slidably connected with the water distributing unit and has an upward wedge on one side; and the upward wedge coordinates with the connecting slot. Sliding movement of the wedge block and sliding movement of sliding bars constitute an interlinking connection relationship. It is simple in structure, stable in configuration, and easy to operate.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: July 28, 2015
    Assignees: XIAMEN SOLEX HIGH-TECH INDUSTRIES CO., LTD.
    Inventors: Huasong Zhou, Zhongcheng Jin, Jianmin Chen, Hua Yao
  • Patent number: 8918925
    Abstract: A lifting rod assembly is connected to the support arm and has a body unit, a lifting rod and a friction piece. The body unit has a sleeving hole penetrating from front to back and a connecting hole penetrating the sleeving hole from inside to outside, the sleeving hole is sleeved out of the support arm; the thread of the upper end part of the lifting rod is mounted in the connecting hole of the body; and the friction piece is mounted in the upper end part of the lifting rod and adaptive to the support arm, the compressing level between the friction piece and the support arm can be controlled though the screwing level between the lifting rod and the connecting hole of the body unit.
    Type: Grant
    Filed: April 28, 2011
    Date of Patent: December 30, 2014
    Assignees: Xiamen Solex High-Tech Industries Co., Ltd.
    Inventors: Huasong Zhou, Huasheng Peng, Hua Yao, Renzhong Li
  • Patent number: 8901817
    Abstract: The present invention relates to a metal halide lamp with a ceramic discharge tube, which includes a ceramic discharge tube and two electrodes. The ceramic discharge tube includes a main discharge tube and two ceramic capillary tubes respectively located at two ends of the main discharge tube, the main discharge tube has a central protuberant part located in the middle thereof and two cylindrical parts respectively connected to two ends of the central protuberant part, the two cylindrical parts are respectively connected to the two ceramic capillary tubes.
    Type: Grant
    Filed: November 25, 2010
    Date of Patent: December 2, 2014
    Assignee: Shanghai Yaming Lighting Co., Ltd.
    Inventors: Hua Yao, Feng Li