Patents by Inventor Hui Chang

Hui Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240155150
    Abstract: The present invention relates to a method for encoding and decoding an image. The method for decoding an image includes: deriving an initial motion vector from a merge candidate list of a current block; deriving a refined motion vector using the initial motion vector; and generating a prediction block of the current block using the refined motion vector.
    Type: Application
    Filed: January 10, 2024
    Publication date: May 9, 2024
    Inventors: Ha Hyun LEE, Jung Won KANG, Hyun Suk KO, Sung Chang LIM, Jin Ho LEE, Dong San JUN, Seung Hyun CHO, Hui Yong KIM, Jin Soo CHOI
  • Publication number: 20240155152
    Abstract: According to the present invention, an image encoding apparatus comprises: a motion prediction unit which derives motion information on a current block in the form of the motion information including L0 motion information and L1 motion information; a motion compensation unit which performs a motion compensation for the current block on the basis of at least one of the L0 motion information and L1 motion information so as to generate a prediction block corresponding to the current block; and a restoration block generating unit which generates a restoration block corresponding to the current block based on the prediction block. According to the present invention, image encoding efficiency can be improved.
    Type: Application
    Filed: January 16, 2024
    Publication date: May 9, 2024
    Applicants: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, University-Industry Cooperation Group of Kyung Hee University
    Inventors: Hui Yong KIM, Gwang Hoon PARK, Kyung Yong KIM, Sang Min KIM, Sung Chang LIM, Jin Ho LEE, Jin Soo CHOI, Jin Woong KIM
  • Publication number: 20240155110
    Abstract: The present invention relates to an image encoding method and an image decoding method. The image decoding method includes partitioning a picture into a plurality of coding units, constructing a coding unit group including at least one coding unit of the plurality of coding units, obtaining coding information in units of one coding unit group, and decoding at least one coding unit of the plurality of coding units included in the coding unit group by using the obtained coding information.
    Type: Application
    Filed: January 12, 2024
    Publication date: May 9, 2024
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Jung Won KANG, Sung Chang LIM, Hyun Suk KO, Ha Hyun LEE, Jin Ho LEE, Dong San JUN, Seung Hyun CHO, Hui Yong KIM, Jin Soo CHOI
  • Publication number: 20240155117
    Abstract: An image encoding/decoding method and apparatus for performing representative sample-based intra prediction are provided. An image decoding method may comprise deriving an intra prediction mode of a current block, configuring a reference sample of the current block, and performing intra prediction for the current block based on the intra prediction mode and the reference sample, wherein the intra prediction is representative sample-based prediction.
    Type: Application
    Filed: January 12, 2024
    Publication date: May 9, 2024
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jin Ho LEE, Jung Won KANG, Hyun Suk KO, Sung Chang LIM, Ha Hyun LEE, Dong San JUN, Hui Yong KIM
  • Patent number: 11979158
    Abstract: An integrated circuit (IC) device includes a master latch circuit having a first clock input and a data output, a slave latch circuit having a second clock input and a data input electrically coupled to the data output of the master latch circuit, and a clock circuit. The clock circuit is electrically coupled to the first clock input by a first electrical connection configured to have a first time delay between the clock circuit and the first clock input. The clock circuit is electrically coupled to the second clock input by a second electrical connection configured to have a second time delay between the clock circuit and the second clock input. The first time delay is longer than the second time delay.
    Type: Grant
    Filed: May 26, 2022
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Cheng-Yu Lin, Yung-Chen Chien, Jia-Hong Gao, Jerry Chang Jui Kao, Hui-Zhong Zhuang
  • Patent number: 11979555
    Abstract: Disclosed herein is a method of decoding an image including deriving intra prediction mode of a current block using an intra prediction mode of a neighbor block adjacent to the current block, constructing a reference sample of the current block, and performing intra prediction with respect to the current block using the intra prediction mode of the current block and the reference sample. The deriving of the intra prediction mode of the current block includes constructing a most probable mode (MPM) list based on whether the intra prediction mode of the current block is a Planar mode.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: May 7, 2024
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jin Ho Lee, Jung Won Kang, Ha Hyun Lee, Sung Chang Lim, Hui Yong Kim
  • Patent number: 11978715
    Abstract: A package structure and a formation method of a package structure are provided. The method includes disposing a chip structure over a substrate and forming a first adhesive element directly on the chip structure. The first adhesive element has a first thermal conductivity. The method also includes forming a second adhesive element directly on the chip structure. The second adhesive element has a second thermal conductivity, and the second thermal conductivity is greater than the first thermal conductivity. The method further includes attaching a protective lid to the chip structure through the first adhesive element and the second adhesive element.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Meng-Tsung Kuo, Hui-Chang Yu, Chih-Kung Huang, Wei-Teng Chang
  • Patent number: 11979573
    Abstract: Disclosed are a method for determining a color difference component quantization parameter and a device using the method. Method for decoding an image can comprise the steps of: decoding a color difference component quantization parameter offset on the basis of size information of a transform unit; and calculating a color difference component quantization parameter index on the basis of the decoded color difference component quantization parameter offset. Therefore, the present invention enables effective quantization by applying different color difference component quantization parameters according to the size of the transform unit when executing the quantization.
    Type: Grant
    Filed: August 1, 2022
    Date of Patent: May 7, 2024
    Assignee: Dolby Laboratories Licensing Corporation
    Inventors: Sung Chang Lim, Hui Yong Kim, Se Yoon Jeong, Jong Ho Kim, Ha Hyun Lee, Jin Ho Lee, Jin Soo Choi, Jin Woong Kim
  • Patent number: 11978678
    Abstract: A display device includes a first substrate, a light-emitting element, a light conversion layer, and a color filter layer. The light-emitting element is disposed on the first substrate. The light conversion layer is disposed on the light-emitting element. In addition, the color filter layer is overlapped the light-emitting element and the light conversion layer.
    Type: Grant
    Filed: August 5, 2022
    Date of Patent: May 7, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Tung-Kai Liu, Tsau-Hua Hsieh, Wei-Cheng Chu, Chun-Hsien Lin, Chandra Lius, Ting-Kai Hung, Kuan-Feng Lee, Ming-Chang Lin, Tzu-Min Yan, Hui-Chieh Wang
  • Publication number: 20240141427
    Abstract: Presented herein are altered polymerase enzymes for improved incorporation of nucleotides and nucleotide analogues, in particular altered polymerases that maintain low error rate, low phasing rate, or increased incorporation rate for a second generation ffN under reduced incorporation times, as well as methods and kits using the same.
    Type: Application
    Filed: September 27, 2023
    Publication date: May 2, 2024
    Applicant: ILLUMINA, INC.
    Inventors: Misha Golynskiy, Rahman Rahman Pour, Jiawen Li, Ryan Craig, Hamed Tabatabaei Ghomi, Saurabh Nirantar, Hsu Myat Noe, Lin Hui Chang, Yvonne Devadas, Jing Wen Lim, Kay Klausing, Humberto Rojo, Eric Murtfeldt, Chris Garcia
  • Publication number: 20240145297
    Abstract: A structure includes a dielectric layer, and a metal line in the dielectric layer. The metal line has a first straight edge and a second straight edge extending in a lengthwise direction of the metal line. The first straight edge and the second straight edge are parallel to each other. A via is underlying and joined to the metal line. The via has a third straight edge underlying and vertically aligned to the first straight edge, and a first curved edge and a second curved edge connecting to opposite ends of the third straight edge.
    Type: Application
    Filed: January 11, 2024
    Publication date: May 2, 2024
    Inventors: Yu-Tse Lai, Ya Hui Chang
  • Publication number: 20240145632
    Abstract: A micro light emitting device includes an epitaxial structure, a conductive layer, and a first insulating layer. The epitaxial structure has a first surface and a second surface opposite to the first surface, and includes a first semiconductor layer, an active layer and a second semiconductor layer that are arranged in such order in a direction from the first surface to the second surface. The conductive layer is formed on a surface of the first semiconductor layer away from the active layer. The first insulating layer is formed on the surface of the first semiconductor layer away from the active layer, and exposes at least a part of the conductive layer.
    Type: Application
    Filed: October 23, 2023
    Publication date: May 2, 2024
    Inventors: Ming-Chun TSENG, Shaohua HUANG, Hongwei WANG, Kang-Wei PENG, Su-Hui LIN, Xiaomeng LI, Chi-Ming TSAI, Chung-Ying CHANG
  • Publication number: 20240140782
    Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a first device and a second device disposed adjacent to the first device; a conductive pillar disposed adjacent to the first device or the second device; a molding surrounding the first device, the second device and the conductive pillar; and a redistribution layer (RDL) over the first device, the second device, the molding and the conductive pillar, wherein the RDL electrically connects the first device to the second device and includes an opening penetrating the RDL and exposing a sensing area over the first device.
    Type: Application
    Filed: January 5, 2024
    Publication date: May 2, 2024
    Inventors: PO CHEN YEH, YI-HSIEN CHANG, FU-CHUN HUANG, CHING-HUI LIN, CHIAHUNG LIU, SHIH-FEN HUANG, CHUN-REN CHENG
  • Patent number: 11973944
    Abstract: In this specification, a image decoding method is disclosed. The image decoding method of the present invention comprises, decoding block partition information of a current block included in a current picture, determining a partitioning scheme for the current block according to the block partition information and partitioning the current block using the partitioning scheme determined, wherein the partitioning scheme is determined according to whether the current block includes a boundary of the current picture.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: April 30, 2024
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sung Chang Lim, Jung Won Kang, Jin Ho Lee, Ha Hyun Lee, Hui Yong Kim
  • Publication number: 20240137511
    Abstract: Disclosed herein are a video decoding method and apparatus and a video encoding method and apparatus. In video encoding and decoding, multiple partition blocks are generated by splitting a target block. A prediction mode is derived for at least a part of the multiple partition blocks, among the multiple partition blocks, and prediction is performed on the multiple partition blocks based on the derived prediction mode. When prediction is performed on the partition blocks, information related to the target block may be used, and information related to an additional partition block, which is predicted prior to the partition block, may be used.
    Type: Application
    Filed: January 4, 2024
    Publication date: April 25, 2024
    Applicants: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, INDUSTRY-UNIVERSITY COOPERATION FOUNDATION KOREA AEROSPACE UNIVERSITY, HANBAT NATIONAL UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION
    Inventors: Jin-Ho LEE, Jung-Won KANG, Hyunsuk KO, Sung-Chang LIM, Dong-San JUN, Ha-Hyun LEE, Seung-Hyun CHO, Hui-Yong KIM, Hae-Chul CHOI, Dae-Hyeok GWON, Jae-Gon KIM, A-Ram BACK
  • Publication number: 20240137503
    Abstract: An image encoding/decoding method is disclosed. A method of decoding an image, the method comprising, deriving an intra prediction mode for a current block, decoding at least one original sample that is present in a rightmost column and a bottommost row (a bottom row) of the current block, constructing a reference sample by using the at least one decoded original sample and performing intra prediction on the current block by using the constructed reference sample.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Inventors: Hyun Suk KO, Jin Ho LEE, Sung Chang LIM, Jung Won KANG, Ha Hyun LEE, Dong San JUN, Hui Yong KIM
  • Publication number: 20240137507
    Abstract: The present invention relates to a video encoding/decoding method and apparatus. The video decoding method according to the present invention may comprise decoding filter information on a coding unit; classifying samples in the coding unit into classes on a per block classification unit basis; and filtering the coding unit having the samples classified into the classes on a per block classification unit basis by using the filter information.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 25, 2024
    Inventors: Sung Chang LIM, Jung Won KANG, Ha Hyun LEE, Dong San JUN, Hyun Suk KO, Jin Ho LEE, Hui Yong KIM
  • Patent number: 11968869
    Abstract: An electronic device includes a flexible substrate and a conductive wire. The conductive wire is disposed on the flexible substrate and includes a metal portion and a plurality of openings disposed in the metal portion. The metal portion includes a plurality of extending portions and a plurality of joint portions, and each of the openings is surrounded by two of the plurality of extending portions and two of the plurality of joint portions. A ratio of a sum of widths of the plurality of extending portions to a sum of widths of the plurality of joint portions is in a range from 0.8 to 1.2.
    Type: Grant
    Filed: April 28, 2022
    Date of Patent: April 23, 2024
    Assignee: InnoLux Corporation
    Inventors: Ya-Wen Lin, Chien-Chih Chen, Yen-Hsi Tu, Cheng-Wei Chang, Shu-Hui Yang
  • Patent number: 11968512
    Abstract: In an example, a speaker device may include a first transducer and a second transducer. The first transducer may include a first diaphragm, a first magnetic circuit, and a first voice coil disposed in a magnetic gap of the first magnetic circuit to cause vibration of the first diaphragm. The second transducer may include a second diaphragm, a second magnet circuit, and a second voice coil disposed in a magnetic gap of the second magnetic circuit to cause vibration of the second diaphragm. Further, the speaker device may include a magnetic plate having a first surface coupled to the first transducer and a second surface coupled to the second transducer. The first surface is opposite to the second surface.
    Type: Grant
    Filed: June 22, 2022
    Date of Patent: April 23, 2024
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Yen-Hsin Ho, Yi-Ying Lai, Chen-Hui Hu, Chen-Yu Chang
  • Patent number: 11968908
    Abstract: In an embodiment, a method includes: forming a first inter-metal dielectric (IMD) layer over a semiconductor substrate; forming a bottom electrode layer over the first IMD layer; forming a magnetic tunnel junction (MTJ) film stack over the bottom electrode layer; forming a first top electrode layer over the MTJ film stack; forming a protective mask covering a first region of the first top electrode layer, a second region of the first top electrode layer being uncovered by the protective mask; forming a second top electrode layer over the protective mask and the first top electrode layer; and patterning the second top electrode layer, the first top electrode layer, the MTJ film stack, the bottom electrode layer, and the first IMD layer with an ion beam etching (IBE) process to form a MRAM cell, where the protective mask is etched during the IBE process.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tai-Yen Peng, Hui-Hsien Wei, Han-Ting Lin, Sin-Yi Yang, Yu-Shu Chen, An-Shen Chang, Qiang Fu, Chen-Jung Wang