Abstract: The present disclosure provide an array substrate and a method of manufacturing the same, and a display panel. The array substrate includes: a base substrate; a first signal transmission layer comprising a common electrode line; a first insulating layer covering the first signal transmission layer and having a first through hole at a position corresponding to the common electrode line; a first electrode layer located on the first insulating layer, the first electrode layer comprising a connection electrode located at the position of the first through hole; a second insulating layer covering the first electrode layer and having a second through hole at a position corresponding to the connection electrode; and a second electrode layer comprising a common electrode that covers the second through hole; the connection electrode contacts the common electrode line and the common electrode respectively.

Abstract: A touch display panel, a manufacturing method thereof and a method of detecting a touch for the same are disclosed. The touch display panel includes a first substrate (01) and a second substrate (02). The first substrate (01) includes, within its non-display region, a plurality of gate lines (10) parallel to each other, a plurality of data lines (20) parallel to each other, a plurality of first touch electrode lines (30) parallel to the gate lines (10), and a plurality of second touch electrode lines (40) parallel to the data lines (20). The first substrate (01) further includes first touch electrodes (50) electrically connected to the first touch electrode lines (30) and second touch electrodes (60) electrically connected to the second touch electrode lines (40). Between two adjacent data lines (20), there are two sub-pixels arranged in the same row on the first substrate (01). A second touch electrode line (40) is located between the two sub-pixels.

Abstract: The present application discloses A thin film transistor (TFT), including: a substrate; a source-drain layer comprising a source electrode and a drain electrode over the substrate; and an active layer comprising a poly-Si pattern and an amorphous-Si pattern having contact with the poly-Si pattern over the substrate. The amorphous-Si pattern is between the poly-Si pattern and the source-drain layer; the source electrode overlaps with the poly-Si pattern and the amorphous-Si pattern respectively in a direction substantially perpendicular to a surface of the substrate; and the drain electrode overlaps with the poly-Si pattern and the amorphous-Si pattern respectively in the direction substantially perpendicular to the surface of the substrate.

Abstract: An array substrate and a method of manufacturing the same, a display panel and a display device are provided. The array substrate includes a thin film transistor and a pixel electrode. An insulating layer is formed between a drain electrode of the thin film transistor and the pixel electrode. The drain electrode is in direct electrical contact with the pixel electrode through a via-hole in the insulating layer.

Abstract: An array substrate, a manufacturing method thereof, and a display apparatus are provided. The array substrate includes a display area and a non-display area in the periphery of the display area, the display area includes pixel regions, the display and non-display areas are provided with via holes, wherein each pixel region is provided, at a side facing a display side, with a reflection layer configured to reflect light irradiated thereon from an external light source to form a display image; and an anti-deterioration layer in contact with the reflection layer is provided in the via holes in the display and non-display areas. Thus, by using a new material, utilization of external light source is improved without additional masking process, and connection in via holes in the display area, and especially in the non-display area is achieved, which prevents deterioration of the via holes and poor contact resistance.

Abstract: The present disclosure relates to a metal electrode, an array substrate and a method of producing the same, and a display device. In an embodiment, the method includes: forming a protection layer on a metal layer; patterning the protection layer to form a protection pattern, a profile of the protection pattern being the same as a profile of a predetermined pattern of the metal electrode; and etching a part of the metal layer not covered by the protection pattern to form the metal electrode, the metal electrode being covered by the protection pattern, wherein an etching anisotropy of the protection layer is larger than an etching anisotropy of the metal layer.

Abstract: The present application discloses A thin film transistor (TFT), including: a substrate; a source-drain layer comprising a source electrode and a drain electrode over the substrate; and an active layer comprising a poly-Si pattern and an amorphous-Si pattern having contact with the poly-Si pattern over the substrate. The amorphous-Si pattern is between the poly-Si pattern and the source-drain layer; the source electrode overlaps with the poly-Si pattern and the amorphous-Si pattern respectively in a direction substantially perpendicular to a surface of the substrate; and the drain electrode overlaps with the poly-Si pattern and the amorphous-Si pattern respectively in the direction substantially perpendicular to the surface of the substrate.

Abstract: An array substrate includes a pixel circuit and a light-emitting diode. The pixel circuit includes a driving transistor including a first active medium made of polysilicon, and a switching transistor including a second active medium made of polysilicon. The first active medium has a first grain size. The second active medium has a second grain size larger than the first grain size. The light-emitting diode is coupled to the pixel circuit.

Abstract: A manufacturing method of a metal layer, a functional substrate and a manufacturing method thereof, and a display device are provided. The manufacturing method of a metal layer includes: forming an insulating layer on a base substrate; forming an etching buffer layer on the insulating layer; patterning the etching buffer layer and the insulating layer to form a plurality of recessed microstructures in the insulating layer; stripping the etching buffer layer; and forming a metal layer on the insulating layer, a surface of the metal layer adjacent to the insulating layer is formed with a plurality of protruded portions which are filled into the plurality of recessed microstructures. The manufacturing method of a metal layer may form a metal layer with anti-reflection effect.

Abstract: An array substrate motherboard, a manufacturing method thereof and a display device are provided. The manufacturing method includes forming a film layer pattern for a first display product at a first region of a base substrate and forming a film layer pattern for a second display product at a second region of the base substrate. The first display product has deep holes at a density larger than the second display product, and each deep hole is a via-hole penetrating through at least two insulation layers. Specifically, the manufacturing method include: prior to forming a second conductive pattern on an insulation layer, reducing a thickness of the insulation layer at the first region; and forming the second conductive pattern on the insulation layer, and enabling the second conductive pattern to be connected to a first conductive pattern under the insulation layer through a via-hole structure penetrating through the insulation layer.

Abstract: A substrate and a manufacturing method thereof, and a display device are provided. The substrate comprises a base substrate (101), a metal black matrix (111) and an anti-reflection pattern (112A, 112B) for reducing optical reflectivity of the metal black matrix (111), which are arranged on the base substrate (101), and the anti-reflection pattern (112A, 112B) is arranged on a side of the metal black matrix (111) close to a light emission side of the substrate. The anti-reflection pattern (112A, 112B) reduces reflectivity of the metal black matrix (111) on outside ambient light, increases a display contrast of a display device that includes the substrate, and thus improves display quality of the pictures.

Abstract: This present disclosure provides an array substrate, a manufacturing method thereof, and a display apparatus, aiming at solving the issue of light reflection on the array substrates and improving the display effects of display apparatuses. The array substrate includes a transparent substrate; a plurality of components disposed on a first side of the transparent substrate; and a shielding pattern, disposed on a second side of the transparent substrate, and configured to shield light reflected from a surface of at least one of the plurality of components.

Abstract: Embodiments of the present invention relate to a thin-film transistor (TFT) and a manufacturing method thereof, an array substrate and a manufacturing method thereof, and a display device. The TFT includes an active layer, an amorphous silicon (a-Si) connecting layer and a source-drain electrode layer. The active layer includes a channel region, a source region and a drain region; forming materials of the channel region include polycrystalline silicon (poly-Si); the a-Si connecting layer is disposed on a side of the active layer and includes a first connecting part and a second connecting part which are spaced from each other; the source-drain electrode layer includes a source electrode and a drain electrode which are spaced to each other; the source electrode is electrically connected with the source region through the first connecting part; and the drain electrode is electrically connected with the drain electrode through the second connecting part.

Abstract: The embodiments of the present invention disclose a parallax bather and a fabricating method thereof. The parallax barrier comprises a first transparent conducting layer (35), a second transparent conducting layer (36), and an insulating layer (37) between the first transparent conducting layer (35) and the second transparent conducting layer (36). The first transparent conductive layer (35) is formed into a plurality of signal electrode lines (350), and the second transparent conductive layer (36) is formed into a plurality of common electrode lines (360). The signal electrode lines (350) and the common electrode lines (360) are arranged alternately, and the common electrode lines (360) are located in a gap between adjacent signal electrode lines (350) with the insulating layer (37) in between.

Abstract: An array substrate, a manufacturing method thereof, and a display device are provided. The array substrate includes: a base substrate, a signal line disposed on the base substrate, an extinction layer disposed between the base substrate and the signal line, the extinction layer being configured to reduce an ambient light when the array substrate is located on a light exiting side. An orthographic projection of the signal line in a plane of the base substrate is coincided with an orthographic projection of the extinction layer in the plane of the base substrate.

Abstract: An array substrate and a method of manufacturing the same, a display panel and a display device are provided. The array substrate includes a thin film transistor and a pixel electrode. An insulating layer is formed between a drain electrode of the thin film transistor and the pixel electrode. The drain electrode is in direct electrical contact with the pixel electrode through a via-hole in the insulating layer.

Abstract: The disclosure provides a thin film transistor (TFT) and a fabrication method thereof, an array substrate and a fabrication method thereof, and a display apparatus. The fabrication method of a TFT includes: forming a protection layer in an area on an active layer between a source electrode and a drain electrode to be formed, forming a source-drain metal layer above the active layer having the protection layer formed thereon, coating a photoresist on the source-drain metal layer, and forming a photoresist reserved area corresponding to areas of the source electrode and the drain electrode to be formed and a photoresist non-reserved area corresponding to the other area; etching off the source-drain metal layer corresponding to the photoresist non-reserved area to form the source and drain electrodes and expose the protection layer above the active layer; and removing the photoresist above the source and drain electrodes and the protection layer.

Abstract: The present application discloses a shift register unit for outputting a gate driving signal to control image display in an operation cycle including sequentially an input phase, an output phase, an output-suspending phase, the shift register unit including a first node-control circuit connected to a pull-up node and a first pull-down node; a second node-control circuit connected to a pull-down control node and the pull-up node; a pull-up circuit connected to the pull-up node, a first input terminal for receiving a first clock signal, and an output terminal for outputting the gate driving signal, and configured to control the first clock signal to be passed from the first input terminal to the output terminal when the pull-up node is at a first potential level; a third node-control circuit connected to the pull-up node, the first pull-down node, the pull-down control node, and a second input terminal for receiving a second clock signal; and configured to control the first pull-down node to receive the second

Abstract: An array substrate, a display panel, a display device, and a method for fabricating an array substrate are provided. The array substrate comprises gate lines and data lines on a substrate plate which are insulated from each other and intersect to define sub-pixel units, and the data lines comprise a first data line and a second data line which are arranged side by side between two neighboring columns of sub-pixel units. Between two of the sub-pixel units which are neighbors in a column direction, at least a portion of the first data line is arranged in a layer different from the neighboring second data line. At least a part of the first data line is arranged in a layer different from that of the neighboring second data line, to overcome the problem of short circuit between dual data lines.

Abstract: A shift register circuit and a driving method therefor, a gate line driving circuit and an array substrate, the shift register circuit includes: a charging sub-circuit for charging a pull-up node under the control of a signal input by an input signal terminal; an output sub-circuit for outputting, through an output terminal, a clock signal provided by a first clock signal terminal to serve as a drive signal, under control of an electric level of the pull-up node; a first pull-down sub-circuit for pulling down the pull-up node and the output terminal under the control of an electric level of a first pull-down node; and a reset sub-circuit for resetting the pull-up node and the output terminal under the control of a reset signal input by a reset signal terminal.